1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 *
6 * Copyright (C) 2013 Atmel,
7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 */
9
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16
17 / {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "Atmel SAMA5D3 family SoC";
21 compatible = "atmel,sama5d3", "atmel,sama5";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 serial4 = &usart3;
30 serial5 = &uart0;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 gpio3 = &pioD;
35 gpio4 = &pioE;
36 tcb0 = &tcb0;
37 i2c0 = &i2c0;
38 i2c1 = &i2c1;
39 i2c2 = &i2c2;
40 ssc0 = &ssc0;
41 ssc1 = &ssc1;
42 pwm0 = &pwm0;
43 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a5";
50 reg = <0x0>;
51 };
52 };
53
54 pmu {
55 compatible = "arm,cortex-a5-pmu";
56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
57 };
58
59 memory@20000000 {
60 device_type = "memory";
61 reg = <0x20000000 0x8000000>;
62 };
63
64 clocks {
65 slow_xtal: slow_xtal {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
69 };
70
71 main_xtal: main_xtal {
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <0>;
75 };
76
77 adc_op_clk: adc_op_clk {
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <1000000>;
81 };
82 };
83
84 sram: sram@300000 {
85 compatible = "mmio-sram";
86 reg = <0x00300000 0x20000>;
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <0 0x00300000 0x20000>;
90 };
91
92 ahb {
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
96 ranges;
97
98 apb {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103
104 mmc0: mmc@f0000000 {
105 compatible = "atmel,hsmci";
106 reg = <0xf0000000 0x600>;
107 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
108 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
109 dma-names = "rxtx";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
112 status = "disabled";
113 #address-cells = <1>;
114 #size-cells = <0>;
115 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
116 clock-names = "mci_clk";
117 };
118
119 spi0: spi@f0004000 {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "atmel,at91rm9200-spi";
123 reg = <0xf0004000 0x100>;
124 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
125 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
126 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
127 dma-names = "tx", "rx";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_spi0>;
130 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
131 clock-names = "spi_clk";
132 status = "disabled";
133 };
134
135 ssc0: ssc@f0008000 {
136 compatible = "atmel,at91sam9g45-ssc";
137 reg = <0xf0008000 0x4000>;
138 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
139 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
140 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
141 dma-names = "tx", "rx";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
144 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
145 clock-names = "pclk";
146 status = "disabled";
147 };
148
149 tcb0: timer@f0010000 {
150 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0xf0010000 0x100>;
154 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
155 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>;
156 clock-names = "t0_clk", "slow_clk";
157 };
158
159 i2c0: i2c@f0014000 {
160 compatible = "atmel,at91sam9x5-i2c";
161 reg = <0xf0014000 0x4000>;
162 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
163 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
164 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
165 dma-names = "tx", "rx";
166 pinctrl-names = "default", "gpio";
167 pinctrl-0 = <&pinctrl_i2c0>;
168 pinctrl-1 = <&pinctrl_i2c0_gpio>;
169 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
170 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
174 status = "disabled";
175 };
176
177 i2c1: i2c@f0018000 {
178 compatible = "atmel,at91sam9x5-i2c";
179 reg = <0xf0018000 0x4000>;
180 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
181 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
182 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
183 dma-names = "tx", "rx";
184 pinctrl-names = "default", "gpio";
185 pinctrl-0 = <&pinctrl_i2c1>;
186 pinctrl-1 = <&pinctrl_i2c1_gpio>;
187 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>;
188 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
192 status = "disabled";
193 };
194
195 usart0: serial@f001c000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xf001c000 0x100>;
198 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
199 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
200 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
201 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
202 dma-names = "tx", "rx";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart0>;
205 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
206 clock-names = "usart";
207 status = "disabled";
208 };
209
210 usart1: serial@f0020000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xf0020000 0x100>;
213 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
214 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
215 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
216 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
217 dma-names = "tx", "rx";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_usart1>;
220 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
221 clock-names = "usart";
222 status = "disabled";
223 };
224
225 uart0: serial@f0024000 {
226 compatible = "atmel,at91sam9260-usart";
227 reg = <0xf0024000 0x100>;
228 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
229 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_uart0>;
232 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
233 clock-names = "usart";
234 status = "disabled";
235 };
236
237 pwm0: pwm@f002c000 {
238 compatible = "atmel,sama5d3-pwm";
239 reg = <0xf002c000 0x300>;
240 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
241 #pwm-cells = <3>;
242 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
243 status = "disabled";
244 };
245
246 isi: isi@f0034000 {
247 compatible = "atmel,at91sam9g45-isi";
248 reg = <0xf0034000 0x4000>;
249 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_isi_data_0_7>;
252 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
253 clock-names = "isi_clk";
254 status = "disabled";
255 port {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 };
259 };
260
261 sfr: sfr@f0038000 {
262 compatible = "atmel,sama5d3-sfr", "syscon";
263 reg = <0xf0038000 0x60>;
264 };
265
266 mmc1: mmc@f8000000 {
267 compatible = "atmel,hsmci";
268 reg = <0xf8000000 0x600>;
269 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
270 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
271 dma-names = "rxtx";
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
274 status = "disabled";
275 #address-cells = <1>;
276 #size-cells = <0>;
277 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
278 clock-names = "mci_clk";
279 };
280
281 spi1: spi@f8008000 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "atmel,at91rm9200-spi";
285 reg = <0xf8008000 0x100>;
286 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
287 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
288 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
289 dma-names = "tx", "rx";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_spi1>;
292 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
293 clock-names = "spi_clk";
294 status = "disabled";
295 };
296
297 ssc1: ssc@f800c000 {
298 compatible = "atmel,at91sam9g45-ssc";
299 reg = <0xf800c000 0x4000>;
300 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
301 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
302 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
303 dma-names = "tx", "rx";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
306 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
307 clock-names = "pclk";
308 status = "disabled";
309 };
310
311 adc0: adc@f8018000 {
312 compatible = "atmel,sama5d3-adc";
313 reg = <0xf8018000 0x100>;
314 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
315 pinctrl-names = "default";
316 pinctrl-0 = <
317 &pinctrl_adc0_adtrg
318 &pinctrl_adc0_ad0
319 &pinctrl_adc0_ad1
320 &pinctrl_adc0_ad2
321 &pinctrl_adc0_ad3
322 &pinctrl_adc0_ad4
323 &pinctrl_adc0_ad5
324 &pinctrl_adc0_ad6
325 &pinctrl_adc0_ad7
326 &pinctrl_adc0_ad8
327 &pinctrl_adc0_ad9
328 &pinctrl_adc0_ad10
329 &pinctrl_adc0_ad11
330 >;
331 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>,
332 <&adc_op_clk>;
333 clock-names = "adc_clk", "adc_op_clk";
334 atmel,adc-channels-used = <0xfff>;
335 atmel,adc-startup-time = <40>;
336 atmel,adc-use-external-triggers;
337 atmel,adc-vref = <3000>;
338 atmel,adc-sample-hold-time = <11>;
339 status = "disabled";
340 };
341
342 i2c2: i2c@f801c000 {
343 compatible = "atmel,at91sam9x5-i2c";
344 reg = <0xf801c000 0x4000>;
345 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
346 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
347 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
348 dma-names = "tx", "rx";
349 pinctrl-names = "default", "gpio";
350 pinctrl-0 = <&pinctrl_i2c2>;
351 pinctrl-1 = <&pinctrl_i2c2_gpio>;
352 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>;
353 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
354 #address-cells = <1>;
355 #size-cells = <0>;
356 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
357 status = "disabled";
358 };
359
360 usart2: serial@f8020000 {
361 compatible = "atmel,at91sam9260-usart";
362 reg = <0xf8020000 0x100>;
363 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
364 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
365 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
366 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
367 dma-names = "tx", "rx";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usart2>;
370 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
371 clock-names = "usart";
372 status = "disabled";
373 };
374
375 usart3: serial@f8024000 {
376 compatible = "atmel,at91sam9260-usart";
377 reg = <0xf8024000 0x100>;
378 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
379 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
380 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
381 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
382 dma-names = "tx", "rx";
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart3>;
385 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
386 clock-names = "usart";
387 status = "disabled";
388 };
389
390 sha: crypto@f8034000 {
391 compatible = "atmel,at91sam9g46-sha";
392 reg = <0xf8034000 0x100>;
393 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
394 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
395 dma-names = "tx";
396 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
397 clock-names = "sha_clk";
398 };
399
400 aes: crypto@f8038000 {
401 compatible = "atmel,at91sam9g46-aes";
402 reg = <0xf8038000 0x100>;
403 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
404 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
405 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
406 dma-names = "tx", "rx";
407 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
408 clock-names = "aes_clk";
409 };
410
411 tdes: crypto@f803c000 {
412 compatible = "atmel,at91sam9g46-tdes";
413 reg = <0xf803c000 0x100>;
414 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
415 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
416 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
417 dma-names = "tx", "rx";
418 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
419 clock-names = "tdes_clk";
420 };
421
422 trng@f8040000 {
423 compatible = "atmel,at91sam9g45-trng";
424 reg = <0xf8040000 0x100>;
425 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
426 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
427 };
428
429 hsmc: hsmc@ffffc000 {
430 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
431 reg = <0xffffc000 0x1000>;
432 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
433 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
434 #address-cells = <1>;
435 #size-cells = <1>;
436 ranges;
437
438 pmecc: ecc-engine@ffffc070 {
439 compatible = "atmel,at91sam9g45-pmecc";
440 reg = <0xffffc070 0x490>,
441 <0xffffc500 0x100>;
442 };
443 };
444
445 dma0: dma-controller@ffffe600 {
446 compatible = "atmel,at91sam9g45-dma";
447 reg = <0xffffe600 0x200>;
448 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
449 #dma-cells = <2>;
450 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
451 clock-names = "dma_clk";
452 };
453
454 dma1: dma-controller@ffffe800 {
455 compatible = "atmel,at91sam9g45-dma";
456 reg = <0xffffe800 0x200>;
457 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
458 #dma-cells = <2>;
459 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
460 clock-names = "dma_clk";
461 };
462
463 ramc0: ramc@ffffea00 {
464 compatible = "atmel,sama5d3-ddramc";
465 reg = <0xffffea00 0x200>;
466 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
467 clock-names = "ddrck", "mpddr";
468 };
469
470 dbgu: serial@ffffee00 {
471 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
472 reg = <0xffffee00 0x200>;
473 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
474 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
475 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
476 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
477 dma-names = "tx", "rx";
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_dbgu>;
480 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
481 clock-names = "usart";
482 status = "disabled";
483 };
484
485 aic: interrupt-controller@fffff000 {
486 #interrupt-cells = <3>;
487 compatible = "atmel,sama5d3-aic";
488 interrupt-controller;
489 reg = <0xfffff000 0x200>;
490 atmel,external-irqs = <47>;
491 };
492
493 pinctrl: pinctrl@fffff200 {
494 #address-cells = <1>;
495 #size-cells = <1>;
496 compatible = "atmel,sama5d3-pinctrl", "simple-mfd";
497 ranges = <0xfffff200 0xfffff200 0xa00>;
498 atmel,mux-mask = <
499 /* A B C */
500 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
501 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
502 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
503 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
504 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
505 >;
506
507 /* shared pinctrl settings */
508 adc0 {
509 pinctrl_adc0_adtrg: adc0_adtrg {
510 atmel,pins =
511 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
512 };
513 pinctrl_adc0_ad0: adc0_ad0 {
514 atmel,pins =
515 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
516 };
517 pinctrl_adc0_ad1: adc0_ad1 {
518 atmel,pins =
519 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
520 };
521 pinctrl_adc0_ad2: adc0_ad2 {
522 atmel,pins =
523 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
524 };
525 pinctrl_adc0_ad3: adc0_ad3 {
526 atmel,pins =
527 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
528 };
529 pinctrl_adc0_ad4: adc0_ad4 {
530 atmel,pins =
531 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
532 };
533 pinctrl_adc0_ad5: adc0_ad5 {
534 atmel,pins =
535 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
536 };
537 pinctrl_adc0_ad6: adc0_ad6 {
538 atmel,pins =
539 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
540 };
541 pinctrl_adc0_ad7: adc0_ad7 {
542 atmel,pins =
543 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
544 };
545 pinctrl_adc0_ad8: adc0_ad8 {
546 atmel,pins =
547 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
548 };
549 pinctrl_adc0_ad9: adc0_ad9 {
550 atmel,pins =
551 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
552 };
553 pinctrl_adc0_ad10: adc0_ad10 {
554 atmel,pins =
555 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
556 };
557 pinctrl_adc0_ad11: adc0_ad11 {
558 atmel,pins =
559 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
560 };
561 };
562
563 dbgu {
564 pinctrl_dbgu: dbgu-0 {
565 atmel,pins =
566 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
567 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
568 };
569 };
570
571 ebi {
572 pinctrl_ebi_addr: ebi-addr-0 {
573 atmel,pins =
574 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
575 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
576 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
577 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
578 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
579 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
580 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
581 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
582 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
583 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
584 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
585 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
586 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
587 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
588 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
589 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
590 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
591 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
592 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
593 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
594 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
595 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
597 };
598
599 pinctrl_ebi_nand_addr: ebi-addr-1 {
600 atmel,pins =
601 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
602 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
603 };
604
605 pinctrl_ebi_cs0: ebi-cs0-0 {
606 atmel,pins =
607 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
608 };
609
610 pinctrl_ebi_cs1: ebi-cs1-0 {
611 atmel,pins =
612 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
613 };
614
615 pinctrl_ebi_cs2: ebi-cs2-0 {
616 atmel,pins =
617 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
618 };
619
620 pinctrl_ebi_nwait: ebi-nwait-0 {
621 atmel,pins =
622 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
623 };
624
625 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
626 atmel,pins =
627 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
628 };
629 };
630
631 i2c0 {
632 pinctrl_i2c0: i2c0-0 {
633 atmel,pins =
634 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
635 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
636 };
637
638 pinctrl_i2c0_gpio: i2c0-gpio {
639 atmel,pins =
640 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
641 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
642 };
643 };
644
645 i2c1 {
646 pinctrl_i2c1: i2c1-0 {
647 atmel,pins =
648 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
649 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
650 };
651
652 pinctrl_i2c1_gpio: i2c1-gpio {
653 atmel,pins =
654 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
655 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
656 };
657 };
658
659 i2c2 {
660 pinctrl_i2c2: i2c2-0 {
661 atmel,pins =
662 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
663 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
664 };
665
666 pinctrl_i2c2_gpio: i2c2-gpio {
667 atmel,pins =
668 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
669 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
670 };
671 };
672
673 isi {
674 pinctrl_isi_data_0_7: isi-0-data-0-7 {
675 atmel,pins =
676 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
677 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
678 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
679 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
680 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
681 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
682 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
683 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
684 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
685 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
686 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
687 };
688
689 pinctrl_isi_data_8_9: isi-0-data-8-9 {
690 atmel,pins =
691 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
692 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
693 };
694
695 pinctrl_isi_data_10_11: isi-0-data-10-11 {
696 atmel,pins =
697 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
698 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
699 };
700 };
701
702 mmc0 {
703 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
704 atmel,pins =
705 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
706 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
707 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
708 };
709 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
710 atmel,pins =
711 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
712 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
713 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
714 };
715 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
716 atmel,pins =
717 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
718 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
719 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */
720 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
721 };
722 };
723
724 mmc1 {
725 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
726 atmel,pins =
727 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
728 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
729 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
730 };
731 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
732 atmel,pins =
733 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
734 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
735 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
736 };
737 };
738
739 nand0 {
740 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
741 atmel,pins =
742 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
743 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
744 };
745 };
746
747 pwm0 {
748 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
749 atmel,pins =
750 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
751 };
752 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
753 atmel,pins =
754 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
755 };
756 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
757 atmel,pins =
758 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
759 };
760 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
761 atmel,pins =
762 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
763 };
764
765 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
766 atmel,pins =
767 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
768 };
769 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
770 atmel,pins =
771 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
772 };
773 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
774 atmel,pins =
775 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
776 };
777 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
778 atmel,pins =
779 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
780 };
781 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
782 atmel,pins =
783 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
784 };
785 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
786 atmel,pins =
787 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
788 };
789
790 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
791 atmel,pins =
792 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
793 };
794 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
795 atmel,pins =
796 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
797 };
798 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
799 atmel,pins =
800 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
801 };
802 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
803 atmel,pins =
804 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
805 };
806
807 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
808 atmel,pins =
809 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
810 };
811 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
812 atmel,pins =
813 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
814 };
815 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
816 atmel,pins =
817 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
818 };
819 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
820 atmel,pins =
821 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
822 };
823 };
824
825 spi0 {
826 pinctrl_spi0: spi0-0 {
827 atmel,pins =
828 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
829 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
830 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
831 };
832 };
833
834 spi1 {
835 pinctrl_spi1: spi1-0 {
836 atmel,pins =
837 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
838 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
839 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
840 };
841 };
842
843 ssc0 {
844 pinctrl_ssc0_tx: ssc0_tx {
845 atmel,pins =
846 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
847 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
848 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
849 };
850
851 pinctrl_ssc0_rx: ssc0_rx {
852 atmel,pins =
853 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
854 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
855 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
856 };
857 };
858
859 ssc1 {
860 pinctrl_ssc1_tx: ssc1_tx {
861 atmel,pins =
862 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
863 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
864 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
865 };
866
867 pinctrl_ssc1_rx: ssc1_rx {
868 atmel,pins =
869 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
870 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
871 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
872 };
873 };
874
875 uart0 {
876 pinctrl_uart0: uart0-0 {
877 atmel,pins =
878 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
879 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
880 };
881 };
882
883 uart1 {
884 pinctrl_uart1: uart1-0 {
885 atmel,pins =
886 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
887 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
888 };
889 };
890
891 usart0 {
892 pinctrl_usart0: usart0-0 {
893 atmel,pins =
894 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
895 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
896 };
897
898 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
899 atmel,pins =
900 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
901 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
902 };
903 };
904
905 usart1 {
906 pinctrl_usart1: usart1-0 {
907 atmel,pins =
908 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
909 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
910 };
911
912 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
913 atmel,pins =
914 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
915 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
916 };
917 };
918
919 usart2 {
920 pinctrl_usart2: usart2-0 {
921 atmel,pins =
922 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
923 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
924 };
925
926 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
927 atmel,pins =
928 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
929 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
930 };
931 };
932
933 usart3 {
934 pinctrl_usart3: usart3-0 {
935 atmel,pins =
936 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
937 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
938 };
939
940 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
941 atmel,pins =
942 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
943 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
944 };
945 };
946
947
948 pioA: gpio@fffff200 {
949 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
950 reg = <0xfffff200 0x100>;
951 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
952 #gpio-cells = <2>;
953 gpio-controller;
954 interrupt-controller;
955 #interrupt-cells = <2>;
956 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
957 };
958
959 pioB: gpio@fffff400 {
960 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
961 reg = <0xfffff400 0x100>;
962 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
963 #gpio-cells = <2>;
964 gpio-controller;
965 interrupt-controller;
966 #interrupt-cells = <2>;
967 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
968 };
969
970 pioC: gpio@fffff600 {
971 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
972 reg = <0xfffff600 0x100>;
973 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
974 #gpio-cells = <2>;
975 gpio-controller;
976 interrupt-controller;
977 #interrupt-cells = <2>;
978 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
979 };
980
981 pioD: gpio@fffff800 {
982 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
983 reg = <0xfffff800 0x100>;
984 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
985 #gpio-cells = <2>;
986 gpio-controller;
987 interrupt-controller;
988 #interrupt-cells = <2>;
989 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
990 };
991
992 pioE: gpio@fffffa00 {
993 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
994 reg = <0xfffffa00 0x100>;
995 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
996 #gpio-cells = <2>;
997 gpio-controller;
998 interrupt-controller;
999 #interrupt-cells = <2>;
1000 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
1001 };
1002 };
1003
1004 pmc: clock-controller@fffffc00 {
1005 compatible = "atmel,sama5d3-pmc", "syscon";
1006 reg = <0xfffffc00 0x120>;
1007 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1008 #clock-cells = <2>;
1009 clocks = <&clk32k>, <&main_xtal>;
1010 clock-names = "slow_clk", "main_xtal";
1011 };
1012
1013 reset_controller: reset-controller@fffffe00 {
1014 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1015 reg = <0xfffffe00 0x10>;
1016 clocks = <&clk32k>;
1017 };
1018
1019 shutdown_controller: poweroff@fffffe10 {
1020 compatible = "atmel,at91sam9x5-shdwc";
1021 reg = <0xfffffe10 0x10>;
1022 clocks = <&clk32k>;
1023 };
1024
1025 pit: timer@fffffe30 {
1026 compatible = "atmel,at91sam9260-pit";
1027 reg = <0xfffffe30 0xf>;
1028 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1029 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1030 };
1031
1032 watchdog: watchdog@fffffe40 {
1033 compatible = "atmel,at91sam9260-wdt";
1034 reg = <0xfffffe40 0x10>;
1035 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1036 clocks = <&clk32k>;
1037 atmel,watchdog-type = "hardware";
1038 atmel,reset-type = "all";
1039 atmel,dbg-halt;
1040 status = "disabled";
1041 };
1042
1043 clk32k: clock-controller@fffffe50 {
1044 compatible = "atmel,sama5d3-sckc";
1045 reg = <0xfffffe50 0x4>;
1046 clocks = <&slow_xtal>;
1047 #clock-cells = <0>;
1048 };
1049
1050 rtc@fffffeb0 {
1051 compatible = "atmel,at91rm9200-rtc";
1052 reg = <0xfffffeb0 0x30>;
1053 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1054 clocks = <&clk32k>;
1055 };
1056 };
1057
1058 nfc_sram: sram@200000 {
1059 compatible = "mmio-sram";
1060 no-memory-wc;
1061 reg = <0x200000 0x2400>;
1062 #address-cells = <1>;
1063 #size-cells = <1>;
1064 ranges = <0 0x200000 0x2400>;
1065 };
1066
1067 usb0: gadget@500000 {
1068 compatible = "atmel,sama5d3-udc";
1069 reg = <0x00500000 0x100000
1070 0xf8030000 0x4000>;
1071 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1072 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
1073 clock-names = "pclk", "hclk";
1074 status = "disabled";
1075 };
1076
1077 usb1: ohci@600000 {
1078 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1079 reg = <0x00600000 0x100000>;
1080 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1081 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>;
1082 clock-names = "ohci_clk", "hclk", "uhpck";
1083 status = "disabled";
1084 };
1085
1086 usb2: ehci@700000 {
1087 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1088 reg = <0x00700000 0x100000>;
1089 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1090 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>;
1091 clock-names = "usb_clk", "ehci_clk";
1092 status = "disabled";
1093 };
1094
1095 ebi: ebi@10000000 {
1096 compatible = "atmel,sama5d3-ebi";
1097 #address-cells = <2>;
1098 #size-cells = <1>;
1099 atmel,smc = <&hsmc>;
1100 reg = <0x10000000 0x10000000
1101 0x40000000 0x30000000>;
1102 ranges = <0x0 0x0 0x10000000 0x10000000
1103 0x1 0x0 0x40000000 0x10000000
1104 0x2 0x0 0x50000000 0x10000000
1105 0x3 0x0 0x60000000 0x10000000>;
1106 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1107 status = "disabled";
1108
1109 nand_controller: nand-controller {
1110 compatible = "atmel,sama5d3-nand-controller";
1111 atmel,nfc-sram = <&nfc_sram>;
1112 atmel,nfc-io = <&nfc_io>;
1113 ecc-engine = <&pmecc>;
1114 #address-cells = <2>;
1115 #size-cells = <1>;
1116 ranges;
1117 status = "disabled";
1118 };
1119 };
1120
1121 nfc_io: nfc-io@70000000 {
1122 compatible = "atmel,sama5d3-nfc-io", "syscon";
1123 reg = <0x70000000 0x8000000>;
1124 };
1125 };
1126 };
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