1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * This dts file supports Dalmore A04.
4 * Other board revisions are not supported
5 */
6
7 /dts-v1/;
8
9 #include <dt-bindings/input/input.h>
10 #include "tegra114.dtsi"
11
12 / {
13 model = "NVIDIA Tegra114 Dalmore evaluation board";
14 compatible = "nvidia,dalmore", "nvidia,tegra114";
15
16 aliases {
17 rtc0 = "/i2c@7000d000/tps65913@58";
18 rtc1 = "/rtc@7000e000";
19 serial0 = &uartd;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory@80000000 {
27 reg = <0x80000000 0x40000000>;
28 };
29
30 host1x@50000000 {
31 hdmi@54280000 {
32 status = "okay";
33
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
37
38 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
39 nvidia,hpd-gpio =
40 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
41 };
42
43 dsi@54300000 {
44 status = "okay";
45
46 avdd-dsi-csi-supply = <&avdd_1v2_reg>;
47
48 panel@0 {
49 compatible = "panasonic,vvx10f004b00";
50 reg = <0>;
51
52 power-supply = <&avdd_lcd_reg>;
53 backlight = <&backlight>;
54 };
55 };
56 };
57
58 pinmux@70000868 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&state_default>;
61
62 state_default: pinmux {
63 clk1_out_pw4 {
64 nvidia,pins = "clk1_out_pw4";
65 nvidia,function = "extperiph1";
66 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
67 nvidia,tristate = <TEGRA_PIN_DISABLE>;
68 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
69 };
70 dap1_din_pn1 {
71 nvidia,pins = "dap1_din_pn1";
72 nvidia,function = "i2s0";
73 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74 nvidia,tristate = <TEGRA_PIN_ENABLE>;
75 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76 };
77 dap1_dout_pn2 {
78 nvidia,pins = "dap1_dout_pn2",
79 "dap1_fs_pn0",
80 "dap1_sclk_pn3";
81 nvidia,function = "i2s0";
82 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83 nvidia,tristate = <TEGRA_PIN_DISABLE>;
84 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85 };
86 dap2_din_pa4 {
87 nvidia,pins = "dap2_din_pa4";
88 nvidia,function = "i2s1";
89 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90 nvidia,tristate = <TEGRA_PIN_ENABLE>;
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92 };
93 dap2_dout_pa5 {
94 nvidia,pins = "dap2_dout_pa5",
95 "dap2_fs_pa2",
96 "dap2_sclk_pa3";
97 nvidia,function = "i2s1";
98 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99 nvidia,tristate = <TEGRA_PIN_DISABLE>;
100 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101 };
102 dap4_din_pp5 {
103 nvidia,pins = "dap4_din_pp5",
104 "dap4_dout_pp6",
105 "dap4_fs_pp4",
106 "dap4_sclk_pp7";
107 nvidia,function = "i2s3";
108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
110 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
111 };
112 dvfs_pwm_px0 {
113 nvidia,pins = "dvfs_pwm_px0",
114 "dvfs_clk_px2";
115 nvidia,function = "cldvfs";
116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
118 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
119 };
120 ulpi_clk_py0 {
121 nvidia,pins = "ulpi_clk_py0",
122 "ulpi_data0_po1",
123 "ulpi_data1_po2",
124 "ulpi_data2_po3",
125 "ulpi_data3_po4",
126 "ulpi_data4_po5",
127 "ulpi_data5_po6",
128 "ulpi_data6_po7",
129 "ulpi_data7_po0";
130 nvidia,function = "ulpi";
131 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134 };
135 ulpi_dir_py1 {
136 nvidia,pins = "ulpi_dir_py1",
137 "ulpi_nxt_py2";
138 nvidia,function = "ulpi";
139 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140 nvidia,tristate = <TEGRA_PIN_ENABLE>;
141 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142 };
143 ulpi_stp_py3 {
144 nvidia,pins = "ulpi_stp_py3";
145 nvidia,function = "ulpi";
146 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
149 };
150 cam_i2c_scl_pbb1 {
151 nvidia,pins = "cam_i2c_scl_pbb1",
152 "cam_i2c_sda_pbb2";
153 nvidia,function = "i2c3";
154 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
157 nvidia,lock = <TEGRA_PIN_DISABLE>;
158 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
159 };
160 cam_mclk_pcc0 {
161 nvidia,pins = "cam_mclk_pcc0",
162 "pbb0";
163 nvidia,function = "vi_alt3";
164 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
167 nvidia,lock = <TEGRA_PIN_DISABLE>;
168 };
169 gen2_i2c_scl_pt5 {
170 nvidia,pins = "gen2_i2c_scl_pt5",
171 "gen2_i2c_sda_pt6";
172 nvidia,function = "i2c2";
173 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
174 nvidia,tristate = <TEGRA_PIN_DISABLE>;
175 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
176 nvidia,lock = <TEGRA_PIN_DISABLE>;
177 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
178 };
179 gmi_a16_pj7 {
180 nvidia,pins = "gmi_a16_pj7";
181 nvidia,function = "uartd";
182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
183 nvidia,tristate = <TEGRA_PIN_DISABLE>;
184 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
185 };
186 gmi_a17_pb0 {
187 nvidia,pins = "gmi_a17_pb0",
188 "gmi_a18_pb1";
189 nvidia,function = "uartd";
190 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
191 nvidia,tristate = <TEGRA_PIN_ENABLE>;
192 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193 };
194 gmi_a19_pk7 {
195 nvidia,pins = "gmi_a19_pk7";
196 nvidia,function = "uartd";
197 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198 nvidia,tristate = <TEGRA_PIN_DISABLE>;
199 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
200 };
201 gmi_ad5_pg5 {
202 nvidia,pins = "gmi_ad5_pg5",
203 "gmi_cs6_n_pi3",
204 "gmi_wr_n_pi0";
205 nvidia,function = "spi4";
206 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207 nvidia,tristate = <TEGRA_PIN_DISABLE>;
208 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209 };
210 gmi_ad6_pg6 {
211 nvidia,pins = "gmi_ad6_pg6",
212 "gmi_ad7_pg7";
213 nvidia,function = "spi4";
214 nvidia,pull = <TEGRA_PIN_PULL_UP>;
215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
216 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217 };
218 gmi_ad12_ph4 {
219 nvidia,pins = "gmi_ad12_ph4";
220 nvidia,function = "rsvd4";
221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222 nvidia,tristate = <TEGRA_PIN_DISABLE>;
223 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
224 };
225 gmi_ad9_ph1 {
226 nvidia,pins = "gmi_ad9_ph1";
227 nvidia,function = "pwm1";
228 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229 nvidia,tristate = <TEGRA_PIN_DISABLE>;
230 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
231 };
232 gmi_cs1_n_pj2 {
233 nvidia,pins = "gmi_cs1_n_pj2",
234 "gmi_oe_n_pi1";
235 nvidia,function = "soc";
236 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
237 nvidia,tristate = <TEGRA_PIN_ENABLE>;
238 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
239 };
240 clk2_out_pw5 {
241 nvidia,pins = "clk2_out_pw5";
242 nvidia,function = "extperiph2";
243 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
244 nvidia,tristate = <TEGRA_PIN_DISABLE>;
245 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
246 };
247 sdmmc1_clk_pz0 {
248 nvidia,pins = "sdmmc1_clk_pz0";
249 nvidia,function = "sdmmc1";
250 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251 nvidia,tristate = <TEGRA_PIN_DISABLE>;
252 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253 };
254 sdmmc1_cmd_pz1 {
255 nvidia,pins = "sdmmc1_cmd_pz1",
256 "sdmmc1_dat0_py7",
257 "sdmmc1_dat1_py6",
258 "sdmmc1_dat2_py5",
259 "sdmmc1_dat3_py4";
260 nvidia,function = "sdmmc1";
261 nvidia,pull = <TEGRA_PIN_PULL_UP>;
262 nvidia,tristate = <TEGRA_PIN_DISABLE>;
263 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
264 };
265 sdmmc1_wp_n_pv3 {
266 nvidia,pins = "sdmmc1_wp_n_pv3";
267 nvidia,function = "spi4";
268 nvidia,pull = <TEGRA_PIN_PULL_UP>;
269 nvidia,tristate = <TEGRA_PIN_DISABLE>;
270 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
271 };
272 sdmmc3_clk_pa6 {
273 nvidia,pins = "sdmmc3_clk_pa6";
274 nvidia,function = "sdmmc3";
275 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
276 nvidia,tristate = <TEGRA_PIN_DISABLE>;
277 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
278 };
279 sdmmc3_cmd_pa7 {
280 nvidia,pins = "sdmmc3_cmd_pa7",
281 "sdmmc3_dat0_pb7",
282 "sdmmc3_dat1_pb6",
283 "sdmmc3_dat2_pb5",
284 "sdmmc3_dat3_pb4",
285 "kb_col4_pq4",
286 "sdmmc3_clk_lb_out_pee4",
287 "sdmmc3_clk_lb_in_pee5";
288 nvidia,function = "sdmmc3";
289 nvidia,pull = <TEGRA_PIN_PULL_UP>;
290 nvidia,tristate = <TEGRA_PIN_DISABLE>;
291 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
292 };
293 sdmmc4_clk_pcc4 {
294 nvidia,pins = "sdmmc4_clk_pcc4";
295 nvidia,function = "sdmmc4";
296 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
297 nvidia,tristate = <TEGRA_PIN_DISABLE>;
298 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
299 };
300 sdmmc4_cmd_pt7 {
301 nvidia,pins = "sdmmc4_cmd_pt7",
302 "sdmmc4_dat0_paa0",
303 "sdmmc4_dat1_paa1",
304 "sdmmc4_dat2_paa2",
305 "sdmmc4_dat3_paa3",
306 "sdmmc4_dat4_paa4",
307 "sdmmc4_dat5_paa5",
308 "sdmmc4_dat6_paa6",
309 "sdmmc4_dat7_paa7";
310 nvidia,function = "sdmmc4";
311 nvidia,pull = <TEGRA_PIN_PULL_UP>;
312 nvidia,tristate = <TEGRA_PIN_DISABLE>;
313 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
314 };
315 clk_32k_out_pa0 {
316 nvidia,pins = "clk_32k_out_pa0";
317 nvidia,function = "blink";
318 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319 nvidia,tristate = <TEGRA_PIN_DISABLE>;
320 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
321 };
322 kb_col0_pq0 {
323 nvidia,pins = "kb_col0_pq0",
324 "kb_col1_pq1",
325 "kb_col2_pq2",
326 "kb_row0_pr0",
327 "kb_row1_pr1",
328 "kb_row2_pr2";
329 nvidia,function = "kbc";
330 nvidia,pull = <TEGRA_PIN_PULL_UP>;
331 nvidia,tristate = <TEGRA_PIN_DISABLE>;
332 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333 };
334 dap3_din_pp1 {
335 nvidia,pins = "dap3_din_pp1",
336 "dap3_sclk_pp3";
337 nvidia,function = "displayb";
338 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339 nvidia,tristate = <TEGRA_PIN_ENABLE>;
340 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341 };
342 pv0 {
343 nvidia,pins = "pv0";
344 nvidia,function = "rsvd4";
345 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
346 nvidia,tristate = <TEGRA_PIN_ENABLE>;
347 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348 };
349 kb_row7_pr7 {
350 nvidia,pins = "kb_row7_pr7";
351 nvidia,function = "rsvd2";
352 nvidia,pull = <TEGRA_PIN_PULL_UP>;
353 nvidia,tristate = <TEGRA_PIN_DISABLE>;
354 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
355 };
356 kb_row10_ps2 {
357 nvidia,pins = "kb_row10_ps2";
358 nvidia,function = "uarta";
359 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
360 nvidia,tristate = <TEGRA_PIN_ENABLE>;
361 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
362 };
363 kb_row9_ps1 {
364 nvidia,pins = "kb_row9_ps1";
365 nvidia,function = "uarta";
366 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
367 nvidia,tristate = <TEGRA_PIN_DISABLE>;
368 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369 };
370 pwr_i2c_scl_pz6 {
371 nvidia,pins = "pwr_i2c_scl_pz6",
372 "pwr_i2c_sda_pz7";
373 nvidia,function = "i2cpwr";
374 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
375 nvidia,tristate = <TEGRA_PIN_DISABLE>;
376 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
377 nvidia,lock = <TEGRA_PIN_DISABLE>;
378 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
379 };
380 sys_clk_req_pz5 {
381 nvidia,pins = "sys_clk_req_pz5";
382 nvidia,function = "sysclk";
383 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384 nvidia,tristate = <TEGRA_PIN_DISABLE>;
385 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
386 };
387 core_pwr_req {
388 nvidia,pins = "core_pwr_req";
389 nvidia,function = "pwron";
390 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
391 nvidia,tristate = <TEGRA_PIN_DISABLE>;
392 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
393 };
394 cpu_pwr_req {
395 nvidia,pins = "cpu_pwr_req";
396 nvidia,function = "cpu";
397 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
398 nvidia,tristate = <TEGRA_PIN_DISABLE>;
399 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
400 };
401 pwr_int_n {
402 nvidia,pins = "pwr_int_n";
403 nvidia,function = "pmi";
404 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
405 nvidia,tristate = <TEGRA_PIN_ENABLE>;
406 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
407 };
408 reset_out_n {
409 nvidia,pins = "reset_out_n";
410 nvidia,function = "reset_out_n";
411 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
412 nvidia,tristate = <TEGRA_PIN_DISABLE>;
413 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
414 };
415 clk3_out_pee0 {
416 nvidia,pins = "clk3_out_pee0";
417 nvidia,function = "extperiph3";
418 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
419 nvidia,tristate = <TEGRA_PIN_DISABLE>;
420 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
421 };
422 gen1_i2c_scl_pc4 {
423 nvidia,pins = "gen1_i2c_scl_pc4",
424 "gen1_i2c_sda_pc5";
425 nvidia,function = "i2c1";
426 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427 nvidia,tristate = <TEGRA_PIN_DISABLE>;
428 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
429 nvidia,lock = <TEGRA_PIN_DISABLE>;
430 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
431 };
432 uart2_cts_n_pj5 {
433 nvidia,pins = "uart2_cts_n_pj5";
434 nvidia,function = "uartb";
435 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
436 nvidia,tristate = <TEGRA_PIN_ENABLE>;
437 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
438 };
439 uart2_rts_n_pj6 {
440 nvidia,pins = "uart2_rts_n_pj6";
441 nvidia,function = "uartb";
442 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
443 nvidia,tristate = <TEGRA_PIN_DISABLE>;
444 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
445 };
446 uart2_rxd_pc3 {
447 nvidia,pins = "uart2_rxd_pc3";
448 nvidia,function = "irda";
449 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
450 nvidia,tristate = <TEGRA_PIN_ENABLE>;
451 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
452 };
453 uart2_txd_pc2 {
454 nvidia,pins = "uart2_txd_pc2";
455 nvidia,function = "irda";
456 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457 nvidia,tristate = <TEGRA_PIN_DISABLE>;
458 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
459 };
460 uart3_cts_n_pa1 {
461 nvidia,pins = "uart3_cts_n_pa1",
462 "uart3_rxd_pw7";
463 nvidia,function = "uartc";
464 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
465 nvidia,tristate = <TEGRA_PIN_ENABLE>;
466 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
467 };
468 uart3_rts_n_pc0 {
469 nvidia,pins = "uart3_rts_n_pc0",
470 "uart3_txd_pw6";
471 nvidia,function = "uartc";
472 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
473 nvidia,tristate = <TEGRA_PIN_DISABLE>;
474 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475 };
476 owr {
477 nvidia,pins = "owr";
478 nvidia,function = "owr";
479 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
480 nvidia,tristate = <TEGRA_PIN_DISABLE>;
481 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
482 };
483 hdmi_cec_pee3 {
484 nvidia,pins = "hdmi_cec_pee3";
485 nvidia,function = "cec";
486 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487 nvidia,tristate = <TEGRA_PIN_DISABLE>;
488 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
489 nvidia,lock = <TEGRA_PIN_DISABLE>;
490 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
491 };
492 ddc_scl_pv4 {
493 nvidia,pins = "ddc_scl_pv4",
494 "ddc_sda_pv5";
495 nvidia,function = "i2c4";
496 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
497 nvidia,tristate = <TEGRA_PIN_DISABLE>;
498 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
499 nvidia,lock = <TEGRA_PIN_DISABLE>;
500 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
501 };
502 spdif_in_pk6 {
503 nvidia,pins = "spdif_in_pk6";
504 nvidia,function = "usb";
505 nvidia,pull = <TEGRA_PIN_PULL_UP>;
506 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508 nvidia,lock = <TEGRA_PIN_DISABLE>;
509 };
510 usb_vbus_en0_pn4 {
511 nvidia,pins = "usb_vbus_en0_pn4";
512 nvidia,function = "usb";
513 nvidia,pull = <TEGRA_PIN_PULL_UP>;
514 nvidia,tristate = <TEGRA_PIN_DISABLE>;
515 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516 nvidia,lock = <TEGRA_PIN_DISABLE>;
517 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
518 };
519 gpio_x6_aud_px6 {
520 nvidia,pins = "gpio_x6_aud_px6";
521 nvidia,function = "spi6";
522 nvidia,pull = <TEGRA_PIN_PULL_UP>;
523 nvidia,tristate = <TEGRA_PIN_ENABLE>;
524 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
525 };
526 gpio_x4_aud_px4 {
527 nvidia,pins = "gpio_x4_aud_px4",
528 "gpio_x7_aud_px7";
529 nvidia,function = "rsvd1";
530 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
531 nvidia,tristate = <TEGRA_PIN_DISABLE>;
532 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
533 };
534 gpio_x5_aud_px5 {
535 nvidia,pins = "gpio_x5_aud_px5";
536 nvidia,function = "rsvd1";
537 nvidia,pull = <TEGRA_PIN_PULL_UP>;
538 nvidia,tristate = <TEGRA_PIN_DISABLE>;
539 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
540 };
541 gpio_w2_aud_pw2 {
542 nvidia,pins = "gpio_w2_aud_pw2";
543 nvidia,function = "rsvd2";
544 nvidia,pull = <TEGRA_PIN_PULL_UP>;
545 nvidia,tristate = <TEGRA_PIN_DISABLE>;
546 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
547 };
548 gpio_w3_aud_pw3 {
549 nvidia,pins = "gpio_w3_aud_pw3";
550 nvidia,function = "spi6";
551 nvidia,pull = <TEGRA_PIN_PULL_UP>;
552 nvidia,tristate = <TEGRA_PIN_DISABLE>;
553 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554 };
555 gpio_x1_aud_px1 {
556 nvidia,pins = "gpio_x1_aud_px1";
557 nvidia,function = "rsvd4";
558 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
559 nvidia,tristate = <TEGRA_PIN_DISABLE>;
560 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
561 };
562 gpio_x3_aud_px3 {
563 nvidia,pins = "gpio_x3_aud_px3";
564 nvidia,function = "rsvd4";
565 nvidia,pull = <TEGRA_PIN_PULL_UP>;
566 nvidia,tristate = <TEGRA_PIN_DISABLE>;
567 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568 };
569 dap3_fs_pp0 {
570 nvidia,pins = "dap3_fs_pp0";
571 nvidia,function = "i2s2";
572 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
573 nvidia,tristate = <TEGRA_PIN_DISABLE>;
574 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
575 };
576 dap3_dout_pp2 {
577 nvidia,pins = "dap3_dout_pp2";
578 nvidia,function = "i2s2";
579 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
580 nvidia,tristate = <TEGRA_PIN_DISABLE>;
581 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
582 };
583 pv1 {
584 nvidia,pins = "pv1";
585 nvidia,function = "rsvd1";
586 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
587 nvidia,tristate = <TEGRA_PIN_DISABLE>;
588 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589 };
590 pbb3 {
591 nvidia,pins = "pbb3",
592 "pbb5",
593 "pbb6",
594 "pbb7";
595 nvidia,function = "rsvd4";
596 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
597 nvidia,tristate = <TEGRA_PIN_DISABLE>;
598 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
599 };
600 pcc1 {
601 nvidia,pins = "pcc1",
602 "pcc2";
603 nvidia,function = "rsvd4";
604 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605 nvidia,tristate = <TEGRA_PIN_DISABLE>;
606 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607 };
608 gmi_ad0_pg0 {
609 nvidia,pins = "gmi_ad0_pg0",
610 "gmi_ad1_pg1";
611 nvidia,function = "gmi";
612 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613 nvidia,tristate = <TEGRA_PIN_DISABLE>;
614 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
615 };
616 gmi_ad10_ph2 {
617 nvidia,pins = "gmi_ad10_ph2",
618 "gmi_ad11_ph3",
619 "gmi_ad13_ph5",
620 "gmi_ad8_ph0",
621 "gmi_clk_pk1";
622 nvidia,function = "gmi";
623 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
624 nvidia,tristate = <TEGRA_PIN_DISABLE>;
625 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
626 };
627 gmi_ad2_pg2 {
628 nvidia,pins = "gmi_ad2_pg2",
629 "gmi_ad3_pg3";
630 nvidia,function = "gmi";
631 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
632 nvidia,tristate = <TEGRA_PIN_DISABLE>;
633 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634 };
635 gmi_adv_n_pk0 {
636 nvidia,pins = "gmi_adv_n_pk0",
637 "gmi_cs0_n_pj0",
638 "gmi_cs2_n_pk3",
639 "gmi_cs4_n_pk2",
640 "gmi_cs7_n_pi6",
641 "gmi_dqs_p_pj3",
642 "gmi_iordy_pi5",
643 "gmi_wp_n_pc7";
644 nvidia,function = "gmi";
645 nvidia,pull = <TEGRA_PIN_PULL_UP>;
646 nvidia,tristate = <TEGRA_PIN_DISABLE>;
647 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648 };
649 gmi_cs3_n_pk4 {
650 nvidia,pins = "gmi_cs3_n_pk4";
651 nvidia,function = "gmi";
652 nvidia,pull = <TEGRA_PIN_PULL_UP>;
653 nvidia,tristate = <TEGRA_PIN_DISABLE>;
654 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
655 };
656 clk2_req_pcc5 {
657 nvidia,pins = "clk2_req_pcc5";
658 nvidia,function = "rsvd4";
659 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
660 nvidia,tristate = <TEGRA_PIN_DISABLE>;
661 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662 };
663 kb_col3_pq3 {
664 nvidia,pins = "kb_col3_pq3",
665 "kb_col6_pq6",
666 "kb_col7_pq7";
667 nvidia,function = "kbc";
668 nvidia,pull = <TEGRA_PIN_PULL_UP>;
669 nvidia,tristate = <TEGRA_PIN_DISABLE>;
670 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
671 };
672 kb_col5_pq5 {
673 nvidia,pins = "kb_col5_pq5";
674 nvidia,function = "kbc";
675 nvidia,pull = <TEGRA_PIN_PULL_UP>;
676 nvidia,tristate = <TEGRA_PIN_DISABLE>;
677 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
678 };
679 kb_row3_pr3 {
680 nvidia,pins = "kb_row3_pr3",
681 "kb_row4_pr4",
682 "kb_row6_pr6",
683 "kb_row8_ps0";
684 nvidia,function = "kbc";
685 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
686 nvidia,tristate = <TEGRA_PIN_DISABLE>;
687 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
688 };
689 clk3_req_pee1 {
690 nvidia,pins = "clk3_req_pee1";
691 nvidia,function = "rsvd4";
692 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
693 nvidia,tristate = <TEGRA_PIN_DISABLE>;
694 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
695 };
696 pu4 {
697 nvidia,pins = "pu4";
698 nvidia,function = "displayb";
699 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
700 nvidia,tristate = <TEGRA_PIN_DISABLE>;
701 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
702 };
703 pu5 {
704 nvidia,pins = "pu5",
705 "pu6";
706 nvidia,function = "displayb";
707 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708 nvidia,tristate = <TEGRA_PIN_DISABLE>;
709 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710 };
711 hdmi_int_pn7 {
712 nvidia,pins = "hdmi_int_pn7";
713 nvidia,function = "rsvd1";
714 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
715 nvidia,tristate = <TEGRA_PIN_DISABLE>;
716 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717 };
718 clk1_req_pee2 {
719 nvidia,pins = "clk1_req_pee2",
720 "usb_vbus_en1_pn5";
721 nvidia,function = "rsvd4";
722 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
723 nvidia,tristate = <TEGRA_PIN_ENABLE>;
724 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
725 };
726
727 drive_sdio1 {
728 nvidia,pins = "drive_sdio1";
729 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
730 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
731 nvidia,pull-down-strength = <36>;
732 nvidia,pull-up-strength = <20>;
733 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
734 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
735 };
736 drive_sdio3 {
737 nvidia,pins = "drive_sdio3";
738 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
739 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
740 nvidia,pull-down-strength = <22>;
741 nvidia,pull-up-strength = <36>;
742 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
743 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
744 };
745 drive_gma {
746 nvidia,pins = "drive_gma";
747 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
748 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
749 nvidia,pull-down-strength = <2>;
750 nvidia,pull-up-strength = <1>;
751 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
752 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
753 };
754 };
755 };
756
757 serial@70006300 {
758 /delete-property/ dmas;
759 /delete-property/ dma-names;
760 status = "okay";
761 };
762
763 pwm@7000a000 {
764 status = "okay";
765 };
766
767 i2c@7000c000 {
768 status = "okay";
769 clock-frequency = <100000>;
770
771 battery: smart-battery@b {
772 compatible = "ti,bq20z45", "sbs,sbs-battery";
773 reg = <0xb>;
774 sbs,i2c-retry-count = <2>;
775 sbs,poll-retry-count = <100>;
776 power-supplies = <&charger>;
777 };
778
779 rt5640: rt5640@1c {
780 compatible = "realtek,rt5640";
781 reg = <0x1c>;
782 interrupt-parent = <&gpio>;
783 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
784 realtek,ldo1-en-gpios =
785 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
786 };
787
788 temperature-sensor@4c {
789 compatible = "onnn,nct1008";
790 reg = <0x4c>;
791 vcc-supply = <&palmas_ldo6_reg>;
792 interrupt-parent = <&gpio>;
793 interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_EDGE_FALLING>;
794 };
795 };
796
797 hdmi_ddc: i2c@7000c700 {
798 status = "okay";
799 };
800
801 i2c@7000d000 {
802 status = "okay";
803 clock-frequency = <400000>;
804
805 tps51632@43 {
806 compatible = "ti,tps51632";
807 reg = <0x43>;
808 regulator-name = "vdd-cpu";
809 regulator-min-microvolt = <500000>;
810 regulator-max-microvolt = <1520000>;
811 regulator-boot-on;
812 regulator-always-on;
813 };
814
815 tps65090@48 {
816 compatible = "ti,tps65090";
817 reg = <0x48>;
818 interrupt-parent = <&gpio>;
819 interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
820
821 vsys1-supply = <&vdd_ac_bat_reg>;
822 vsys2-supply = <&vdd_ac_bat_reg>;
823 vsys3-supply = <&vdd_ac_bat_reg>;
824 infet1-supply = <&vdd_ac_bat_reg>;
825 infet2-supply = <&vdd_ac_bat_reg>;
826 infet3-supply = <&tps65090_dcdc2_reg>;
827 infet4-supply = <&tps65090_dcdc2_reg>;
828 infet5-supply = <&tps65090_dcdc2_reg>;
829 infet6-supply = <&tps65090_dcdc2_reg>;
830 infet7-supply = <&tps65090_dcdc2_reg>;
831 vsys-l1-supply = <&vdd_ac_bat_reg>;
832 vsys-l2-supply = <&vdd_ac_bat_reg>;
833
834 charger: charger {
835 compatible = "ti,tps65090-charger";
836 ti,enable-low-current-chrg;
837 };
838
839 regulators {
840 tps65090_dcdc1_reg: dcdc1 {
841 regulator-name = "vdd-sys-5v0";
842 regulator-always-on;
843 regulator-boot-on;
844 };
845
846 tps65090_dcdc2_reg: dcdc2 {
847 regulator-name = "vdd-sys-3v3";
848 regulator-always-on;
849 regulator-boot-on;
850 };
851
852 tps65090_dcdc3_reg: dcdc3 {
853 regulator-name = "vdd-ao";
854 regulator-always-on;
855 regulator-boot-on;
856 };
857
858 vdd_bl_reg: fet1 {
859 regulator-name = "vdd-lcd-bl";
860 };
861
862 fet3 {
863 regulator-name = "vdd-modem-3v3";
864 };
865
866 avdd_lcd_reg: fet4 {
867 regulator-name = "avdd-lcd";
868 };
869
870 fet5 {
871 regulator-name = "vdd-lvds";
872 };
873
874 fet6 {
875 regulator-name = "vdd-sd-slot";
876 regulator-always-on;
877 regulator-boot-on;
878 };
879
880 fet7 {
881 regulator-name = "vdd-com-3v3";
882 };
883
884 ldo1 {
885 regulator-name = "vdd-sby-5v0";
886 regulator-always-on;
887 regulator-boot-on;
888 };
889
890 ldo2 {
891 regulator-name = "vdd-sby-3v3";
892 regulator-always-on;
893 regulator-boot-on;
894 };
895 };
896 };
897
898 palmas: tps65913@58 {
899 compatible = "ti,tps65913", "ti,palmas";
900 reg = <0x58>;
901 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
902
903 #interrupt-cells = <2>;
904 interrupt-controller;
905
906 ti,system-power-controller;
907
908 palmas_gpio: gpio {
909 compatible = "ti,palmas-gpio";
910 gpio-controller;
911 #gpio-cells = <2>;
912 };
913
914 pinmux {
915 compatible = "ti,tps65913-pinctrl";
916 pinctrl-names = "default";
917 pinctrl-0 = <&palmas_default>;
918
919 palmas_default: pinmux {
920 pin_gpio6 {
921 pins = "gpio6";
922 function = "gpio";
923 };
924 };
925 };
926
927 pmic {
928 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
929 smps1-in-supply = <&tps65090_dcdc3_reg>;
930 smps3-in-supply = <&tps65090_dcdc3_reg>;
931 smps4-in-supply = <&tps65090_dcdc2_reg>;
932 smps7-in-supply = <&tps65090_dcdc2_reg>;
933 smps8-in-supply = <&tps65090_dcdc2_reg>;
934 smps9-in-supply = <&tps65090_dcdc2_reg>;
935 ldo1-in-supply = <&tps65090_dcdc2_reg>;
936 ldo2-in-supply = <&tps65090_dcdc2_reg>;
937 ldo3-in-supply = <&palmas_smps3_reg>;
938 ldo4-in-supply = <&tps65090_dcdc2_reg>;
939 ldo5-in-supply = <&vdd_ac_bat_reg>;
940 ldo6-in-supply = <&tps65090_dcdc2_reg>;
941 ldo7-in-supply = <&tps65090_dcdc2_reg>;
942 ldo8-in-supply = <&tps65090_dcdc3_reg>;
943 ldo9-in-supply = <&palmas_smps9_reg>;
944 ldoln-in-supply = <&tps65090_dcdc1_reg>;
945 ldousb-in-supply = <&tps65090_dcdc1_reg>;
946
947 regulators {
948 smps12 {
949 regulator-name = "vddio-ddr";
950 regulator-min-microvolt = <1350000>;
951 regulator-max-microvolt = <1350000>;
952 regulator-always-on;
953 regulator-boot-on;
954 };
955
956 palmas_smps3_reg: smps3 {
957 regulator-name = "vddio-1v8";
958 regulator-min-microvolt = <1800000>;
959 regulator-max-microvolt = <1800000>;
960 regulator-always-on;
961 regulator-boot-on;
962 };
963
964 smps45 {
965 regulator-name = "vdd-core";
966 regulator-min-microvolt = <900000>;
967 regulator-max-microvolt = <1400000>;
968 regulator-always-on;
969 regulator-boot-on;
970 };
971
972 smps457 {
973 regulator-name = "vdd-core";
974 regulator-min-microvolt = <900000>;
975 regulator-max-microvolt = <1400000>;
976 regulator-always-on;
977 regulator-boot-on;
978 };
979
980 smps8 {
981 regulator-name = "avdd-pll";
982 regulator-min-microvolt = <1050000>;
983 regulator-max-microvolt = <1050000>;
984 regulator-always-on;
985 regulator-boot-on;
986 };
987
988 palmas_smps9_reg: smps9 {
989 regulator-name = "sdhci-vdd-sd-slot";
990 regulator-min-microvolt = <2800000>;
991 regulator-max-microvolt = <2800000>;
992 regulator-always-on;
993 };
994
995 ldo1 {
996 regulator-name = "avdd-cam1";
997 regulator-min-microvolt = <2800000>;
998 regulator-max-microvolt = <2800000>;
999 };
1000
1001 ldo2 {
1002 regulator-name = "avdd-cam2";
1003 regulator-min-microvolt = <2800000>;
1004 regulator-max-microvolt = <2800000>;
1005 };
1006
1007 avdd_1v2_reg: ldo3 {
1008 regulator-name = "avdd-dsi-csi";
1009 regulator-min-microvolt = <1200000>;
1010 regulator-max-microvolt = <1200000>;
1011 };
1012
1013 ldo4 {
1014 regulator-name = "vpp-fuse";
1015 regulator-min-microvolt = <1800000>;
1016 regulator-max-microvolt = <1800000>;
1017 };
1018
1019 palmas_ldo6_reg: ldo6 {
1020 regulator-name = "vdd-sensor-2v85";
1021 regulator-min-microvolt = <2850000>;
1022 regulator-max-microvolt = <2850000>;
1023 };
1024
1025 ldo7 {
1026 regulator-name = "vdd-af-cam1";
1027 regulator-min-microvolt = <2800000>;
1028 regulator-max-microvolt = <2800000>;
1029 };
1030
1031 ldo8 {
1032 regulator-name = "vdd-rtc";
1033 regulator-min-microvolt = <900000>;
1034 regulator-max-microvolt = <900000>;
1035 regulator-always-on;
1036 regulator-boot-on;
1037 ti,enable-ldo8-tracking;
1038 };
1039
1040 ldo9 {
1041 regulator-name = "vddio-sdmmc-2";
1042 regulator-min-microvolt = <1800000>;
1043 regulator-max-microvolt = <3300000>;
1044 regulator-always-on;
1045 regulator-boot-on;
1046 };
1047
1048 ldoln {
1049 regulator-name = "hvdd-usb";
1050 regulator-min-microvolt = <3300000>;
1051 regulator-max-microvolt = <3300000>;
1052 };
1053
1054 ldousb {
1055 regulator-name = "avdd-usb";
1056 regulator-min-microvolt = <3300000>;
1057 regulator-max-microvolt = <3300000>;
1058 regulator-always-on;
1059 regulator-boot-on;
1060 };
1061
1062 regen1 {
1063 regulator-name = "rail-3v3";
1064 regulator-max-microvolt = <3300000>;
1065 regulator-always-on;
1066 regulator-boot-on;
1067 };
1068
1069 regen2 {
1070 regulator-name = "rail-5v0";
1071 regulator-max-microvolt = <5000000>;
1072 regulator-always-on;
1073 regulator-boot-on;
1074 };
1075 };
1076 };
1077
1078 rtc {
1079 compatible = "ti,palmas-rtc";
1080 interrupt-parent = <&palmas>;
1081 interrupts = <8 0>;
1082 };
1083 };
1084 };
1085
1086 spi@7000da00 {
1087 status = "okay";
1088 spi-max-frequency = <25000000>;
1089
1090 flash@0 {
1091 compatible = "winbond,w25q32dw", "jedec,spi-nor";
1092 reg = <0>;
1093 spi-max-frequency = <20000000>;
1094 };
1095 };
1096
1097 pmc@7000e400 {
1098 nvidia,invert-interrupt;
1099 nvidia,suspend-mode = <1>;
1100 nvidia,cpu-pwr-good-time = <500>;
1101 nvidia,cpu-pwr-off-time = <300>;
1102 nvidia,core-pwr-good-time = <641 3845>;
1103 nvidia,core-pwr-off-time = <61036>;
1104 nvidia,core-power-req-active-high;
1105 nvidia,sys-clock-req-active-high;
1106 };
1107
1108 ahub@70080000 {
1109 i2s@70080400 {
1110 status = "okay";
1111 };
1112 };
1113
1114 mmc@78000400 {
1115 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1116 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1117 bus-width = <4>;
1118 status = "okay";
1119 };
1120
1121 mmc@78000600 {
1122 bus-width = <8>;
1123 status = "okay";
1124 non-removable;
1125 };
1126
1127 usb@7d000000 {
1128 compatible = "nvidia,tegra114-udc";
1129 status = "okay";
1130 dr_mode = "peripheral";
1131 };
1132
1133 usb-phy@7d000000 {
1134 status = "okay";
1135 };
1136
1137 usb@7d008000 {
1138 status = "okay";
1139 };
1140
1141 usb-phy@7d008000 {
1142 status = "okay";
1143 vbus-supply = <&usb3_vbus_reg>;
1144 };
1145
1146 backlight: backlight {
1147 compatible = "pwm-backlight";
1148
1149 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1150 power-supply = <&vdd_bl_reg>;
1151 pwms = <&pwm 1 1000000>;
1152
1153 brightness-levels = <0 4 8 16 32 64 128 255>;
1154 default-brightness-level = <6>;
1155 };
1156
1157 clk32k_in: clock-32k {
1158 compatible = "fixed-clock";
1159 clock-frequency = <32768>;
1160 #clock-cells = <0>;
1161 };
1162
1163 gpio-keys {
1164 compatible = "gpio-keys";
1165
1166 key-home {
1167 label = "Home";
1168 gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1169 linux,code = <KEY_HOME>;
1170 };
1171
1172 key-power {
1173 label = "Power";
1174 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1175 linux,code = <KEY_POWER>;
1176 wakeup-source;
1177 };
1178
1179 key-volume-down {
1180 label = "Volume Down";
1181 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1182 linux,code = <KEY_VOLUMEDOWN>;
1183 };
1184
1185 key-volume-up {
1186 label = "Volume Up";
1187 gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1188 linux,code = <KEY_VOLUMEUP>;
1189 };
1190 };
1191
1192 vdd_ac_bat_reg: regulator-acbat {
1193 compatible = "regulator-fixed";
1194 regulator-name = "vdd_ac_bat";
1195 regulator-min-microvolt = <5000000>;
1196 regulator-max-microvolt = <5000000>;
1197 regulator-always-on;
1198 };
1199
1200 dvdd_ts_reg: regulator-ts {
1201 compatible = "regulator-fixed";
1202 regulator-name = "dvdd_ts";
1203 regulator-min-microvolt = <1800000>;
1204 regulator-max-microvolt = <1800000>;
1205 enable-active-high;
1206 gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1207 };
1208
1209 usb1_vbus_reg: regulator-usb1 {
1210 compatible = "regulator-fixed";
1211 regulator-name = "usb1_vbus";
1212 regulator-min-microvolt = <5000000>;
1213 regulator-max-microvolt = <5000000>;
1214 enable-active-high;
1215 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1216 gpio-open-drain;
1217 vin-supply = <&tps65090_dcdc1_reg>;
1218 };
1219
1220 usb3_vbus_reg: regulator-usb3 {
1221 compatible = "regulator-fixed";
1222 regulator-name = "usb2_vbus";
1223 regulator-min-microvolt = <5000000>;
1224 regulator-max-microvolt = <5000000>;
1225 enable-active-high;
1226 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1227 gpio-open-drain;
1228 vin-supply = <&tps65090_dcdc1_reg>;
1229 };
1230
1231 vdd_hdmi_reg: regulator-hdmi {
1232 compatible = "regulator-fixed";
1233 regulator-name = "vdd_hdmi_5v0";
1234 regulator-min-microvolt = <5000000>;
1235 regulator-max-microvolt = <5000000>;
1236 vin-supply = <&tps65090_dcdc1_reg>;
1237 };
1238
1239 vdd_cam_1v8_reg: regulator-cam {
1240 compatible = "regulator-fixed";
1241 regulator-name = "vdd_cam_1v8_reg";
1242 regulator-min-microvolt = <1800000>;
1243 regulator-max-microvolt = <1800000>;
1244 enable-active-high;
1245 gpio = <&palmas_gpio 6 0>;
1246 };
1247
1248 vdd_5v0_hdmi: regulator-hdmicon {
1249 compatible = "regulator-fixed";
1250 regulator-name = "VDD_5V0_HDMI_CON";
1251 regulator-min-microvolt = <5000000>;
1252 regulator-max-microvolt = <5000000>;
1253 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1254 enable-active-high;
1255 vin-supply = <&tps65090_dcdc1_reg>;
1256 };
1257
1258 sound {
1259 compatible = "nvidia,tegra-audio-rt5640-dalmore",
1260 "nvidia,tegra-audio-rt5640";
1261 nvidia,model = "NVIDIA Tegra Dalmore";
1262
1263 nvidia,audio-routing =
1264 "Headphones", "HPOR",
1265 "Headphones", "HPOL",
1266 "Speakers", "SPORP",
1267 "Speakers", "SPORN",
1268 "Speakers", "SPOLP",
1269 "Speakers", "SPOLN",
1270 "Mic Jack", "MICBIAS1",
1271 "IN2P", "Mic Jack";
1272
1273 nvidia,i2s-controller = <&tegra_i2s1>;
1274 nvidia,audio-codec = <&rt5640>;
1275
1276 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1277
1278 clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1279 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1280 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1281 clock-names = "pll_a", "pll_a_out0", "mclk";
1282
1283 assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>,
1284 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1285
1286 assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1287 <&tegra_car TEGRA114_CLK_EXTERN1>;
1288 };
1289 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.