1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
8
9 #include "tegra30.dtsi"
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
12
13 / {
14 chassis-type = "handset";
15
16 aliases {
17 mmc0 = &sdmmc4; /* eMMC */
18 mmc1 = &sdmmc1; /* WiFi */
19
20 rtc0 = &pmic;
21 rtc1 = "/rtc@7000e000";
22
23 serial0 = &uartd; /* Console */
24 serial1 = &uartc; /* Bluetooth */
25 serial2 = &uartb; /* GPS */
26 };
27
28 /*
29 * The decompressor and also some bootloaders rely on a
30 * pre-existing /chosen node to be available to insert the
31 * command line and merge other ATAGS info.
32 */
33 chosen { };
34
35 firmware {
36 trusted-foundations {
37 compatible = "tlm,trusted-foundations";
38 tlm,version-major = <2>;
39 tlm,version-minor = <8>;
40 };
41 };
42
43 memory@80000000 {
44 reg = <0x80000000 0x40000000>;
45 };
46
47 reserved-memory {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 ranges;
51
52 linux,cma@80000000 {
53 compatible = "shared-dma-pool";
54 alloc-ranges = <0x80000000 0x30000000>;
55 size = <0x10000000>; /* 256MiB */
56 linux,cma-default;
57 reusable;
58 };
59
60 ramoops@bed00000 {
61 compatible = "ramoops";
62 reg = <0xbed00000 0x10000>; /* 64kB */
63 console-size = <0x8000>; /* 32kB */
64 record-size = <0x400>; /* 1kB */
65 ecc-size = <16>;
66 };
67
68 trustzone@bfe00000 {
69 reg = <0xbfe00000 0x200000>; /* 2MB */
70 no-map;
71 };
72 };
73
74 vde@6001a000 {
75 assigned-clocks = <&tegra_car TEGRA30_CLK_VDE>;
76 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_P>;
77 assigned-clock-rates = <408000000>;
78 };
79
80 pinmux@70000868 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&state_default>;
83
84 state_default: pinmux {
85 /* WLAN SDIO pinmux */
86 sdmmc1-clk {
87 nvidia,pins = "sdmmc1_clk_pz0";
88 nvidia,function = "sdmmc1";
89 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90 nvidia,tristate = <TEGRA_PIN_DISABLE>;
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92 };
93 sdmmc1-cmd {
94 nvidia,pins = "sdmmc1_cmd_pz1",
95 "sdmmc1_dat3_py4",
96 "sdmmc1_dat2_py5",
97 "sdmmc1_dat1_py6",
98 "sdmmc1_dat0_py7";
99 nvidia,function = "sdmmc1";
100 nvidia,pull = <TEGRA_PIN_PULL_UP>;
101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
102 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
103 };
104 wlan-reset {
105 nvidia,pins = "pv3";
106 nvidia,function = "rsvd2";
107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
110 };
111 wlan-host-wake {
112 nvidia,pins = "pu6";
113 nvidia,function = "pwm3";
114 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
115 nvidia,tristate = <TEGRA_PIN_DISABLE>;
116 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
117 };
118
119 /* GNSS UART-B pinmux */
120 gps-pwr-en {
121 nvidia,pins = "kb_row6_pr6";
122 nvidia,function = "kbc";
123 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
126 };
127 gps-ldo-en {
128 nvidia,pins = "ulpi_dir_py1";
129 nvidia,function = "rsvd2";
130 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
133 };
134 gps-clk-ref {
135 nvidia,pins = "gmi_ad8_ph0";
136 nvidia,function = "gmi";
137 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
138 nvidia,tristate = <TEGRA_PIN_DISABLE>;
139 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
140 };
141
142 /* Bluetooth UART-C pinmux */
143 uartc-cts-rxd {
144 nvidia,pins = "uart3_cts_n_pa1",
145 "uart3_rxd_pw7";
146 nvidia,function = "uartc";
147 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
150 };
151 uartc-rts-txd {
152 nvidia,pins = "uart3_rts_n_pc0",
153 "uart3_txd_pw6";
154 nvidia,function = "uartc";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
157 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
158 };
159 bt-reset {
160 nvidia,pins = "clk2_req_pcc5";
161 nvidia,function = "dap";
162 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
163 nvidia,tristate = <TEGRA_PIN_DISABLE>;
164 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
165 };
166 bt-dev-wake {
167 nvidia,pins = "kb_row11_ps3";
168 nvidia,function = "kbc";
169 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
170 nvidia,tristate = <TEGRA_PIN_DISABLE>;
171 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
172 };
173 bt-host-wake {
174 nvidia,pins = "kb_row12_ps4";
175 nvidia,function = "kbc";
176 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
177 nvidia,tristate = <TEGRA_PIN_DISABLE>;
178 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
179 };
180 bt-pcm-dap4 {
181 nvidia,pins = "dap4_fs_pp4",
182 "dap4_din_pp5",
183 "dap4_dout_pp6",
184 "dap4_sclk_pp7";
185 nvidia,function = "i2s3";
186 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
187 nvidia,tristate = <TEGRA_PIN_DISABLE>;
188 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
189 };
190
191 /* EMMC pinmux */
192 sdmmc4-clk {
193 nvidia,pins = "sdmmc4_clk_pcc4";
194 nvidia,function = "sdmmc4";
195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
197 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
198 };
199 sdmmc4-data {
200 nvidia,pins = "sdmmc4_cmd_pt7",
201 "sdmmc4_dat0_paa0",
202 "sdmmc4_dat1_paa1",
203 "sdmmc4_dat2_paa2",
204 "sdmmc4_dat3_paa3",
205 "sdmmc4_dat4_paa4",
206 "sdmmc4_dat5_paa5",
207 "sdmmc4_dat6_paa6",
208 "sdmmc4_dat7_paa7";
209 nvidia,function = "sdmmc4";
210 nvidia,pull = <TEGRA_PIN_PULL_UP>;
211 nvidia,tristate = <TEGRA_PIN_DISABLE>;
212 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
213 };
214 sdmmc4-reset {
215 nvidia,pins = "sdmmc4_rst_n_pcc3";
216 nvidia,function = "rsvd2";
217 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
218 nvidia,tristate = <TEGRA_PIN_DISABLE>;
219 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
220 };
221
222 /* I2C pinmux */
223 gen1-i2c {
224 nvidia,pins = "gen1_i2c_scl_pc4",
225 "gen1_i2c_sda_pc5";
226 nvidia,function = "i2c1";
227 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
228 nvidia,tristate = <TEGRA_PIN_DISABLE>;
229 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
230 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
231 nvidia,lock = <TEGRA_PIN_DISABLE>;
232 };
233 gen2-i2c {
234 nvidia,pins = "gen2_i2c_scl_pt5",
235 "gen2_i2c_sda_pt6";
236 nvidia,function = "i2c2";
237 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
238 nvidia,tristate = <TEGRA_PIN_DISABLE>;
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
240 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
241 nvidia,lock = <TEGRA_PIN_DISABLE>;
242 };
243 cam-i2c {
244 nvidia,pins = "cam_i2c_scl_pbb1",
245 "cam_i2c_sda_pbb2";
246 nvidia,function = "i2c3";
247 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248 nvidia,tristate = <TEGRA_PIN_DISABLE>;
249 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
250 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
251 nvidia,lock = <TEGRA_PIN_DISABLE>;
252 };
253 ddc-i2c {
254 nvidia,pins = "ddc_scl_pv4",
255 "ddc_sda_pv5";
256 nvidia,function = "i2c4";
257 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 nvidia,lock = <TEGRA_PIN_DISABLE>;
261 };
262 pwr-i2c {
263 nvidia,pins = "pwr_i2c_scl_pz6",
264 "pwr_i2c_sda_pz7";
265 nvidia,function = "i2cpwr";
266 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267 nvidia,tristate = <TEGRA_PIN_DISABLE>;
268 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
270 nvidia,lock = <TEGRA_PIN_DISABLE>;
271 };
272 mhl-i2c {
273 nvidia,pins = "kb_col6_pq6",
274 "kb_col7_pq7";
275 nvidia,function = "kbc";
276 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
277 nvidia,tristate = <TEGRA_PIN_DISABLE>;
278 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
279 };
280
281 /* GPIO keys pinmux */
282 power-key {
283 nvidia,pins = "gmi_wp_n_pc7";
284 nvidia,function = "gmi";
285 nvidia,pull = <TEGRA_PIN_PULL_UP>;
286 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
288 };
289 volume-down {
290 nvidia,pins = "ulpi_data3_po4";
291 nvidia,function = "spi3";
292 nvidia,pull = <TEGRA_PIN_PULL_UP>;
293 nvidia,tristate = <TEGRA_PIN_DISABLE>;
294 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
295 };
296
297 /* Sensors pinmux */
298 sen-vdd {
299 nvidia,pins = "spi1_miso_px7";
300 nvidia,function = "rsvd4";
301 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
302 nvidia,tristate = <TEGRA_PIN_DISABLE>;
303 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
304 };
305 proxi-vdd {
306 nvidia,pins = "spi2_miso_px1";
307 nvidia,function = "gmi";
308 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309 nvidia,tristate = <TEGRA_PIN_DISABLE>;
310 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
311 };
312 sen-vio {
313 nvidia,pins = "lcd_dc1_pd2";
314 nvidia,function = "rsvd4";
315 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
318 };
319 nct-irq {
320 nvidia,pins = "gmi_iordy_pi5";
321 nvidia,function = "rsvd1";
322 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325 };
326 bat-irq {
327 nvidia,pins = "kb_row8_ps0";
328 nvidia,function = "kbc";
329 nvidia,pull = <TEGRA_PIN_PULL_UP>;
330 nvidia,tristate = <TEGRA_PIN_DISABLE>;
331 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332 };
333 charger-irq {
334 nvidia,pins = "gmi_cs1_n_pj2";
335 nvidia,function = "rsvd1";
336 nvidia,pull = <TEGRA_PIN_PULL_UP>;
337 nvidia,tristate = <TEGRA_PIN_DISABLE>;
338 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339 };
340 mpu-irq {
341 nvidia,pins = "gmi_ad12_ph4";
342 nvidia,function = "rsvd1";
343 nvidia,pull = <TEGRA_PIN_PULL_UP>;
344 nvidia,tristate = <TEGRA_PIN_DISABLE>;
345 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
346 };
347 compass-irq {
348 nvidia,pins = "gmi_ad13_ph5";
349 nvidia,function = "rsvd1";
350 nvidia,pull = <TEGRA_PIN_PULL_UP>;
351 nvidia,tristate = <TEGRA_PIN_DISABLE>;
352 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
353 };
354 light-irq {
355 nvidia,pins = "gmi_cs4_n_pk2";
356 nvidia,function = "rsvd1";
357 nvidia,pull = <TEGRA_PIN_PULL_UP>;
358 nvidia,tristate = <TEGRA_PIN_DISABLE>;
359 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
360 };
361
362 /* LED pinmux */
363 backlight-en {
364 nvidia,pins = "lcd_dc0_pn6";
365 nvidia,function = "rsvd3";
366 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
367 nvidia,tristate = <TEGRA_PIN_DISABLE>;
368 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369 };
370 flash-led-en {
371 nvidia,pins = "pbb3";
372 nvidia,function = "vgp3";
373 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
374 nvidia,tristate = <TEGRA_PIN_DISABLE>;
375 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
376 };
377 keypad-led {
378 nvidia,pins = "kb_row2_pr2",
379 "kb_row3_pr3";
380 nvidia,function = "rsvd3";
381 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
382 nvidia,tristate = <TEGRA_PIN_DISABLE>;
383 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
384 };
385
386 /* NFC pinmux */
387 nfc-irq {
388 nvidia,pins = "spi2_cs1_n_pw2";
389 nvidia,function = "spi2";
390 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
391 nvidia,tristate = <TEGRA_PIN_DISABLE>;
392 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
393 };
394 nfc-ven {
395 nvidia,pins = "spi1_sck_px5";
396 nvidia,function = "spi1";
397 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
398 nvidia,tristate = <TEGRA_PIN_DISABLE>;
399 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
400 };
401 nfc-firm {
402 nvidia,pins = "kb_row0_pr0";
403 nvidia,function = "rsvd4";
404 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
405 nvidia,tristate = <TEGRA_PIN_DISABLE>;
406 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
407 };
408
409 /* DC pinmux */
410 lcd-pwr {
411 nvidia,pins = "lcd_pwr0_pb2",
412 "lcd_pwr1_pc1";
413 nvidia,function = "displaya";
414 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
415 nvidia,tristate = <TEGRA_PIN_DISABLE>;
416 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
417 };
418 lcd-wr-n {
419 nvidia,pins = "lcd_wr_n_pz3";
420 nvidia,function = "displaya";
421 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
422 nvidia,tristate = <TEGRA_PIN_DISABLE>;
423 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
424 };
425 lcd-id {
426 nvidia,pins = "lcd_m1_pw1";
427 nvidia,function = "displaya";
428 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
429 nvidia,tristate = <TEGRA_PIN_ENABLE>;
430 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
431 };
432 lcd-pclk {
433 nvidia,pins = "lcd_pclk_pb3",
434 "lcd_de_pj1",
435 "lcd_hsync_pj3",
436 "lcd_vsync_pj4";
437 nvidia,function = "displaya";
438 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
439 nvidia,tristate = <TEGRA_PIN_DISABLE>;
440 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
441 };
442 lcd-rgb-blue {
443 nvidia,pins = "lcd_d0_pe0",
444 "lcd_d1_pe1",
445 "lcd_d2_pe2",
446 "lcd_d3_pe3",
447 "lcd_d4_pe4",
448 "lcd_d5_pe5",
449 "lcd_d18_pm2",
450 "lcd_d19_pm3";
451 nvidia,function = "displaya";
452 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
453 nvidia,tristate = <TEGRA_PIN_DISABLE>;
454 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
455 };
456 lcd-rgb-green {
457 nvidia,pins = "lcd_d6_pe6",
458 "lcd_d7_pe7",
459 "lcd_d8_pf0",
460 "lcd_d9_pf1",
461 "lcd_d10_pf2",
462 "lcd_d11_pf3",
463 "lcd_d20_pm4",
464 "lcd_d21_pm5";
465 nvidia,function = "displaya";
466 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
467 nvidia,tristate = <TEGRA_PIN_DISABLE>;
468 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
469 };
470 lcd-rgb-red {
471 nvidia,pins = "lcd_d12_pf4",
472 "lcd_d13_pf5",
473 "lcd_d14_pf6",
474 "lcd_d15_pf7",
475 "lcd_d16_pm0",
476 "lcd_d17_pm1",
477 "lcd_d22_pm6",
478 "lcd_d23_pm7";
479 nvidia,function = "displaya";
480 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481 nvidia,tristate = <TEGRA_PIN_DISABLE>;
482 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483 };
484
485 /* Bridge pinmux */
486 bridge-reset {
487 nvidia,pins = "ulpi_data1_po2";
488 nvidia,function = "spi3";
489 nvidia,pull = <TEGRA_PIN_PULL_UP>;
490 nvidia,tristate = <TEGRA_PIN_DISABLE>;
491 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
492 };
493 rgb-ic-en {
494 nvidia,pins = "gmi_a18_pb1";
495 nvidia,function = "uartd";
496 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
497 nvidia,tristate = <TEGRA_PIN_DISABLE>;
498 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
499 };
500 bridge-clk {
501 nvidia,pins = "clk3_out_pee0";
502 nvidia,function = "extperiph3";
503 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
504 nvidia,tristate = <TEGRA_PIN_DISABLE>;
505 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
506 };
507 rgb-bridge {
508 nvidia,pins = "lcd_sdin_pz2",
509 "lcd_sdout_pn5",
510 "lcd_cs0_n_pn4",
511 "lcd_sck_pz4";
512 nvidia,function = "spi5";
513 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
514 nvidia,tristate = <TEGRA_PIN_DISABLE>;
515 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516 };
517
518 /* Panel pinmux */
519 panel-reset {
520 nvidia,pins = "lcd_cs1_n_pw0";
521 nvidia,function = "rsvd4";
522 nvidia,pull = <TEGRA_PIN_PULL_UP>;
523 nvidia,tristate = <TEGRA_PIN_DISABLE>;
524 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
525 };
526 panel-vio {
527 nvidia,pins = "ulpi_clk_py0";
528 nvidia,function = "rsvd2";
529 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
530 nvidia,tristate = <TEGRA_PIN_DISABLE>;
531 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
532 };
533
534 /* Touchscreen pinmux */
535 touch-vdd {
536 nvidia,pins = "kb_col1_pq1";
537 nvidia,function = "kbc";
538 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
539 nvidia,tristate = <TEGRA_PIN_DISABLE>;
540 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
541 };
542 touch-vio {
543 nvidia,pins = "spi1_mosi_px4";
544 nvidia,function = "spi2";
545 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
546 nvidia,tristate = <TEGRA_PIN_DISABLE>;
547 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
548 };
549 touch-irq-n {
550 nvidia,pins = "kb_col3_pq3";
551 nvidia,function = "kbc";
552 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
553 nvidia,tristate = <TEGRA_PIN_DISABLE>;
554 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
555 };
556 touch-rst-n {
557 nvidia,pins = "ulpi_data0_po1";
558 nvidia,function = "spi3";
559 nvidia,pull = <TEGRA_PIN_PULL_UP>;
560 nvidia,tristate = <TEGRA_PIN_ENABLE>;
561 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
562 };
563 touch-maker-id {
564 nvidia,pins = "kb_col2_pq2";
565 nvidia,function = "kbc";
566 nvidia,pull = <TEGRA_PIN_PULL_UP>;
567 nvidia,tristate = <TEGRA_PIN_DISABLE>;
568 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
569 };
570
571 /* MHL pinmux */
572 mhl-vio {
573 nvidia,pins = "pv2";
574 nvidia,function = "owr";
575 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
576 nvidia,tristate = <TEGRA_PIN_DISABLE>;
577 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
578 };
579 mhl-rst-n {
580 nvidia,pins = "clk3_req_pee1";
581 nvidia,function = "dev3";
582 nvidia,pull = <TEGRA_PIN_PULL_UP>;
583 nvidia,tristate = <TEGRA_PIN_DISABLE>;
584 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
585 };
586 mhl-irq {
587 nvidia,pins = "crt_vsync_pv7";
588 nvidia,function = "rsvd2";
589 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
590 nvidia,tristate = <TEGRA_PIN_DISABLE>;
591 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
592 };
593 mhl-sel {
594 nvidia,pins = "kb_row10_ps2";
595 nvidia,function = "kbc";
596 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
597 nvidia,tristate = <TEGRA_PIN_DISABLE>;
598 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
599 };
600 hdmi-hpd {
601 nvidia,pins = "hdmi_int_pn7";
602 nvidia,function = "hdmi";
603 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
604 nvidia,tristate = <TEGRA_PIN_ENABLE>;
605 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
606 };
607
608 /* AUDIO pinmux */
609 hp-detect {
610 nvidia,pins = "pbb6";
611 nvidia,function = "vgp6";
612 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613 nvidia,tristate = <TEGRA_PIN_DISABLE>;
614 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
615 };
616 hp-hook {
617 nvidia,pins = "ulpi_data4_po5";
618 nvidia,function = "ulpi";
619 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
620 nvidia,tristate = <TEGRA_PIN_DISABLE>;
621 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
622 };
623 ear-mic-en {
624 nvidia,pins = "spi2_mosi_px0";
625 nvidia,function = "spi2";
626 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
627 nvidia,tristate = <TEGRA_PIN_DISABLE>;
628 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
629 };
630 audio-irq {
631 nvidia,pins = "spi2_cs2_n_pw3";
632 nvidia,function = "spi3";
633 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
634 nvidia,tristate = <TEGRA_PIN_DISABLE>;
635 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
636 };
637 audio-mclk {
638 nvidia,pins = "clk1_out_pw4";
639 nvidia,function = "extperiph1";
640 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
641 nvidia,tristate = <TEGRA_PIN_DISABLE>;
642 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
643 };
644 dap-i2s0 {
645 nvidia,pins = "dap1_fs_pn0",
646 "dap1_din_pn1",
647 "dap1_dout_pn2",
648 "dap1_sclk_pn3";
649 nvidia,function = "i2s0";
650 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
651 nvidia,tristate = <TEGRA_PIN_DISABLE>;
652 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
653 };
654 dap-i2s1 {
655 nvidia,pins = "dap2_fs_pa2",
656 "dap2_sclk_pa3",
657 "dap2_din_pa4",
658 "dap2_dout_pa5";
659 nvidia,function = "i2s1";
660 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
661 nvidia,tristate = <TEGRA_PIN_DISABLE>;
662 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
663 };
664
665 /* MUIC pinmux */
666 muic-irq {
667 nvidia,pins = "gmi_cs0_n_pj0";
668 nvidia,function = "gmi";
669 nvidia,pull = <TEGRA_PIN_PULL_UP>;
670 nvidia,tristate = <TEGRA_PIN_DISABLE>;
671 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
672 };
673 muic-dp2t {
674 nvidia,pins = "pcc2";
675 nvidia,function = "rsvd2";
676 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
677 nvidia,tristate = <TEGRA_PIN_DISABLE>;
678 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
679 };
680 muic-usif {
681 nvidia,pins = "ulpi_stp_py3";
682 nvidia,function = "spi1";
683 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
684 nvidia,tristate = <TEGRA_PIN_DISABLE>;
685 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
686 };
687 ifx-usb-vbus-en {
688 nvidia,pins = "kb_row4_pr4";
689 nvidia,function = "rsvd4";
690 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
691 nvidia,tristate = <TEGRA_PIN_DISABLE>;
692 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
693 };
694 pcb-rev {
695 nvidia,pins = "gmi_wait_pi7",
696 "gmi_rst_n_pi4";
697 nvidia,function = "gmi";
698 nvidia,pull = <TEGRA_PIN_PULL_UP>;
699 nvidia,tristate = <TEGRA_PIN_DISABLE>;
700 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
701 };
702 jtag-rtck {
703 nvidia,pins = "jtag_rtck_pu7";
704 nvidia,function = "rtck";
705 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
706 nvidia,tristate = <TEGRA_PIN_DISABLE>;
707 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
708 };
709
710 /* Camera pinmux */
711 cam-mclk {
712 nvidia,pins = "cam_mclk_pcc0";
713 nvidia,function = "vi_alt3";
714 nvidia,pull = <TEGRA_PIN_PULL_UP>;
715 nvidia,tristate = <TEGRA_PIN_DISABLE>;
716 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717 };
718 cam-pmic-en {
719 nvidia,pins = "pbb4";
720 nvidia,function = "vgp4";
721 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
722 nvidia,tristate = <TEGRA_PIN_DISABLE>;
723 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
724 };
725 front-cam-rst {
726 nvidia,pins = "pbb5";
727 nvidia,function = "vgp5";
728 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
729 nvidia,tristate = <TEGRA_PIN_DISABLE>;
730 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
731 };
732 front-cam-vio {
733 nvidia,pins = "ulpi_nxt_py2";
734 nvidia,function = "rsvd2";
735 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
736 nvidia,tristate = <TEGRA_PIN_DISABLE>;
737 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
738 };
739 rear-cam-rst {
740 nvidia,pins = "gmi_cs3_n_pk4";
741 nvidia,function = "rsvd1";
742 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
743 nvidia,tristate = <TEGRA_PIN_DISABLE>;
744 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
745 };
746 rear-cam-eprom-pr {
747 nvidia,pins = "gmi_cs2_n_pk3";
748 nvidia,function = "rsvd1";
749 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750 nvidia,tristate = <TEGRA_PIN_DISABLE>;
751 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
752 };
753 rear-cam-vcm-pwdn {
754 nvidia,pins = "kb_row1_pr1";
755 nvidia,function = "kbc";
756 nvidia,pull = <TEGRA_PIN_PULL_UP>;
757 nvidia,tristate = <TEGRA_PIN_DISABLE>;
758 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
759 };
760
761 /* Haptic pinmux */
762 haptic-en {
763 nvidia,pins = "gmi_ad9_ph1";
764 nvidia,function = "gmi";
765 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
766 nvidia,tristate = <TEGRA_PIN_DISABLE>;
767 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768 };
769 haptic-osc {
770 nvidia,pins = "gmi_ad11_ph3";
771 nvidia,function = "pwm3";
772 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
773 nvidia,tristate = <TEGRA_PIN_DISABLE>;
774 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
775 };
776
777 /* Modem pinmux */
778 cp2ap-ack1-host-active {
779 nvidia,pins = "pu5";
780 nvidia,function = "rsvd4";
781 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
782 nvidia,tristate = <TEGRA_PIN_DISABLE>;
783 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
784 };
785 cp2ap-ack2-host-wakeup {
786 nvidia,pins = "pv0";
787 nvidia,function = "rsvd4";
788 nvidia,pull = <TEGRA_PIN_PULL_UP>;
789 nvidia,tristate = <TEGRA_PIN_DISABLE>;
790 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
791 };
792 ap2cp-ack2-suspend-req {
793 nvidia,pins = "kb_row14_ps6";
794 nvidia,function = "kbc";
795 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
796 nvidia,tristate = <TEGRA_PIN_DISABLE>;
797 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
798 };
799 ap2cp-ack1-slave-wakeup {
800 nvidia,pins = "kb_row15_ps7";
801 nvidia,function = "kbc";
802 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
803 nvidia,tristate = <TEGRA_PIN_DISABLE>;
804 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
805 };
806 cp-kkp {
807 nvidia,pins = "kb_col0_pq0";
808 nvidia,function = "kbc";
809 nvidia,pull = <TEGRA_PIN_PULL_UP>;
810 nvidia,tristate = <TEGRA_PIN_DISABLE>;
811 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
812 };
813 cp-crash-irq {
814 nvidia,pins = "kb_row13_ps5";
815 nvidia,function = "kbc";
816 nvidia,pull = <TEGRA_PIN_PULL_UP>;
817 nvidia,tristate = <TEGRA_PIN_DISABLE>;
818 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
819 };
820 ap2cp-uarta-tx-ipc {
821 nvidia,pins = "pu0";
822 nvidia,function = "uarta";
823 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
824 nvidia,tristate = <TEGRA_PIN_DISABLE>;
825 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
826 };
827 ap2cp-uarta-rx-ipc {
828 nvidia,pins = "pu1";
829 nvidia,function = "uarta";
830 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
831 nvidia,tristate = <TEGRA_PIN_DISABLE>;
832 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
833 };
834 fota-ap-cts-cp-rts {
835 nvidia,pins = "pu2";
836 nvidia,function = "uarta";
837 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
838 nvidia,tristate = <TEGRA_PIN_ENABLE>;
839 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
840 };
841 fota-ap-rts-cp-cts {
842 nvidia,pins = "pu3";
843 nvidia,function = "uarta";
844 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
845 nvidia,tristate = <TEGRA_PIN_ENABLE>;
846 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
847 };
848 modem-enable {
849 nvidia,pins = "ulpi_data7_po0";
850 nvidia,function = "hsi";
851 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
852 nvidia,tristate = <TEGRA_PIN_DISABLE>;
853 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
854 };
855 modem-reset {
856 nvidia,pins = "pv1";
857 nvidia,function = "rsvd1";
858 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
859 nvidia,tristate = <TEGRA_PIN_DISABLE>;
860 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
861 };
862 dap-i2s2 {
863 nvidia,pins = "dap3_fs_pp0",
864 "dap3_din_pp1",
865 "dap3_dout_pp2",
866 "dap3_sclk_pp3";
867 nvidia,function = "i2s2";
868 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869 nvidia,tristate = <TEGRA_PIN_DISABLE>;
870 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871 };
872
873 /* GPIO power/drive control */
874 drive-i2c {
875 nvidia,pins = "drive_dbg",
876 "drive_at5",
877 "drive_gme",
878 "drive_ddc",
879 "drive_ao1";
880 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
881 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
882 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
883 nvidia,pull-down-strength = <31>;
884 nvidia,pull-up-strength = <31>;
885 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
886 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
887 };
888
889 drive-uart3 {
890 nvidia,pins = "drive_uart3";
891 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
892 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
893 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
894 nvidia,pull-down-strength = <31>;
895 nvidia,pull-up-strength = <31>;
896 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
897 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
898 };
899
900 drive-gmi {
901 nvidia,pins = "drive_at3";
902 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
903 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
904 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
905 nvidia,pull-down-strength = <31>;
906 nvidia,pull-up-strength = <31>;
907 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
908 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
909 };
910 };
911 };
912
913 uartb: serial@70006040 {
914 compatible = "nvidia,tegra30-hsuart";
915 reset-names = "serial";
916 /delete-property/ reg-shift;
917 status = "okay";
918
919 /* GNSS GSD5T */
920 };
921
922 uartc: serial@70006200 {
923 compatible = "nvidia,tegra30-hsuart";
924 reset-names = "serial";
925 /delete-property/ reg-shift;
926 status = "okay";
927
928 nvidia,adjust-baud-rates = <0 9600 100>,
929 <9600 115200 200>,
930 <1000000 4000000 136>;
931
932 /* BCM4330B1 37.4 MHz Class 1.5 ExtLNA */
933 bluetooth {
934 compatible = "brcm,bcm4330-bt";
935 max-speed = <4000000>;
936
937 clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
938 clock-names = "txco";
939
940 interrupt-parent = <&gpio>;
941 interrupts = <TEGRA_GPIO(S, 4) IRQ_TYPE_EDGE_RISING>;
942 interrupt-names = "host-wakeup";
943
944 device-wakeup-gpios = <&gpio TEGRA_GPIO(S, 3) GPIO_ACTIVE_HIGH>;
945 shutdown-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
946
947 vbat-supply = <&vdd_3v3_vbat>;
948 vddio-supply = <&vdd_1v8_vio>;
949 };
950 };
951
952 uartd: serial@70006300 {
953 /delete-property/ dmas;
954 /delete-property/ dma-names;
955 status = "okay";
956
957 /* Console */
958 };
959
960 pwm@7000a000 {
961 status = "okay";
962 };
963
964 gen1_i2c: i2c@7000c000 {
965 status = "okay";
966 clock-frequency = <400000>;
967
968 /* Aichi AMI306 digital compass */
969 magnetometer@e {
970 compatible = "asahi-kasei,ak8974";
971 reg = <0x0e>;
972
973 interrupt-parent = <&gpio>;
974 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_EDGE_RISING>;
975
976 avdd-supply = <&vdd_3v0_sen>;
977 dvdd-supply = <&vdd_1v8_vio>;
978
979 mount-matrix = "-1", "0", "0",
980 "0", "1", "0",
981 "0", "0", "-1";
982 };
983
984 max98089: audio-codec@10 {
985 compatible = "maxim,max98089";
986 reg = <0x10>;
987
988 clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
989 clock-names = "mclk";
990
991 assigned-clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
992 assigned-clock-parents = <&tegra_car TEGRA30_CLK_EXTERN1>;
993 };
994
995 nfc@28 {
996 compatible = "nxp,pn544-i2c";
997 reg = <0x28>;
998
999 interrupt-parent = <&gpio>;
1000 interrupts = <TEGRA_GPIO(W, 2) IRQ_TYPE_EDGE_RISING>;
1001
1002 enable-gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
1003 firmware-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1004 };
1005
1006 imu@68 {
1007 compatible = "invensense,mpu6050";
1008 reg = <0x68>;
1009
1010 interrupt-parent = <&gpio>;
1011 interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_RISING>;
1012
1013 vdd-supply = <&vdd_3v0_sen>;
1014 vddio-supply = <&vdd_1v8_sen>;
1015
1016 mount-matrix = "1", "0", "0",
1017 "0", "1", "0",
1018 "0", "0", "-1";
1019 };
1020 };
1021
1022 gen2_i2c: i2c@7000c400 {
1023 status = "okay";
1024 clock-frequency = <400000>;
1025
1026 /* Synaptics RMI4 S3203B touchcreen */
1027 touchscreen@20 {
1028 compatible = "syna,rmi4-i2c";
1029 reg = <0x20>;
1030
1031 interrupt-parent = <&gpio>;
1032 interrupts = <TEGRA_GPIO(Q, 3) IRQ_TYPE_EDGE_FALLING>;
1033
1034 vdd-supply = <&vdd_3v0_touch>;
1035 vio-supply = <&vdd_1v8_touch>;
1036
1037 syna,reset-delay-ms = <20>;
1038 syna,startup-delay-ms = <200>;
1039
1040 #address-cells = <1>;
1041 #size-cells = <0>;
1042
1043 rmi4-f01@1 {
1044 reg = <0x1>;
1045 syna,nosleep-mode = <1>;
1046 };
1047
1048 rmi4-f11@11 {
1049 reg = <0x11>;
1050 syna,sensor-type = <1>;
1051
1052 syna,clip-x-low = <0>;
1053 syna,clip-y-low = <0>;
1054 };
1055 };
1056 };
1057
1058 cam_i2c: i2c@7000c500 {
1059 status = "okay";
1060 clock-frequency = <400000>;
1061
1062 dw9714: coil@c {
1063 compatible = "dongwoon,dw9714";
1064 reg = <0x0c>;
1065
1066 enable-gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_HIGH>;
1067
1068 vcc-supply = <&vcc_focuser>;
1069 };
1070
1071 camera-pmic@7d {
1072 compatible = "ti,lp8720";
1073 reg = <0x7d>;
1074
1075 enable-gpios = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
1076
1077 vt_1v2_front: ldo1 {
1078 regulator-name = "vt_1v2_dig";
1079 regulator-min-microvolt = <1200000>;
1080 regulator-max-microvolt = <1200000>;
1081 };
1082
1083 vt_2v7_front: ldo2 {
1084 regulator-name = "vt_2v7_vana";
1085 regulator-min-microvolt = <2700000>;
1086 regulator-max-microvolt = <2700000>;
1087 };
1088
1089 vdd_2v7_rear: ldo3 {
1090 regulator-name = "8m_2v7_vana";
1091 regulator-min-microvolt = <2700000>;
1092 regulator-max-microvolt = <2800000>;
1093 };
1094
1095 vio_1v8_rear: ldo4 {
1096 regulator-name = "vio_1v8_cam";
1097 regulator-min-microvolt = <1800000>;
1098 regulator-max-microvolt = <1800000>;
1099 };
1100
1101 vcc_focuser: ldo5 {
1102 regulator-name = "8m_2v8_vcm";
1103 regulator-min-microvolt = <2800000>;
1104 regulator-max-microvolt = <2800000>;
1105 };
1106
1107 vdd_1v2_rear: buck {
1108 regulator-name = "8m_1v2_cam";
1109 regulator-min-microvolt = <1200000>;
1110 regulator-max-microvolt = <1200000>;
1111 };
1112 };
1113 };
1114
1115 hdmi_ddc: i2c@7000c700 {
1116 status = "okay";
1117 clock-frequency = <100000>;
1118 };
1119
1120 pwr_i2c: i2c@7000d000 {
1121 status = "okay";
1122 clock-frequency = <400000>;
1123
1124 pmic: max77663@1c {
1125 compatible = "maxim,max77663";
1126 reg = <0x1c>;
1127
1128 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1129 #interrupt-cells = <2>;
1130 interrupt-controller;
1131
1132 #gpio-cells = <2>;
1133 gpio-controller;
1134
1135 system-power-controller;
1136
1137 pinctrl-names = "default";
1138 pinctrl-0 = <&max77663_default>;
1139
1140 max77663_default: pinmux {
1141 gpio1 {
1142 pins = "gpio1";
1143 function = "gpio";
1144 drive-open-drain = <1>;
1145 };
1146
1147 gpio4 {
1148 pins = "gpio4";
1149 function = "32k-out1";
1150 };
1151 };
1152
1153 fps {
1154 fps0 {
1155 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1156 };
1157
1158 fps1 {
1159 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1160 };
1161
1162 fps2 {
1163 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1164 };
1165 };
1166
1167 regulators {
1168 in-sd0-supply = <&vdd_5v0_vbus>;
1169 in-sd1-supply = <&vdd_5v0_vbus>;
1170 in-sd2-supply = <&vdd_5v0_vbus>;
1171 in-sd3-supply = <&vdd_5v0_vbus>;
1172
1173 in-ldo0-1-supply = <&vdd_1v8_vio>;
1174 in-ldo2-supply = <&vdd_3v3_vbat>;
1175 in-ldo3-5-supply = <&vdd_3v3_vbat>;
1176 in-ldo4-6-supply = <&vdd_3v3_vbat>;
1177 in-ldo7-8-supply = <&vdd_1v8_vio>;
1178
1179 vdd_cpu: sd0 {
1180 regulator-name = "vdd_cpu";
1181 regulator-min-microvolt = <800000>;
1182 regulator-max-microvolt = <1250000>;
1183 regulator-coupled-with = <&vdd_core>;
1184 regulator-coupled-max-spread = <300000>;
1185 regulator-max-step-microvolt = <100000>;
1186 regulator-always-on;
1187 regulator-boot-on;
1188
1189 nvidia,tegra-cpu-regulator;
1190 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1191 };
1192
1193 vdd_core: sd1 {
1194 regulator-name = "vdd_core";
1195 regulator-min-microvolt = <950000>;
1196 regulator-max-microvolt = <1350000>;
1197 regulator-coupled-with = <&vdd_cpu>;
1198 regulator-coupled-max-spread = <300000>;
1199 regulator-max-step-microvolt = <100000>;
1200 regulator-always-on;
1201 regulator-boot-on;
1202
1203 nvidia,tegra-core-regulator;
1204 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1205 };
1206
1207 vdd_1v8_vio: sd2 {
1208 regulator-name = "vdd_1v8_gen";
1209 regulator-min-microvolt = <1800000>;
1210 regulator-max-microvolt = <1800000>;
1211 regulator-always-on;
1212 regulator-boot-on;
1213
1214 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1215 };
1216
1217 sd3 {
1218 regulator-name = "vddio_ddr";
1219 regulator-min-microvolt = <1200000>;
1220 regulator-max-microvolt = <1200000>;
1221 regulator-always-on;
1222 regulator-boot-on;
1223
1224 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1225 };
1226
1227 ldo0 {
1228 regulator-name = "avdd_pll";
1229 regulator-min-microvolt = <1200000>;
1230 regulator-max-microvolt = <1200000>;
1231 regulator-always-on;
1232 regulator-boot-on;
1233
1234 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1235 };
1236
1237 ldo1 {
1238 regulator-name = "vdd_ddr_hs";
1239 regulator-min-microvolt = <1000000>;
1240 regulator-max-microvolt = <1000000>;
1241 regulator-always-on;
1242 regulator-boot-on;
1243
1244 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1245 };
1246
1247 avdd_3v3_periph: ldo2 {
1248 regulator-name = "avdd_usb";
1249 regulator-min-microvolt = <3300000>;
1250 regulator-max-microvolt = <3300000>;
1251
1252 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1253 };
1254
1255 vdd_usd: ldo3 {
1256 regulator-name = "vdd_sdmmc3";
1257 regulator-min-microvolt = <3000000>;
1258 regulator-max-microvolt = <3000000>;
1259 regulator-always-on;
1260
1261 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1262 };
1263
1264 ldo4 {
1265 regulator-name = "vdd_rtc";
1266 regulator-min-microvolt = <1200000>;
1267 regulator-max-microvolt = <1200000>;
1268 regulator-always-on;
1269 regulator-boot-on;
1270
1271 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1272 };
1273
1274 vcore_emmc: ldo5 {
1275 regulator-name = "vdd_ddr_rx";
1276 regulator-min-microvolt = <2850000>;
1277 regulator-max-microvolt = <2850000>;
1278 regulator-always-on;
1279 regulator-boot-on;
1280
1281 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1282 };
1283
1284 avdd_1v8_hdmi_pll: ldo6 {
1285 regulator-name = "avdd_osc";
1286 regulator-min-microvolt = <1800000>;
1287 regulator-max-microvolt = <1800000>;
1288 regulator-always-on;
1289 regulator-boot-on;
1290
1291 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1292 };
1293
1294 vdd_1v2_mhl: ldo7 {
1295 regulator-name = "vdd_1v2_mhl";
1296 regulator-min-microvolt = <1050000>;
1297 regulator-max-microvolt = <1250000>;
1298
1299 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1300 };
1301
1302 ldo8 {
1303 regulator-name = "avdd_dsi_csi";
1304 regulator-min-microvolt = <1200000>;
1305 regulator-max-microvolt = <1200000>;
1306
1307 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1308 };
1309 };
1310 };
1311
1312 fuel-gauge@36 {
1313 compatible = "maxim,max17043";
1314 reg = <0x36>;
1315
1316 interrupt-parent = <&gpio>;
1317 interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_EDGE_FALLING>;
1318
1319 monitored-battery = <&battery>;
1320
1321 maxim,alert-low-soc-level = <10>;
1322 wakeup-source;
1323 };
1324
1325 power-sensor@40 {
1326 compatible = "ti,ina230";
1327 reg = <0x40>;
1328
1329 vs-supply = <&vdd_3v0_sen>;
1330 };
1331
1332 nct72: temperature-sensor@4c {
1333 compatible = "onnn,nct1008";
1334 reg = <0x4c>;
1335
1336 interrupt-parent = <&gpio>;
1337 interrupts = <TEGRA_GPIO(I, 5) IRQ_TYPE_EDGE_FALLING>;
1338
1339 vcc-supply = <&vdd_3v0_sen>;
1340 #thermal-sensor-cells = <1>;
1341 };
1342 };
1343
1344 i2c-mhl {
1345 compatible = "i2c-gpio";
1346
1347 sda-gpios = <&gpio TEGRA_GPIO(Q, 7) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
1348 scl-gpios = <&gpio TEGRA_GPIO(Q, 6) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
1349
1350 i2c-gpio,delay-us = <5>;
1351
1352 #address-cells = <1>;
1353 #size-cells = <0>;
1354 };
1355
1356 spi@7000dc00 {
1357 status = "okay";
1358 spi-max-frequency = <25000000>;
1359
1360 /* DSI bridge */
1361 };
1362
1363 pmc@7000e400 {
1364 status = "okay";
1365 nvidia,invert-interrupt;
1366 nvidia,suspend-mode = <2>;
1367 nvidia,cpu-pwr-good-time = <2000>;
1368 nvidia,cpu-pwr-off-time = <200>;
1369 nvidia,core-pwr-good-time = <3845 3845>;
1370 nvidia,core-pwr-off-time = <0>;
1371 nvidia,core-power-req-active-high;
1372 nvidia,sys-clock-req-active-high;
1373 core-supply = <&vdd_core>;
1374
1375 i2c-thermtrip {
1376 nvidia,i2c-controller-id = <4>;
1377 nvidia,bus-addr = <0x1c>;
1378 nvidia,reg-addr = <0x41>;
1379 nvidia,reg-data = <0x02>;
1380 };
1381 };
1382
1383 hda@70030000 {
1384 status = "okay";
1385 };
1386
1387 ahub@70080000 {
1388 /* HIFI CODEC */
1389 i2s@70080300 { /* i2s0 */
1390 status = "okay";
1391 };
1392
1393 /* BASEBAND */
1394 i2s@70080500 { /* i2s2 */
1395 status = "okay";
1396 };
1397
1398 /* BT SCO */
1399 i2s@70080600 { /* i2s3 */
1400 status = "okay";
1401 };
1402 };
1403
1404 sdmmc1: mmc@78000000 {
1405 status = "okay";
1406
1407 #address-cells = <1>;
1408 #size-cells = <0>;
1409
1410 assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
1411 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
1412 assigned-clock-rates = <50000000>;
1413
1414 max-frequency = <50000000>;
1415 keep-power-in-suspend;
1416 bus-width = <4>;
1417 non-removable;
1418
1419 mmc-pwrseq = <&brcm_wifi_pwrseq>;
1420 vmmc-supply = <&vdd_3v3_vbat>;
1421 vqmmc-supply = <&vdd_1v8_vio>;
1422
1423 /* BCM4330B1 37.4 MHz Class 1.5 ExtLNA */
1424 wifi@1 {
1425 compatible = "brcm,bcm4329-fmac";
1426 reg = <1>;
1427
1428 interrupt-parent = <&gpio>;
1429 interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_HIGH>;
1430 interrupt-names = "host-wake";
1431 };
1432 };
1433
1434 sdmmc4: mmc@78000600 {
1435 status = "okay";
1436 bus-width = <8>;
1437
1438 non-removable;
1439 mmc-ddr-1_8v;
1440
1441 vmmc-supply = <&vcore_emmc>;
1442 vqmmc-supply = <&vdd_1v8_vio>;
1443 };
1444
1445 /* Micro USB */
1446 usb@7d000000 {
1447 compatible = "nvidia,tegra30-udc";
1448 status = "okay";
1449 dr_mode = "peripheral";
1450 };
1451
1452 usb-phy@7d000000 {
1453 status = "okay";
1454 dr_mode = "peripheral";
1455 nvidia,hssync-start-delay = <0>;
1456 nvidia,xcvr-lsfslew = <2>;
1457 nvidia,xcvr-lsrslew = <2>;
1458 vbus-supply = <&avdd_3v3_periph>;
1459 };
1460
1461 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1462 clk32k_in: clock-32k {
1463 compatible = "fixed-clock";
1464 #clock-cells = <0>;
1465 clock-frequency = <32768>;
1466 clock-output-names = "pmic-oscillator";
1467 };
1468
1469 gps_refclk: clock-gps {
1470 compatible = "fixed-clock";
1471 clock-frequency = <26000000>;
1472 clock-accuracy = <100>;
1473 #clock-cells = <0>;
1474 };
1475
1476 gps_osc: clock-gps-osc-gate {
1477 compatible = "gpio-gate-clock";
1478 enable-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
1479 clocks = <&gps_refclk>;
1480 #clock-cells = <0>;
1481 };
1482
1483 cpus {
1484 cpu0: cpu@0 {
1485 cpu-supply = <&vdd_cpu>;
1486 operating-points-v2 = <&cpu0_opp_table>;
1487 #cooling-cells = <2>;
1488 };
1489 cpu1: cpu@1 {
1490 cpu-supply = <&vdd_cpu>;
1491 operating-points-v2 = <&cpu0_opp_table>;
1492 #cooling-cells = <2>;
1493 };
1494 cpu2: cpu@2 {
1495 cpu-supply = <&vdd_cpu>;
1496 operating-points-v2 = <&cpu0_opp_table>;
1497 #cooling-cells = <2>;
1498 };
1499 cpu3: cpu@3 {
1500 cpu-supply = <&vdd_cpu>;
1501 operating-points-v2 = <&cpu0_opp_table>;
1502 #cooling-cells = <2>;
1503 };
1504 };
1505
1506 gpio-keys {
1507 compatible = "gpio-keys";
1508
1509 key-power {
1510 label = "Power";
1511 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
1512 linux,code = <KEY_POWER>;
1513 debounce-interval = <10>;
1514 wakeup-event-action = <EV_ACT_ASSERTED>;
1515 wakeup-source;
1516 };
1517
1518 key-volume-down {
1519 label = "Volume Down";
1520 gpios = <&gpio TEGRA_GPIO(O, 4) GPIO_ACTIVE_LOW>;
1521 linux,code = <KEY_VOLUMEDOWN>;
1522 debounce-interval = <10>;
1523 wakeup-event-action = <EV_ACT_ASSERTED>;
1524 wakeup-source;
1525 };
1526 };
1527
1528 gpio-leds {
1529 compatible = "gpio-leds";
1530
1531 led-keypad {
1532 label = "keypad::white";
1533 gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1534
1535 color = <LED_COLOR_ID_WHITE>;
1536 function = LED_FUNCTION_KBD_BACKLIGHT;
1537 };
1538 };
1539
1540 opp-table-actmon {
1541 /delete-node/ opp-625000000;
1542 /delete-node/ opp-667000000;
1543 /delete-node/ opp-750000000;
1544 /delete-node/ opp-800000000;
1545 /delete-node/ opp-900000000;
1546 };
1547
1548 opp-table-emc {
1549 /delete-node/ opp-625000000-1200;
1550 /delete-node/ opp-625000000-1250;
1551 /delete-node/ opp-667000000-1200;
1552 /delete-node/ opp-750000000-1300;
1553 /delete-node/ opp-800000000-1300;
1554 /delete-node/ opp-900000000-1350;
1555 };
1556
1557 brcm_wifi_pwrseq: pwrseq-wifi {
1558 compatible = "mmc-pwrseq-simple";
1559
1560 clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1561 clock-names = "ext_clock";
1562
1563 reset-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
1564 post-power-on-delay-ms = <300>;
1565 power-off-delay-us = <300>;
1566 };
1567
1568 vdd_5v0_vbus: regulator-vbus {
1569 compatible = "regulator-fixed";
1570 regulator-name = "vdd_vbus";
1571 regulator-min-microvolt = <5000000>;
1572 regulator-max-microvolt = <5000000>;
1573 regulator-always-on;
1574 regulator-boot-on;
1575 };
1576
1577 vdd_3v3_vbat: regulator-vbat {
1578 compatible = "regulator-fixed";
1579 regulator-name = "vdd_vbat";
1580 regulator-min-microvolt = <3300000>;
1581 regulator-max-microvolt = <3300000>;
1582 regulator-always-on;
1583 regulator-boot-on;
1584 vin-supply = <&vdd_5v0_vbus>;
1585 };
1586
1587 vdd_3v0_sen: regulator-sen3v {
1588 compatible = "regulator-fixed";
1589 regulator-name = "vdd_3v0_sensor";
1590 regulator-min-microvolt = <3000000>;
1591 regulator-max-microvolt = <3000000>;
1592 regulator-boot-on;
1593 gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1594 enable-active-high;
1595 vin-supply = <&vdd_3v3_vbat>;
1596 };
1597
1598 vdd_3v0_proxi: regulator-proxi {
1599 compatible = "regulator-fixed";
1600 regulator-name = "vdd_3v0_proxi";
1601 regulator-min-microvolt = <3000000>;
1602 regulator-max-microvolt = <3000000>;
1603 regulator-boot-on;
1604 gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1605 enable-active-high;
1606 vin-supply = <&vdd_3v3_vbat>;
1607 };
1608
1609 vdd_1v8_sen: regulator-sen1v8 {
1610 compatible = "regulator-fixed";
1611 regulator-name = "vdd_1v8_sensor";
1612 regulator-min-microvolt = <1800000>;
1613 regulator-max-microvolt = <1800000>;
1614 regulator-boot-on;
1615 gpio = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>;
1616 enable-active-high;
1617 vin-supply = <&vdd_3v3_vbat>;
1618 };
1619
1620 vcc_3v0_lcd: regulator-lcd3v {
1621 compatible = "regulator-fixed";
1622 regulator-name = "vcc_3v0_lcd";
1623 regulator-min-microvolt = <3000000>;
1624 regulator-max-microvolt = <3000000>;
1625 regulator-boot-on;
1626 vin-supply = <&vdd_3v3_vbat>;
1627 };
1628
1629 iovcc_1v8_lcd: regulator-lcd1v8 {
1630 compatible = "regulator-fixed";
1631 regulator-name = "iovcc_1v8_lcd";
1632 regulator-min-microvolt = <1800000>;
1633 regulator-max-microvolt = <1800000>;
1634 regulator-boot-on;
1635 gpio = <&gpio TEGRA_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
1636 enable-active-high;
1637 vin-supply = <&vdd_3v3_vbat>;
1638 };
1639
1640 vio_1v8_mhl: regulator-mhl1v8 {
1641 compatible = "regulator-fixed";
1642 regulator-name = "vio_1v8_mhl";
1643 regulator-min-microvolt = <1800000>;
1644 regulator-max-microvolt = <1800000>;
1645 regulator-boot-on;
1646 gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1647 enable-active-high;
1648 vin-supply = <&vdd_3v3_vbat>;
1649 };
1650
1651 vdd_3v0_touch: regulator-touchpwr {
1652 compatible = "regulator-fixed";
1653 regulator-name = "vdd_3v0_touch";
1654 regulator-min-microvolt = <3000000>;
1655 regulator-max-microvolt = <3000000>;
1656 regulator-boot-on;
1657 gpio = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_HIGH>;
1658 enable-active-high;
1659 vin-supply = <&vdd_3v3_vbat>;
1660 };
1661
1662 vdd_1v8_touch: regulator-touchvio {
1663 compatible = "regulator-fixed";
1664 regulator-name = "vdd_1v8_touch";
1665 regulator-min-microvolt = <1800000>;
1666 regulator-max-microvolt = <1800000>;
1667 regulator-boot-on;
1668 gpio = <&gpio TEGRA_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
1669 enable-active-high;
1670 vin-supply = <&vdd_3v3_vbat>;
1671 };
1672
1673 vcc_1v8_gps: regulator-gps {
1674 compatible = "regulator-fixed";
1675 regulator-name = "vcc_1v8_gps";
1676 regulator-min-microvolt = <1800000>;
1677 regulator-max-microvolt = <1800000>;
1678 regulator-boot-on;
1679 gpio = <&gpio TEGRA_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
1680 enable-active-high;
1681 vin-supply = <&vdd_3v3_vbat>;
1682 };
1683
1684 vio_1v8_front: regulator-frontvio {
1685 compatible = "regulator-fixed";
1686 regulator-name = "vt_1v8_cam_vio";
1687 regulator-min-microvolt = <1800000>;
1688 regulator-max-microvolt = <1800000>;
1689 gpio = <&gpio TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
1690 enable-active-high;
1691 vin-supply = <&vdd_3v3_vbat>;
1692 };
1693
1694 sound {
1695 nvidia,audio-routing =
1696 "Headphone Jack", "HPL",
1697 "Headphone Jack", "HPR",
1698 "Int Spk", "SPKL",
1699 "Int Spk", "SPKR",
1700 "Earpiece", "RECL",
1701 "Earpiece", "RECR",
1702 "INA1", "Mic Jack",
1703 "MIC1", "MICBIAS",
1704 "MICBIAS", "Internal Mic 1",
1705 "MIC2", "Internal Mic 2";
1706
1707 nvidia,i2s-controller = <&tegra_i2s0>;
1708 nvidia,audio-codec = <&max98089>;
1709
1710 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW>;
1711 nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_HIGH>;
1712 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>;
1713 nvidia,coupled-mic-hp-det;
1714
1715 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
1716 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1717 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1718 clock-names = "pll_a", "pll_a_out0", "mclk";
1719
1720 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1721 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1722
1723 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1724 <&tegra_car TEGRA30_CLK_EXTERN1>;
1725 };
1726
1727 thermal-zones {
1728 /*
1729 * NCT72 has two sensors:
1730 *
1731 * 0: internal that monitors ambient/skin temperature
1732 * 1: external that is connected to the CPU's diode
1733 *
1734 * Ideally we should use userspace thermal governor,
1735 * but it's a much more complex solution. The "skin"
1736 * zone exists as a simpler solution which prevents
1737 * this device from getting too hot from a user's
1738 * tactile perspective. The CPU zone is intended to
1739 * protect silicon from damage.
1740 */
1741
1742 skin-thermal {
1743 polling-delay-passive = <1000>; /* milliseconds */
1744 polling-delay = <5000>; /* milliseconds */
1745
1746 thermal-sensors = <&nct72 0>;
1747
1748 trips {
1749 trip0: skin-alert {
1750 /* throttle at 50C until temperature drops to 49.8C */
1751 temperature = <50000>;
1752 hysteresis = <200>;
1753 type = "passive";
1754 };
1755
1756 trip1: skin-crit {
1757 /* shut down at 60C */
1758 temperature = <60000>;
1759 hysteresis = <2000>;
1760 type = "critical";
1761 };
1762 };
1763
1764 cooling-maps {
1765 map0 {
1766 trip = <&trip0>;
1767 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1768 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1769 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1770 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1771 <&actmon THERMAL_NO_LIMIT
1772 THERMAL_NO_LIMIT>;
1773 };
1774 };
1775 };
1776
1777 cpu-thermal {
1778 polling-delay-passive = <1000>; /* milliseconds */
1779 polling-delay = <5000>; /* milliseconds */
1780
1781 thermal-sensors = <&nct72 1>;
1782
1783 trips {
1784 trip2: cpu-alert {
1785 /* throttle at 75C until temperature drops to 74.8C */
1786 temperature = <75000>;
1787 hysteresis = <200>;
1788 type = "passive";
1789 };
1790
1791 trip3: cpu-crit {
1792 /* shut down at 90C */
1793 temperature = <90000>;
1794 hysteresis = <2000>;
1795 type = "critical";
1796 };
1797 };
1798
1799 cooling-maps {
1800 map1 {
1801 trip = <&trip2>;
1802 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1803 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1804 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1805 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1806 <&actmon THERMAL_NO_LIMIT
1807 THERMAL_NO_LIMIT>;
1808 };
1809 };
1810 };
1811 };
1812 };
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