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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar
  4  * and Markus Pargmann, Pengutronix
  5  */
  6 
  7 /dts-v1/;
  8 #include "imx27.dtsi"
  9 
 10 / {
 11         model = "Phytec pca100";
 12         compatible = "phytec,imx27-pca100", "fsl,imx27";
 13 
 14         memory@a0000000 {
 15                 device_type = "memory";
 16                 reg = <0xa0000000 0x08000000>; /* 128MB */
 17         };
 18 
 19         usbotgphy: usbotgphy {
 20                 compatible = "usb-nop-xceiv";
 21                 pinctrl-names = "default";
 22                 pinctrl-0 = <&pinctrl_usbotgphy>;
 23                 reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
 24                 #phy-cells = <0>;
 25         };
 26 
 27         usbh2phy: usbh2phy {
 28                 compatible = "usb-nop-xceiv";
 29                 pinctrl-names = "default";
 30                 pinctrl-0 = <&pinctrl_usbh2phy>;
 31                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
 32                 #phy-cells = <0>;
 33         };
 34 };
 35 
 36 &cspi1 {
 37         cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
 38                    <&gpio4 27 GPIO_ACTIVE_LOW>;
 39         status = "okay";
 40 };
 41 
 42 &fec {
 43         pinctrl-names = "default";
 44         pinctrl-0 = <&pinctrl_fec1>;
 45         status = "okay";
 46 };
 47 
 48 &i2c2 {
 49         pinctrl-names = "default";
 50         pinctrl-0 = <&pinctrl_i2c2>;
 51         status = "okay";
 52 
 53         eeprom@52 {
 54                 compatible = "atmel,24c32";
 55                 pagesize = <32>;
 56                 reg = <0x52>;
 57         };
 58 };
 59 
 60 &iomuxc {
 61         imx27-phycard-s-som {
 62                 pinctrl_fec1: fec1grp {
 63                         fsl,pins = <
 64                                 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
 65                                 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
 66                                 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
 67                                 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
 68                                 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
 69                                 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
 70                                 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
 71                                 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
 72                                 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
 73                                 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
 74                                 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
 75                                 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
 76                                 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
 77                                 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
 78                                 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
 79                                 MX27_PAD_ATA_DATA13__FEC_COL 0x0
 80                                 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
 81                                 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
 82                         >;
 83                 };
 84 
 85                 pinctrl_i2c2: i2c2grp {
 86                         fsl,pins = <
 87                                 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
 88                                 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
 89                         >;
 90                 };
 91 
 92                 pinctrl_nfc: nfcgrp {
 93                         fsl,pins = <
 94                                 MX27_PAD_NFRB__NFRB 0x0
 95                                 MX27_PAD_NFCLE__NFCLE 0x0
 96                                 MX27_PAD_NFWP_B__NFWP_B 0x0
 97                                 MX27_PAD_NFCE_B__NFCE_B 0x0
 98                                 MX27_PAD_NFALE__NFALE 0x0
 99                                 MX27_PAD_NFRE_B__NFRE_B 0x0
100                                 MX27_PAD_NFWE_B__NFWE_B 0x0
101                         >;
102                 };
103 
104                 pinctrl_usbotgphy: usbotgphygrp {
105                         fsl,pins = <
106                                 MX27_PAD_USBH1_RCV__GPIO2_25            0x1 /* reset gpio */
107                         >;
108                 };
109 
110                 pinctrl_usbotg: usbotggrp {
111                         fsl,pins = <
112                                 MX27_PAD_USBOTG_CLK__USBOTG_CLK         0x0
113                                 MX27_PAD_USBOTG_DIR__USBOTG_DIR         0x0
114                                 MX27_PAD_USBOTG_NXT__USBOTG_NXT         0x0
115                                 MX27_PAD_USBOTG_STP__USBOTG_STP         0x0
116                                 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0     0x0
117                                 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1     0x0
118                                 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2     0x0
119                                 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3     0x0
120                                 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4     0x0
121                                 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5     0x0
122                                 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6     0x0
123                                 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7     0x0
124                         >;
125                 };
126 
127                 pinctrl_usbh2phy: usbh2phygrp {
128                         fsl,pins = <
129                                 MX27_PAD_USBH1_SUSP__GPIO2_22           0x0 /* reset gpio */
130                         >;
131                 };
132 
133                 pinctrl_usbh2: usbh2grp {
134                         fsl,pins = <
135                                 MX27_PAD_USBH2_CLK__USBH2_CLK           0x0
136                                 MX27_PAD_USBH2_DIR__USBH2_DIR           0x0
137                                 MX27_PAD_USBH2_NXT__USBH2_NXT           0x0
138                                 MX27_PAD_USBH2_STP__USBH2_STP           0x0
139                                 MX27_PAD_CSPI2_SCLK__USBH2_DATA0        0x0
140                                 MX27_PAD_CSPI2_MOSI__USBH2_DATA1        0x0
141                                 MX27_PAD_CSPI2_MISO__USBH2_DATA2        0x0
142                                 MX27_PAD_CSPI2_SS1__USBH2_DATA3         0x0
143                                 MX27_PAD_CSPI2_SS2__USBH2_DATA4         0x0
144                                 MX27_PAD_CSPI1_SS2__USBH2_DATA5         0x0
145                                 MX27_PAD_CSPI2_SS0__USBH2_DATA6         0x0
146                                 MX27_PAD_USBH2_DATA7__USBH2_DATA7       0x0
147                         >;
148                 };
149         };
150 };
151 
152 &nfc {
153         pinctrl-names = "default";
154         pinctrl-0 = <&pinctrl_nfc>;
155         nand-bus-width = <8>;
156         nand-ecc-mode = "hw";
157         nand-on-flash-bbt;
158         status = "okay";
159 };
160 
161 &usbotg {
162         pinctrl-names = "default";
163         pinctrl-0 = <&pinctrl_usbotg>;
164         phy_type = "ulpi";
165         phys = <&usbotgphy>;
166         status = "okay";
167 };
168 
169 &usbh2 {
170         pinctrl-names = "default";
171         pinctrl-0 = <&pinctrl_usbh2>;
172         phy_type = "ulpi";
173         phys = <&usbh2phy>;
174         status = "okay";
175 };

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