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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts

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  1 /*
  2  * support for the imx6 based aristainetos2 board
  3  *
  4  * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
  5  *
  6  * This file is dual-licensed: you can use it either under the terms
  7  * of the GPL or the X11 license, at your option. Note that this dual
  8  * licensing only applies to this file, and not this project as a
  9  * whole.
 10  *
 11  *  a) This file is free software; you can redistribute it and/or
 12  *     modify it under the terms of the GNU General Public License
 13  *     version 2 as published by the Free Software Foundation.
 14  *
 15  *     This file is distributed in the hope that it will be useful,
 16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18  *     GNU General Public License for more details.
 19  *
 20  * Or, alternatively,
 21  *
 22  *  b) Permission is hereby granted, free of charge, to any person
 23  *     obtaining a copy of this software and associated documentation
 24  *     files (the "Software"), to deal in the Software without
 25  *     restriction, including without limitation the rights to use,
 26  *     copy, modify, merge, publish, distribute, sublicense, and/or
 27  *     sell copies of the Software, and to permit persons to whom the
 28  *     Software is furnished to do so, subject to the following
 29  *     conditions:
 30  *
 31  *     The above copyright notice and this permission notice shall be
 32  *     included in all copies or substantial portions of the Software.
 33  *
 34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 41  *     OTHER DEALINGS IN THE SOFTWARE.
 42  */
 43 /dts-v1/;
 44 #include "imx6dl.dtsi"
 45 #include "imx6qdl-aristainetos2.dtsi"
 46 
 47 / {
 48         model = "aristainetos2 i.MX6 Dual Lite Board 4";
 49         compatible = "abb,aristainetos2-imx6dl-4", "fsl,imx6dl";
 50 
 51         memory@10000000 {
 52                 device_type = "memory";
 53                 reg = <0x10000000 0x40000000>;
 54         };
 55 
 56         display0: disp0 {
 57                 #address-cells = <1>;
 58                 #size-cells = <0>;
 59                 compatible = "fsl,imx-parallel-display";
 60                 interface-pix-fmt = "rgb24";
 61                 pinctrl-names = "default";
 62                 pinctrl-0 = <&pinctrl_ipu_disp>;
 63 
 64                 port@0 {
 65                         reg = <0>;
 66                         display0_in: endpoint {
 67                                 remote-endpoint = <&ipu1_di0_disp0>;
 68                         };
 69                 };
 70 
 71                 port@1 {
 72                         reg = <1>;
 73                         display_out: endpoint {
 74                                 remote-endpoint = <&panel_in>;
 75                         };
 76                 };
 77         };
 78 };
 79 
 80 &ecspi1 {
 81         lcd_panel: display@0 {
 82                 compatible = "lg,lg4573";
 83                 spi-max-frequency = <10000000>;
 84                 reg = <0>;
 85 
 86                 display-timings {
 87                         native-mode = <&timing0>;
 88                         timing0: timing-480x800p57 {
 89                                 clock-frequency = <27000027>;
 90                                 hactive = <480>;
 91                                 vactive = <800>;
 92                                 hfront-porch = <10>;
 93                                 hback-porch = <59>;
 94                                 hsync-len = <10>;
 95                                 vback-porch = <15>;
 96                                 vfront-porch = <15>;
 97                                 vsync-len = <15>;
 98                                 hsync-active = <1>;
 99                                 vsync-active = <1>;
100                         };
101                 };
102 
103                 port {
104                         panel_in: endpoint {
105                                 remote-endpoint = <&display_out>;
106                         };
107                 };
108         };
109 };
110 
111 &i2c3 {
112         touch: touch@4b {
113                 compatible = "atmel,maxtouch";
114                 reg = <0x4b>;
115                 interrupt-parent = <&gpio2>;
116                 interrupts = <9 8>;
117         };
118 };
119 
120 &ipu1_di0_disp0 {
121         remote-endpoint = <&display0_in>;
122 };
123 
124 &iomuxc {
125         pinctrl_ipu_disp: ipudisp1grp {
126                 fsl,pins = <
127                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
128                         MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0xE1
129                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
130                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
131                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0xE1
132                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0xE1
133                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0xE1
134                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0xE1
135                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0xE1
136                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0xE1
137                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0xE1
138                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0xE1
139                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0xE1
140                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0xE1
141                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0xE1
142                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0xE1
143                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0xE1
144                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0xE1
145                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0xe1
146                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0xE1
147                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0xE1
148                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0xE1
149                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0xE1
150                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0xE1
151                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0xE1
152                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0xE1
153                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0xE1
154                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0xE1
155                 >;
156         };
157 };

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