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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/nxp/imx/imx6dl-plybas.dts

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Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2 /*
  3  * Copyright (c) 2014 Protonic Holland
  4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
  5  */
  6 
  7 /dts-v1/;
  8 #include <dt-bindings/gpio/gpio.h>
  9 #include <dt-bindings/leds/common.h>
 10 #include "imx6dl.dtsi"
 11 
 12 / {
 13         model = "Plymovent BAS board";
 14         compatible = "ply,plybas", "fsl,imx6dl";
 15 
 16         chosen {
 17                 stdout-path = &uart4;
 18         };
 19 
 20         gpio_keys {
 21                 compatible = "gpio-keys";
 22                 autorepeat;
 23 
 24                 button-start {
 25                         label = "START";
 26                         linux,code = <31>;
 27                         gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
 28                 };
 29 
 30                 button-clean {
 31                         label = "CLEAN";
 32                         linux,code = <46>;
 33                         gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
 34                 };
 35         };
 36 
 37         leds {
 38                 compatible = "gpio-leds";
 39                 pinctrl-names = "default";
 40                 pinctrl-0 = <&pinctrl_leds>;
 41 
 42                 led-0 {
 43                         label = "debug0";
 44                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
 45                 };
 46 
 47                 led-1 {
 48                         label = "debug1";
 49                         gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 50                 };
 51 
 52                 led-2 {
 53                         label = "light_tower1";
 54                         gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 55                         linux,default-trigger = "heartbeat";
 56                 };
 57 
 58                 led-3 {
 59                         label = "light_tower2";
 60                         gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
 61                 };
 62 
 63                 led-4 {
 64                         label = "light_tower3";
 65                         gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
 66                 };
 67 
 68                 led-5 {
 69                         label = "light_tower4";
 70                         gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 71                 };
 72         };
 73 
 74         clk50m_phy: phy-clock {
 75                 compatible = "fixed-clock";
 76                 #clock-cells = <0>;
 77                 clock-frequency = <50000000>;
 78                 clock-output-names = "enet_ref_pad";
 79         };
 80 
 81         reg_5v0: regulator-5v0 {
 82                 compatible = "regulator-fixed";
 83                 regulator-name = "5v0";
 84                 regulator-min-microvolt = <5000000>;
 85                 regulator-max-microvolt = <5000000>;
 86         };
 87 };
 88 
 89 &can1 {
 90         pinctrl-names = "default";
 91         pinctrl-0 = <&pinctrl_can1>;
 92         xceiver-supply = <&reg_5v0>;
 93         status = "okay";
 94 };
 95 
 96 &can2 {
 97         pinctrl-names = "default";
 98         pinctrl-0 = <&pinctrl_can2>;
 99         xceiver-supply = <&reg_5v0>;
100         status = "okay";
101 };
102 
103 &clks {
104         clocks = <&clk50m_phy>;
105         clock-names = "enet_ref_pad";
106         assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
107         assigned-clock-parents = <&clk50m_phy>;
108 };
109 
110 &ecspi1 {
111         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
112         pinctrl-names = "default";
113         pinctrl-0 = <&pinctrl_ecspi1>;
114         status = "okay";
115 
116         flash@0 {
117                 compatible = "jedec,spi-nor";
118                 reg = <0>;
119                 spi-max-frequency = <20000000>;
120         };
121 };
122 
123 &fec {
124         pinctrl-names = "default";
125         pinctrl-0 = <&pinctrl_enet>;
126         phy-mode = "rmii";
127         phy-handle = <&rgmii_phy>;
128         status = "okay";
129 
130         mdio {
131                 #address-cells = <1>;
132                 #size-cells = <0>;
133 
134                 /* Microchip KSZ8081RNA PHY */
135                 rgmii_phy: ethernet-phy@0 {
136                         reg = <0>;
137                         interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
138                         reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
139                         reset-assert-us = <10000>;
140                         reset-deassert-us = <300>;
141                 };
142         };
143 };
144 
145 &gpio1 {
146         gpio-line-names =
147                 "", "SD1_CD", "", "", "", "", "", "",
148                 "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
149                 "", "", "", "", "", "", "", "",
150                 "", "", "", "", "", "", "", "";
151 };
152 
153 &gpio3 {
154         gpio-line-names =
155                 "", "", "", "", "", "", "", "",
156                 "", "", "", "", "", "", "", "",
157                 "", "", "", "ECSPI1_SS1", "", "USB_EXT_PWR", "", "",
158                 "", "", "", "", "", "", "", "";
159 };
160 
161 &gpio4 {
162         gpio-line-names =
163                 "", "", "", "", "", "", "", "",
164                 "", "", "", "", "CAN1_SR", "CAN2_SR", "", "",
165                 "LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "IMX6_IN12", "IMX6_HMI",
166                         "IMX6_IN11", "IMX6_BUZZER", "IMX6_LED1", "IMX6_LED2",
167                 "IMX6_LED3", "IMX6_LED4", "ETH_RESET", "IMX6_ANA_OUT_SD",
168                         "IMX6_ANA_OUT_ERR", "IMX6_ANA_OUT", "ETH_INTRP", "";
169 };
170 
171 &gpio5 {
172         gpio-line-names =
173                 "", "", "", "", "", "IMX6_RELAY1", "IMX6_RELAY2", "",
174                 "IMX6_IN1", "IMX6_IN2", "IMX6_IN3", "IMX6_IN4", "IMX6_IN5",
175                         "IMX6_IN6", "IMX6_IN7", "IMX6_IN8",
176                 "IMX6_IN9", "IMX6_IN10", "", "", "", "", "", "",
177                 "", "", "", "", "", "", "", "";
178 };
179 
180 &i2c1 {
181         clock-frequency = <100000>;
182         pinctrl-names = "default";
183         pinctrl-0 = <&pinctrl_i2c1>;
184         status = "okay";
185 
186         /* additional i2c devices are added automatically by the boot loader */
187 };
188 
189 &i2c3 {
190         clock-frequency = <100000>;
191         pinctrl-names = "default";
192         pinctrl-0 = <&pinctrl_i2c3>;
193         status = "okay";
194 
195         temperature-sensor@70 {
196                 compatible = "ti,tmp103";
197                 reg = <0x70>;
198         };
199 
200         rtc@51 {
201                 compatible = "nxp,pcf8563";
202                 reg = <0x51>;
203         };
204 };
205 
206 &pwm1 {
207         pinctrl-names = "default";
208         pinctrl-0 = <&pinctrl_pwm1>;
209         status = "okay";
210 };
211 
212 &uart1 {
213         pinctrl-names = "default";
214         pinctrl-0 = <&pinctrl_uart1>;
215         status = "okay";
216 };
217 
218 &uart2 {
219         pinctrl-names = "default";
220         pinctrl-0 = <&pinctrl_uart2>;
221         uart-has-rtscts;
222         linux,rs485-enabled-at-boot-time;
223         rs485-rts-delay = <0 20>;
224         status = "okay";
225 };
226 
227 &uart4 {
228         pinctrl-names = "default";
229         pinctrl-0 = <&pinctrl_uart4>;
230         status = "okay";
231 };
232 
233 &usbotg {
234         pinctrl-names = "default";
235         pinctrl-0 = <&pinctrl_usbotg>;
236         phy_type = "utmi";
237         dr_mode = "host";
238         over-current-active-low;
239         status = "okay";
240 };
241 
242 &usbphynop1 {
243         status = "disabled";
244 };
245 
246 &usbphynop2 {
247         status = "disabled";
248 };
249 
250 &iomuxc {
251         pinctrl_can1: can1grp {
252                 fsl,pins = <
253                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
254                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
255                         /* CAN1_SR */
256                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
257                 >;
258         };
259 
260         pinctrl_can2: can2grp {
261                 fsl,pins = <
262                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX                0x1b000
263                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX                0x3008
264                         /* CAN2_SR */
265                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13                 0x13008
266                 >;
267         };
268 
269         pinctrl_ecspi1: ecspi1grp {
270                 fsl,pins = <
271                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x1b000
272                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x3008
273                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x3008
274                         /* CS */
275                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x3008
276                 >;
277         };
278 
279         pinctrl_enet: enetgrp {
280                 fsl,pins = <
281                         /* MX6QDL_ENET_PINGRP4 */
282                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x1b0b0
283                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x1b0b0
284                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0             0x1b0b0
285                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1             0x1b0b0
286                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER               0x1b0b0
287                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN               0x1b0b0
288                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0             0x1b0b0
289                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1             0x1b0b0
290                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN              0x1b0b0
291 
292                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK                0x1b0b0
293                         /* Phy reset */
294                         MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26               0x1b0b0
295                         /* nINTRP */
296                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30               0x1b0b0
297                 >;
298         };
299 
300         pinctrl_i2c1: i2c1grp {
301                 fsl,pins = <
302                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA                  0x4001f8b1
303                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL                  0x4001f8b1
304                 >;
305         };
306 
307         pinctrl_i2c3: i2c3grp {
308                 fsl,pins = <
309                         MX6QDL_PAD_GPIO_5__I2C3_SCL                     0x4001b8b1
310                         MX6QDL_PAD_GPIO_6__I2C3_SDA                     0x4001b8b1
311                 >;
312         };
313 
314         pinctrl_leds: ledsgrp {
315                 fsl,pins = <
316                         /* DEBUG_0 */
317                         MX6QDL_PAD_GPIO_8__GPIO1_IO08                   0x1b0b0
318                         /* DEBUG_1 */
319                         MX6QDL_PAD_GPIO_9__GPIO1_IO09                   0x1b0b0
320 
321                         /* LED1 (lighttower) */
322                         MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22               0x13070
323                         /* LED2 (lighttower) */
324                         MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23               0x13070
325                         /* LED3 (lighttower) */
326                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24               0x13070
327                         /* LED4 (lighttower) */
328                         MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25               0x13070
329                 >;
330         };
331 
332         pinctrl_pwm1: pwm1grp {
333                 fsl,pins = <
334                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT                 0x1b0b0
335                 >;
336         };
337 
338         /* YaCO AUX Uart */
339         pinctrl_uart1: uart1grp {
340                 fsl,pins = <
341                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA            0x1b0b1
342                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA            0x1b0b1
343                 >;
344         };
345 
346         pinctrl_uart2: uart2grp {
347                 fsl,pins = <
348                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA               0x1b0b1
349                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA               0x1b0b1
350                         MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B             0x130b1
351                 >;
352         };
353 
354         pinctrl_uart4: uart4grp {
355                 fsl,pins = <
356                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
357                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
358                 >;
359         };
360 
361         pinctrl_usbotg: usbotggrp {
362                 fsl,pins = <
363                         MX6QDL_PAD_EIM_D21__USB_OTG_OC                  0x1b0b0
364                         /* power enable, high active */
365                         MX6QDL_PAD_EIM_D22__GPIO3_IO22                  0x1b0b0
366                 >;
367         };
368 
369         pinctrl_usdhc1: usdhc1grp {
370                 fsl,pins = <
371                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
372                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
373                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
374                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
375                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
376                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
377                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
378                 >;
379         };
380 
381         pinctrl_usdhc3: usdhc3grp {
382                 fsl,pins = <
383                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
384                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
385                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
386                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
387                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
388                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
389                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
390                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
391                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
392                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
393                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
394                 >;
395         };
396 };

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