1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2013 Gateworks Corporation
4 */
5
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include "imx6q.dtsi"
9
10 / {
11 model = "Gateworks Ventana GW5400-A";
12 compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
13
14 /* these are used by bootloader for disabling nodes */
15 aliases {
16 i2c0 = &i2c1;
17 i2c1 = &i2c2;
18 i2c2 = &i2c3;
19 led0 = &led0;
20 led1 = &led1;
21 led2 = &led2;
22 ssi0 = &ssi1;
23 spi0 = &ecspi1;
24 usb0 = &usbh1;
25 usb1 = &usbotg;
26 };
27
28 chosen {
29 bootargs = "console=ttymxc1,115200";
30 };
31
32 leds {
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_gpio_leds>;
36
37 led0: led-user1 {
38 label = "user1";
39 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
40 default-state = "on";
41 linux,default-trigger = "heartbeat";
42 };
43
44 led1: led-user2 {
45 label = "user2";
46 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
47 default-state = "off";
48 };
49
50 led2: led-user3 {
51 label = "user3";
52 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
53 default-state = "off";
54 };
55 };
56
57 memory@10000000 {
58 device_type = "memory";
59 reg = <0x10000000 0x40000000>;
60 };
61
62 pps {
63 compatible = "pps-gpio";
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_gpio_leds>;
66 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
67 status = "okay";
68 };
69
70 reg_1p0v: regulator-1p0v {
71 compatible = "regulator-fixed";
72 regulator-name = "1P0V";
73 regulator-min-microvolt = <1000000>;
74 regulator-max-microvolt = <1000000>;
75 regulator-always-on;
76 };
77
78 reg_3p3v: regulator-3p3v {
79 compatible = "regulator-fixed";
80 regulator-name = "3P3V";
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
83 regulator-always-on;
84 };
85
86 reg_usb_h1_vbus: regulator-usb-h1-vbus {
87 compatible = "regulator-fixed";
88 regulator-name = "usb_h1_vbus";
89 regulator-min-microvolt = <5000000>;
90 regulator-max-microvolt = <5000000>;
91 regulator-always-on;
92 };
93
94 reg_usb_otg_vbus: regulator-usb-otg-vbus {
95 compatible = "regulator-fixed";
96 regulator-name = "usb_otg_vbus";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
100 enable-active-high;
101 };
102
103 sound {
104 compatible = "fsl,imx6q-ventana-sgtl5000",
105 "fsl,imx-audio-sgtl5000";
106 model = "sgtl5000-audio";
107 ssi-controller = <&ssi1>;
108 audio-codec = <&codec>;
109 audio-routing =
110 "MIC_IN", "Mic Jack",
111 "Mic Jack", "Mic Bias",
112 "Headphone Jack", "HP_OUT";
113 mux-int-port = <1>;
114 mux-ext-port = <4>;
115 };
116 };
117
118 &audmux {
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_audmux>;
121 status = "okay";
122 };
123
124 &ecspi1 {
125 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_ecspi1>;
128 status = "okay";
129
130 flash: flash@0 {
131 compatible = "sst,w25q256", "jedec,spi-nor";
132 spi-max-frequency = <30000000>;
133 reg = <0>;
134 };
135 };
136
137 &fec {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_enet>;
140 phy-mode = "rgmii-id";
141 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
142 status = "okay";
143 };
144
145 &hdmi {
146 ddc-i2c-bus = <&i2c3>;
147 status = "okay";
148 };
149
150 &i2c1 {
151 clock-frequency = <100000>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_i2c1>;
154 status = "okay";
155
156 eeprom1: eeprom@50 {
157 compatible = "atmel,24c02";
158 reg = <0x50>;
159 pagesize = <16>;
160 };
161
162 eeprom2: eeprom@51 {
163 compatible = "atmel,24c02";
164 reg = <0x51>;
165 pagesize = <16>;
166 };
167
168 eeprom3: eeprom@52 {
169 compatible = "atmel,24c02";
170 reg = <0x52>;
171 pagesize = <16>;
172 };
173
174 eeprom4: eeprom@53 {
175 compatible = "atmel,24c02";
176 reg = <0x53>;
177 pagesize = <16>;
178 };
179
180 gpio: pca9555@23 {
181 compatible = "nxp,pca9555";
182 reg = <0x23>;
183 gpio-controller;
184 #gpio-cells = <2>;
185 };
186
187 rtc: ds1672@68 {
188 compatible = "dallas,ds1672";
189 reg = <0x68>;
190 };
191 };
192
193 &i2c2 {
194 clock-frequency = <100000>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_i2c2>;
197 status = "okay";
198
199 pmic: pmic@8 {
200 compatible = "fsl,pfuze100";
201 reg = <0x08>;
202
203 regulators {
204 sw1a_reg: sw1ab {
205 regulator-min-microvolt = <300000>;
206 regulator-max-microvolt = <1875000>;
207 regulator-boot-on;
208 regulator-always-on;
209 regulator-ramp-delay = <6250>;
210 };
211
212 sw1c_reg: sw1c {
213 regulator-min-microvolt = <300000>;
214 regulator-max-microvolt = <1875000>;
215 regulator-boot-on;
216 regulator-always-on;
217 regulator-ramp-delay = <6250>;
218 };
219
220 sw2_reg: sw2 {
221 regulator-min-microvolt = <800000>;
222 regulator-max-microvolt = <3950000>;
223 regulator-boot-on;
224 regulator-always-on;
225 };
226
227 sw3a_reg: sw3a {
228 regulator-min-microvolt = <400000>;
229 regulator-max-microvolt = <1975000>;
230 regulator-boot-on;
231 regulator-always-on;
232 };
233
234 sw3b_reg: sw3b {
235 regulator-min-microvolt = <400000>;
236 regulator-max-microvolt = <1975000>;
237 regulator-boot-on;
238 regulator-always-on;
239 };
240
241 sw4_reg: sw4 {
242 regulator-min-microvolt = <800000>;
243 regulator-max-microvolt = <3300000>;
244 };
245
246 swbst_reg: swbst {
247 regulator-min-microvolt = <5000000>;
248 regulator-max-microvolt = <5150000>;
249 };
250
251 snvs_reg: vsnvs {
252 regulator-min-microvolt = <1000000>;
253 regulator-max-microvolt = <3000000>;
254 regulator-boot-on;
255 regulator-always-on;
256 };
257
258 vref_reg: vrefddr {
259 regulator-boot-on;
260 regulator-always-on;
261 };
262
263 vgen1_reg: vgen1 {
264 regulator-min-microvolt = <800000>;
265 regulator-max-microvolt = <1550000>;
266 };
267
268 vgen2_reg: vgen2 {
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <1550000>;
271 };
272
273 vgen3_reg: vgen3 {
274 regulator-min-microvolt = <1800000>;
275 regulator-max-microvolt = <3300000>;
276 };
277
278 vgen4_reg: vgen4 {
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <3300000>;
281 regulator-always-on;
282 };
283
284 vgen5_reg: vgen5 {
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <3300000>;
287 regulator-always-on;
288 };
289
290 vgen6_reg: vgen6 {
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <3300000>;
293 regulator-always-on;
294 };
295 };
296 };
297 };
298
299 &i2c3 {
300 clock-frequency = <100000>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_i2c3>;
303 status = "okay";
304
305 accelerometer: mma8450@1c {
306 compatible = "fsl,mma8450";
307 reg = <0x1c>;
308 };
309
310 codec: sgtl5000@a {
311 compatible = "fsl,sgtl5000";
312 reg = <0x0a>;
313 #sound-dai-cells = <0>;
314 clocks = <&clks IMX6QDL_CLK_CKO>;
315 VDDA-supply = <&sw4_reg>;
316 VDDIO-supply = <®_3p3v>;
317 };
318
319 touchscreen: egalax_ts@4 {
320 compatible = "eeti,egalax_ts";
321 reg = <0x04>;
322 interrupt-parent = <&gpio7>;
323 interrupts = <12 2>;
324 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
325 };
326 };
327
328 &ldb {
329 status = "okay";
330 };
331
332 &pcie {
333 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
334 status = "okay";
335 };
336
337 &ssi1 {
338 status = "okay";
339 };
340
341 &uart1 {
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_uart1>;
344 status = "okay";
345 };
346
347 &uart2 {
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_uart2>;
350 status = "okay";
351 };
352
353 &uart5 {
354 pinctrl-names = "default";
355 pinctrl-0 = <&pinctrl_uart5>;
356 status = "okay";
357 };
358
359 &usbotg {
360 vbus-supply = <®_usb_otg_vbus>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_usbotg>;
363 disable-over-current;
364 status = "okay";
365 };
366
367 &usbh1 {
368 vbus-supply = <®_usb_h1_vbus>;
369 status = "okay";
370 };
371
372 &usdhc3 {
373 pinctrl-names = "default";
374 pinctrl-0 = <&pinctrl_usdhc3>;
375 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
376 vmmc-supply = <®_3p3v>;
377 status = "okay";
378 };
379
380 &iomuxc {
381 pinctrl_audmux: audmuxgrp {
382 fsl,pins = <
383 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
384 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
385 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
386 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
387 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
388 >;
389 };
390
391 pinctrl_ecspi1: ecspi1grp {
392 fsl,pins = <
393 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
394 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
395 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
396 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 /* SPINOR_CS0# */
397 >;
398 };
399
400 pinctrl_enet: enetgrp {
401 fsl,pins = <
402 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
403 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
404 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
405 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
406 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
407 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
408 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
409 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
410 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
411 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
412 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
413 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
414 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
415 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
416 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
417 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
418 >;
419 };
420
421 pinctrl_gpio_leds: gpioledsgrp {
422 fsl,pins = <
423 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* user1 led */
424 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /* user2 led */
425 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 /* user3 led */
426 >;
427 };
428
429 pinctrl_i2c1: i2c1grp {
430 fsl,pins = <
431 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
432 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
433 >;
434 };
435
436 pinctrl_i2c2: i2c2grp {
437 fsl,pins = <
438 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
439 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
440 >;
441 };
442
443 pinctrl_i2c3: i2c3grp {
444 fsl,pins = <
445 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
446 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
447 >;
448 };
449
450 pinctrl_pcie: pciegrp {
451 fsl,pins = <
452 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
453 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
454 >;
455 };
456
457 pinctrl_pps: ppsgrp {
458 fsl,pins = <
459 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 /* GPS_PPS */
460 >;
461 };
462
463 pinctrl_uart1: uart1grp {
464 fsl,pins = <
465 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
466 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
467 >;
468 };
469
470 pinctrl_uart2: uart2grp {
471 fsl,pins = <
472 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
473 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
474 >;
475 };
476
477 pinctrl_uart5: uart5grp {
478 fsl,pins = <
479 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
480 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
481 >;
482 };
483
484 pinctrl_usbotg: usbotggrp {
485 fsl,pins = <
486 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
487 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
488 >;
489 };
490
491 pinctrl_usdhc3: usdhc3grp {
492 fsl,pins = <
493 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
494 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
495 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
496 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
497 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
498 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
499 >;
500 };
501 };
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