1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
2 //
3 // Copyright 2015 Armadeus Systems <support@armadeus.com>
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8
9 / {
10 chosen {
11 stdout-path = &uart4;
12 };
13
14 backlight: backlight {
15 compatible = "pwm-backlight";
16 pwms = <&pwm3 0 191000 0>;
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <0>;
19 power-supply = <®_5v>;
20 };
21
22 disp0 {
23 compatible = "fsl,imx-parallel-display";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_ipu1_disp0>;
26
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 port@0 {
31 reg = <0>;
32
33 display_in: endpoint {
34 remote-endpoint = <&ipu1_di0_disp0>;
35 };
36 };
37
38 port@1 {
39 reg = <1>;
40
41 display_out: endpoint {
42 remote-endpoint = <&panel_in>;
43 };
44 };
45 };
46
47 gpio-keys {
48 compatible = "gpio-keys";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_gpio_keys>;
51
52 user-button {
53 label = "User button";
54 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
55 linux,code = <BTN_MISC>;
56 wakeup-source;
57 };
58 };
59
60 leds {
61 compatible = "gpio-leds";
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_gpio_leds>;
64
65 user-led {
66 label = "User LED";
67 gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 default-state = "on";
70 };
71 };
72
73 panel {
74 compatible = "armadeus,st0700-adapt";
75 power-supply = <®_3p3v>;
76 backlight = <&backlight>;
77
78 port {
79 panel_in: endpoint {
80 remote-endpoint = <&display_out>;
81 };
82 };
83 };
84
85 reg_3p3v: regulator-3p3v {
86 compatible = "regulator-fixed";
87 regulator-name = "3P3V";
88 regulator-min-microvolt = <3300000>;
89 regulator-max-microvolt = <3300000>;
90 regulator-always-on;
91 vin-supply = <®_5v>;
92 };
93
94 reg_5v: regulator-5v {
95 compatible = "regulator-fixed";
96 regulator-name = "5V";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 regulator-always-on;
100 };
101
102 reg_usb_otg_vbus: regulator-usb-otg-vbus {
103 compatible = "regulator-fixed";
104 regulator-name = "usb_otg_vbus";
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107 regulator-always-on;
108 };
109
110 sound {
111 compatible = "fsl,imx6-armadeus-sgtl5000",
112 "fsl,imx-audio-sgtl5000";
113 model = "imx6-armadeus-sgtl5000";
114 ssi-controller = <&ssi1>;
115 audio-codec = <&codec>;
116 audio-routing =
117 "MIC_IN", "Mic Jack",
118 "Mic Jack", "Mic Bias",
119 "Headphone Jack", "HP_OUT";
120 mux-int-port = <1>;
121 mux-ext-port = <3>;
122 };
123
124 spdif_out: spdif-out {
125 compatible = "linux,spdif-dit";
126 #sound-dai-cells = <0>;
127 };
128
129 sound-spdif {
130 compatible = "fsl,imx-audio-spdif";
131 model = "imx-spdif";
132 audio-cpu = <&spdif>;
133 audio-codec = <&spdif_out>;
134 };
135 };
136
137 &audmux {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_audmux>;
140 status = "okay";
141 };
142
143 &can2 {
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_flexcan2>;
146 xceiver-supply = <®_5v>;
147 status = "okay";
148 };
149
150 &ecspi1 {
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_ecspi1>;
153 cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
154 <&gpio4 10 GPIO_ACTIVE_LOW>,
155 <&gpio4 11 GPIO_ACTIVE_LOW>;
156 status = "okay";
157 };
158
159 &hdmi {
160 ddc-i2c-bus = <&i2c3>;
161 status = "okay";
162 };
163
164 &i2c1 {
165 clock-frequency = <400000>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_i2c1>;
168 status = "okay";
169
170 touchscreen@48 {
171 compatible = "semtech,sx8654";
172 reg = <0x48>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_touchscreen>;
175 interrupt-parent = <&gpio6>;
176 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
177 };
178 };
179
180 &i2c2 {
181 clock-frequency = <400000>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_i2c2>;
184 status = "okay";
185
186 codec: sgtl5000@a {
187 compatible = "fsl,sgtl5000";
188 reg = <0x0a>;
189 #sound-dai-cells = <0>;
190 clocks = <&clks IMX6QDL_CLK_CKO>;
191 VDDA-supply = <®_3p3v>;
192 VDDIO-supply = <®_3p3v>;
193 };
194
195 rtc@6f {
196 compatible = "microchip,mcp7940x";
197 reg = <0x6f>;
198 };
199 };
200
201 &i2c3 {
202 clock-frequency = <400000>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_i2c3>;
205 status = "okay";
206 };
207
208 &ipu1_di0_disp0 {
209 remote-endpoint = <&display_in>;
210 };
211
212 &pcie {
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_pcie>;
215 reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>;
216 status = "okay";
217 };
218
219 &pwm3 {
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_pwm3>;
222 status = "okay";
223 };
224
225 /* GPS */
226 &uart1 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_uart1>;
229 status = "okay";
230 };
231
232 /* GSM */
233 &uart3 {
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
236 uart-has-rtscts;
237 status = "okay";
238 };
239
240 /* console */
241 &uart4 {
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_uart4>;
244 status = "okay";
245 };
246
247 &usbh1 {
248 vbus-supply = <®_5v>;
249 phy_type = "utmi";
250 status = "okay";
251 };
252
253 &usbotg {
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_usbotg>;
256 vbus-supply = <®_usb_otg_vbus>;
257 dr_mode = "otg";
258 status = "okay";
259 };
260
261 /* microSD */
262 &usdhc2 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_usdhc2>;
265 cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
266 no-1-8-v;
267 status = "okay";
268 };
269
270 &spdif {
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_spdif>;
273 status = "okay";
274 };
275
276 &ssi1 {
277 status = "okay";
278 };
279
280 &iomuxc {
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_gpios>;
283
284 pinctrl_audmux: audmuxgrp {
285 fsl,pins = <
286 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
287 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
288 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
289 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
290 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
291 >;
292 };
293
294 pinctrl_ecspi1: ecspi1grp {
295 fsl,pins = <
296 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
297 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
298 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
299 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
300 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
301 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
302 >;
303 };
304
305 pinctrl_flexcan2: flexcan2grp {
306 fsl,pins = <
307 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
308 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
309 >;
310 };
311
312 pinctrl_gpio_keys: gpiokeysgrp {
313 fsl,pins = <
314 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
315 >;
316 };
317
318 pinctrl_gpio_leds: gpioledsgrp {
319 fsl,pins = <
320 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
321 >;
322 };
323
324 pinctrl_gpios: gpiosgrp {
325 fsl,pins = <
326 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1
327 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
328 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1
329 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1
330 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x100b1
331 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x100b1
332 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x100b1
333 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1
334 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1
335 >;
336 };
337
338 pinctrl_gsm: gsmgrp {
339 fsl,pins = <
340 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 /* GSM_POKIN */
341 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
342 >;
343 };
344
345 pinctrl_i2c1: i2c1grp {
346 fsl,pins = <
347 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
348 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
349 >;
350 };
351
352 pinctrl_i2c2: i2c2grp {
353 fsl,pins = <
354 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
355 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
356 >;
357 };
358
359 pinctrl_i2c3: i2c3grp {
360 fsl,pins = <
361 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
362 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
363 >;
364 };
365
366 pinctrl_ipu1_disp0: ipu1disp0grp {
367 fsl,pins = <
368 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100b1
369 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100b1
370 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100b1
371 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100b1
372 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100b1
373 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100b1
374 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100b1
375 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100b1
376 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100b1
377 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100b1
378 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100b1
379 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100b1
380 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100b1
381 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100b1
382 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100b1
383 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100b1
384 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100b1
385 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100b1
386 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100b1
387 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100b1
388 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100b1
389 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100b1
390 >;
391 };
392
393 pinctrl_pcie: pciegrp {
394 fsl,pins = <
395 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
396 >;
397 };
398
399 pinctrl_pwm3: pwm3grp {
400 fsl,pins = <
401 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
402 >;
403 };
404
405 pinctrl_uart1: uart1grp {
406 fsl,pins = <
407 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
408 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
409 >;
410 };
411
412 pinctrl_uart3: uart3grp {
413 fsl,pins = <
414 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b0
415 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
416 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
417 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b0
418 >;
419 };
420
421 pinctrl_uart4: uart4grp {
422 fsl,pins = <
423 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
424 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
425 >;
426 };
427
428 pinctrl_usbotg: usbotggrp {
429 fsl,pins = <
430 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
431 >;
432 };
433
434 pinctrl_usdhc2: usdhc2grp {
435 fsl,pins = <
436 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
437 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
438 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
439 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
440 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
441 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
442 >;
443 };
444
445 pinctrl_spdif: spdifgrp {
446 fsl,pins = <
447 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
448 >;
449 };
450
451 pinctrl_touchscreen: touchscreengrp {
452 fsl,pins = <
453 MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
454 >;
455 };
456 };
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