1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 //
3 // Copyright 2019 Armadeus Systems <support@armadeus.com>
4
5 /dts-v1/;
6 #include "imx6ull-opos6ul.dtsi"
7 #include "imx6ul-imx6ull-opos6uldev.dtsi"
8
9 / {
10 model = "Armadeus Systems OPOS6UL SoM (i.MX6ULL) on OPOS6ULDev board";
11 compatible = "armadeus,imx6ull-opos6uldev", "armadeus,imx6ull-opos6ul", "fsl,imx6ull";
12 };
13
14 &iomuxc_snvs {
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_tamper_gpios>;
17
18 pinctrl_tamper_gpios: tampergpiosgrp {
19 fsl,pins = <
20 MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
21 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
22 MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
23 MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
24 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
25 MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
26 MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
27 MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
28 >;
29 };
30
31 pinctrl_usbotg2_vbus: usbotg2vbusgrp {
32 fsl,pins = <
33 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
34 >;
35 };
36
37 pinctrl_w1: w1grp {
38 fsl,pins = <
39 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
40 >;
41 };
42 };
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