1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 // Copyright (C) 2022-2024 Sebastian Reichel <sre@kernel.org>
3
4 /dts-v1/;
5 #include "imx6ull.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/imx6ul-clock.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "UNI-T UTi260B Thermal Camera";
13 compatible = "uni-t,uti260b", "fsl,imx6ull";
14
15 chosen {
16 stdout-path = "serial0:115200n8";
17 };
18
19 memory@80000000 {
20 device_type = "memory";
21 reg = <0x80000000 0x20000000>;
22 };
23
24 panel_backlight: backlight {
25 compatible = "pwm-backlight";
26 brightness-levels = <0 4 8 16 32 64 128 255>;
27 default-brightness-level = <6>;
28 enable-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
29 pinctrl-names = "default";
30 pinctrl-0 = <&mux_backlight_enable>;
31 power-supply = <®_vsd>;
32 pwms = <&pwm1 0 50000 0>;
33 };
34
35 battery: battery {
36 compatible = "simple-battery";
37 /* generic 26650 battery */
38 device-chemistry = "lithium-ion";
39 charge-full-design-microamp-hours = <5000000>;
40 voltage-max-design-microvolt = <4200000>;
41 voltage-min-design-microvolt = <3300000>;
42 };
43
44 tp5000: charger {
45 compatible = "gpio-charger";
46 charger-type = "usb-sdp";
47 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
48 pinctrl-names = "default";
49 pinctrl-0 = <&mux_charger_stat1>;
50 };
51
52 fuel-gauge {
53 compatible = "adc-battery";
54 charged-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
55 io-channel-names = "voltage";
56 io-channels = <&adc1 7>;
57 monitored-battery = <&battery>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&mux_charger_stat2>;
60 power-supplies = <&tp5000>;
61 };
62
63 gpio-keys {
64 compatible = "gpio-keys";
65 pinctrl-names = "default";
66 pinctrl-0 = <&mux_gpio_keys>;
67 autorepeat;
68
69 up-key {
70 label = "Up";
71 gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
72 linux,code = <KEY_UP>;
73 };
74
75 down-key {
76 label = "Down";
77 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_DOWN>;
79 };
80
81 left-key {
82 label = "Left";
83 gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
84 linux,code = <KEY_LEFT>;
85 };
86
87 right-key {
88 label = "Right";
89 gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
90 linux,code = <KEY_RIGHT>;
91 };
92
93 ok-key {
94 label = "Ok";
95 gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
96 linux,code = <KEY_ENTER>;
97 };
98
99 return-key {
100 label = "Return";
101 gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
102 linux,code = <KEY_ESC>;
103 };
104
105 play-key {
106 label = "Media";
107 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
108 linux,code = <KEY_MEDIA>;
109 };
110
111 trigger-key {
112 label = "Trigger";
113 gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
114 linux,code = <BTN_TRIGGER>;
115 };
116
117 power-key {
118 label = "Power";
119 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
120 linux,code = <KEY_POWER>;
121 };
122
123 light-key {
124 label = "Light";
125 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
126 linux,code = <KEY_LIGHTS_TOGGLE>;
127 };
128 };
129
130 leds {
131 compatible = "gpio-leds";
132 pinctrl-names = "default";
133 pinctrl-0 = <&mux_led_ctrl>;
134
135 led {
136 color = <LED_COLOR_ID_WHITE>;
137 function = LED_FUNCTION_FLASH;
138 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
139 default-state = "off";
140 };
141 };
142
143 poweroff {
144 compatible = "gpio-poweroff";
145 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&mux_poweroff>;
148 };
149
150 reg_vref: regulator-vref-4v2 {
151 compatible = "regulator-fixed";
152 regulator-name = "VREF_4V2";
153 regulator-min-microvolt = <4200000>;
154 regulator-max-microvolt = <4200000>;
155 };
156
157 reg_vsd: regulator-vsd {
158 compatible = "regulator-fixed";
159 regulator-name = "VSD_3V3";
160 regulator-min-microvolt = <3300000>;
161 regulator-max-microvolt = <3300000>;
162 };
163 };
164
165 &adc1 {
166 #io-channel-cells = <1>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&mux_adc>;
169 vref-supply = <®_vref>;
170 status = "okay";
171 };
172
173 &csi {
174 pinctrl-names = "default";
175 pinctrl-0 = <&mux_csi>;
176 status = "okay";
177
178 port {
179 parallel_from_gc0308: endpoint {
180 remote-endpoint = <&gc0308_to_parallel>;
181 };
182 };
183 };
184
185 &ecspi3 {
186 cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&mux_spi3>;
189 status = "okay";
190
191 panel@0 {
192 compatible = "inanbo,t28cp45tn89-v17";
193 reg = <0>;
194 backlight = <&panel_backlight>;
195 power-supply = <®_vsd>;
196 spi-cpha;
197 spi-cpol;
198 spi-max-frequency = <1000000>;
199 spi-rx-bus-width = <0>;
200
201 port {
202 panel_in: endpoint {
203 remote-endpoint = <&display_out>;
204 };
205 };
206 };
207 };
208
209 &gpio1 {
210 ir-reset-hog {
211 gpio-hog;
212 gpios = <3 GPIO_ACTIVE_LOW>;
213 line-name = "ir-reset-gpio";
214 output-low;
215 pinctrl-names = "default";
216 pinctrl-0 = <&mux_ir_reset>;
217 };
218 };
219
220 &gpio2 {
221 /* configuring this to output-high results in poweroff */
222 power-en-hog {
223 gpio-hog;
224 gpios = <6 GPIO_ACTIVE_HIGH>;
225 line-name = "power-en-gpio";
226 output-low;
227 pinctrl-names = "default";
228 pinctrl-0 = <&mux_poweroff2>;
229 };
230 };
231
232 &i2c1 {
233 clock-frequency = <100000>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&mux_i2c1>;
236 status = "okay";
237
238 camera@21 {
239 compatible = "galaxycore,gc0308";
240 reg = <0x21>;
241 clocks = <&clks IMX6UL_CLK_CSI>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&mux_gc0308>;
244 powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
245 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
246 vdd28-supply = <®_vsd>;
247
248 port {
249 gc0308_to_parallel: endpoint {
250 remote-endpoint = <¶llel_from_gc0308>;
251 bus-width = <8>;
252 data-shift = <2>; /* lines 9:2 are used */
253 hsync-active = <1>; /* active high */
254 vsync-active = <1>; /* active high */
255 data-active = <1>; /* active high */
256 pclk-sample = <1>; /* sample on rising edge */
257 };
258 };
259 };
260 };
261
262 &i2c2 {
263 clock-frequency = <100000>;
264 pinctrl-names = "default";
265 pinctrl-0 = <&mux_i2c2>;
266 status = "okay";
267
268 rtc@51 {
269 compatible = "nxp,pcf8563";
270 reg = <0x51>;
271 };
272 };
273
274 &lcdif {
275 assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
276 assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&mux_lcd_data>, <&mux_lcd_ctrl>;
279 status = "okay";
280
281 port {
282 display_out: endpoint {
283 remote-endpoint = <&panel_in>;
284 };
285 };
286 };
287
288 &pwm1 {
289 pinctrl-names = "default";
290 pinctrl-0 = <&mux_pwm>;
291 status = "okay";
292 };
293
294 &uart1 {
295 pinctrl-names = "default";
296 pinctrl-0 = <&mux_uart>;
297 status = "okay";
298 };
299
300 &usbotg1 {
301 /* USB-C connector */
302 disable-over-current;
303 dr_mode = "otg";
304 status = "okay";
305 };
306
307 &usbotg2 {
308 /* thermal sensor */
309 disable-over-current;
310 dr_mode = "host";
311 status = "okay";
312 };
313
314 &usbphy1 {
315 fsl,tx-d-cal = <106>;
316 };
317
318 &usbphy2 {
319 fsl,tx-d-cal = <106>;
320 };
321
322 &usdhc1 {
323 /* MicroSD */
324 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
325 keep-power-in-suspend;
326 no-1-8-v;
327 pinctrl-names = "default", "state_100mhz", "state_200mhz";
328 pinctrl-0 = <&mux_sdhc1>, <&mux_sdhc1_cd>;
329 pinctrl-1 = <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>;
330 pinctrl-2 = <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>;
331 wakeup-source;
332 vmmc-supply = <®_vsd>;
333 status = "okay";
334 };
335
336 &usdhc2 {
337 /* eMMC */
338 keep-power-in-suspend;
339 no-1-8-v;
340 non-removable;
341 pinctrl-names = "default";
342 pinctrl-0 = <&mux_sdhc2>;
343 wakeup-source;
344 status = "okay";
345 };
346
347 &wdog1 {
348 pinctrl-names = "default";
349 pinctrl-0 = <&mux_wdog>;
350 };
351
352 &iomuxc {
353 mux_adc: adcgrp {
354 fsl,pins = <
355 MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0
356 >;
357 };
358
359 mux_backlight_enable: blenablegrp {
360 fsl,pins = <
361 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008
362 >;
363 };
364
365 mux_charger_stat1: charger1grp {
366 fsl,pins = <
367 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008
368 >;
369 };
370
371 mux_charger_stat2: charger2grp {
372 fsl,pins = <
373 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008
374 >;
375 };
376
377 mux_csi: csi1grp {
378 fsl,pins = <
379 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
380 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
381 MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
382 MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
383 MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
384 MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
385 MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
386 MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
387 MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
388 MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
389 MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
390 >;
391 };
392
393 mux_gc0308: gc0308grp {
394 fsl,pins = <
395 MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038
396 MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088
397 MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088
398 >;
399 };
400
401 mux_gpio_keys: gpiokeygrp {
402 fsl,pins = <
403 MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008
404 MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008
405 MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008
406 MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008
407 MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008
408 MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008
409 MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008
410 MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008
411 MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008
412 MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008
413 >;
414 };
415
416 mux_i2c1: i2c1grp {
417 fsl,pins = <
418 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
419 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
420 >;
421 };
422
423 mux_i2c2: i2c2grp {
424 fsl,pins = <
425 MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8
426 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8
427 >;
428 };
429
430 mux_ir_reset: irresetgrp {
431 fsl,pins = <
432 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008
433 >;
434 };
435
436 mux_lcd_ctrl: lcdifctrlgrp {
437 fsl,pins = <
438 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
439 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
440 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
441 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
442 >;
443 };
444
445 mux_lcd_data: lcdifdatgrp {
446 fsl,pins = <
447 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
448 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
449 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
450 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
451 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
452 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
453 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
454 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
455 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
456 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
457 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
458 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
459 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
460 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
461 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
462 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
463 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
464 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
465 >;
466 };
467
468 mux_led_ctrl: ledctrlgrp {
469 fsl,pins = <
470 MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008
471 >;
472 };
473
474 mux_poweroff: poweroffgrp {
475 fsl,pins = <
476 MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008
477 >;
478 };
479
480 mux_poweroff2: poweroff2grp {
481 fsl,pins = <
482 MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008
483 >;
484 };
485
486 mux_pwm: pwm1grp {
487 fsl,pins = <
488 MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
489 >;
490 };
491
492 mux_sdhc1: sdhc1grp {
493 fsl,pins = <
494 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
495 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
496 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
497 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
498 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
499 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
500 >;
501 };
502
503 mux_sdhc1_100mhz: sdhc1-100mhz-grp {
504 fsl,pins = <
505 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
506 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9
507 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
508 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
509 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
510 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
511 >;
512 };
513
514 mux_sdhc1_200mhz: sdhc1-200mhz-grp {
515 fsl,pins = <
516 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
517 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9
518 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
519 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
520 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
521 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
522 >;
523 };
524
525 mux_sdhc1_cd: sdhc1-cd-grp {
526 fsl,pins = <
527 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
528 >;
529 };
530
531 mux_sdhc2: sdhc2grp {
532 fsl,pins = <
533 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
534 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
535 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
536 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
537 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
538 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
539 MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
540 MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
541 MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
542 MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
543 >;
544 };
545
546 mux_spi3: ecspi3grp {
547 fsl,pins = <
548 MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1
549 MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1
550 MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008
551 >;
552 };
553
554 mux_uart: uartgrp {
555 fsl,pins = <
556 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
557 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
558 >;
559 };
560
561 mux_wdog: wdoggrp {
562 fsl,pins = <
563 MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
564 >;
565 };
566 };
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