1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2021-2022 NXP
4 *
5 */
6
7 /dts-v1/;
8 #include "ls1021a.dtsi"
9
10 / {
11 model = "LS1021A-IOT Board";
12 compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
13
14 sys_mclk: clock-mclk {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <24576000>;
18 };
19
20 reg_3p3v: regulator-3V3 {
21 compatible = "regulator-fixed";
22 regulator-name = "3P3V";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-always-on;
26 };
27
28 reg_2p5v: regulator-2V5 {
29 compatible = "regulator-fixed";
30 regulator-name = "2P5V";
31 regulator-min-microvolt = <2500000>;
32 regulator-max-microvolt = <2500000>;
33 regulator-always-on;
34 };
35
36 sound {
37 compatible = "simple-audio-card";
38 simple-audio-card,format = "i2s";
39 simple-audio-card,widgets =
40 "Microphone", "Microphone Jack",
41 "Headphone", "Headphone Jack",
42 "Speaker", "Speaker Ext",
43 "Line", "Line In Jack";
44 simple-audio-card,routing =
45 "MIC_IN", "Microphone Jack",
46 "Microphone Jack", "Mic Bias",
47 "LINE_IN", "Line In Jack",
48 "Headphone Jack", "HP_OUT",
49 "Speaker Ext", "LINE_OUT";
50
51 simple-audio-card,cpu {
52 sound-dai = <&sai2>;
53 frame-master;
54 bitclock-master;
55 };
56
57 simple-audio-card,codec {
58 sound-dai = <&sgtl5000>;
59 frame-master;
60 bitclock-master;
61 };
62 };
63 };
64
65 &can0 {
66 status = "disabled";
67 };
68
69 &can1 {
70 status = "disabled";
71 };
72
73 &can2 {
74 status = "disabled";
75 };
76
77 &can3 {
78 status = "okay";
79 };
80
81 &dcu {
82 display = <&display>;
83 status = "okay";
84
85 display: display@0 {
86 bits-per-pixel = <24>;
87
88 display-timings {
89 native-mode = <&timing0>;
90
91 timing0: mode0 {
92 clock-frequency = <25000000>;
93 hactive = <640>;
94 vactive = <480>;
95 hback-porch = <80>;
96 hfront-porch = <80>;
97 vback-porch = <16>;
98 vfront-porch = <16>;
99 hsync-len = <12>;
100 vsync-len = <2>;
101 hsync-active = <1>;
102 vsync-active = <1>;
103 };
104 };
105 };
106 };
107
108 &enet0 {
109 tbi-handle = <&tbi1>;
110 phy-handle = <&phy1>;
111 phy-connection-type = "sgmii";
112 status = "okay";
113 };
114
115 &enet1 {
116 tbi-handle = <&tbi1>;
117 phy-handle = <&phy3>;
118 phy-connection-type = "sgmii";
119 status = "okay";
120 };
121
122 &enet2 {
123 fixed-link = <0 1 1000 0 0>;
124 phy-connection-type = "rgmii-id";
125 status = "okay";
126 };
127
128 &esdhc {
129 status = "okay";
130 };
131
132 &i2c0 {
133 status = "okay";
134
135 pca9555: gpio@23 {
136 compatible = "nxp,pca9555";
137 reg = <0x23>;
138 gpio-controller;
139 #gpio-cells = <2>;
140 interrupt-controller;
141 #interrupt-cells = <2>;
142 };
143
144 sgtl5000: audio-codec@2a {
145 #sound-dai-cells = <0x0>;
146 compatible = "fsl,sgtl5000";
147 reg = <0x2a>;
148 VDDA-supply = <®_3p3v>;
149 VDDIO-supply = <®_2p5v>;
150 clocks = <&sys_mclk>;
151 };
152
153 max1239: adc@35 {
154 compatible = "maxim,max1239";
155 reg = <0x35>;
156 #io-channel-cells = <1>;
157 };
158
159 ina2201: core-monitor@44 {
160 compatible = "ti,ina220";
161 reg = <0x44>;
162 shunt-resistor = <1000>;
163 };
164
165 ina2202: current-monitor@45 {
166 compatible = "ti,ina220";
167 reg = <0x45>;
168 shunt-resistor = <1000>;
169 };
170
171 lm75b: thermal-monitor@48 {
172 compatible = "national,lm75b";
173 reg = <0x48>;
174 };
175 };
176
177 &lpuart0 {
178 status = "okay";
179 };
180
181 &mdio0 {
182 phy0: ethernet-phy@0 {
183 reg = <0x0>;
184 };
185
186 phy1: ethernet-phy@1 {
187 reg = <0x1>;
188 };
189
190 phy2: ethernet-phy@2 {
191 reg = <0x2>;
192 };
193
194 phy3: ethernet-phy@3 {
195 reg = <0x3>;
196 };
197
198 tbi1: tbi-phy@1f {
199 reg = <0x1f>;
200 device_type = "tbi-phy";
201 };
202 };
203
204 &qspi {
205 num-cs = <2>;
206 status = "okay";
207
208 s25fl128s: flash@0 {
209 compatible = "jedec,spi-nor";
210 #address-cells = <1>;
211 #size-cells = <1>;
212 spi-max-frequency = <20000000>;
213 reg = <0>;
214 };
215 };
216
217 &sai2 {
218 status = "okay";
219 };
220
221 &uart0 {
222 status = "okay";
223 };
224
225 &uart1 {
226 status = "okay";
227 };
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