1 /*
2 * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
3 *
4 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
5 * Freescale Semiconductor, Inc.
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45 #include "vf610.dtsi"
46
47 / {
48 chosen {
49 stdout-path = "serial0:115200n8";
50 };
51
52 memory@80000000 {
53 device_type = "memory";
54 reg = <0x80000000 0x20000000>;
55 };
56
57 gpio-leds {
58 compatible = "gpio-leds";
59 pinctrl-0 = <&pinctrl_leds_debug>;
60 pinctrl-names = "default";
61
62 led-debug {
63 label = "zii:green:debug1";
64 gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
66 };
67 };
68
69 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
70 compatible = "regulator-fixed";
71 regulator-name = "vcc_3v3_mcu";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74 };
75
76 usb0_vbus: regulator-usb0-vbus {
77 compatible = "regulator-fixed";
78 pinctrl-0 = <&pinctrl_usb_vbus>;
79 regulator-name = "usb_vbus";
80 regulator-min-microvolt = <5000000>;
81 regulator-max-microvolt = <5000000>;
82 enable-active-high;
83 regulator-always-on;
84 regulator-boot-on;
85 gpio = <&gpio0 6 0>;
86 };
87
88 supply-voltage-monitor {
89 compatible = "iio-hwmon";
90 io-channels = <&adc0 8>, /* VCC_1V5 */
91 <&adc0 9>, /* VCC_1V8 */
92 <&adc1 8>, /* VCC_1V0 */
93 <&adc1 9>; /* VCC_1V2 */
94 };
95 };
96
97 &adc0 {
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_adc0_ad5>;
100 vref-supply = <®_vcc_3v3_mcu>;
101 status = "okay";
102 };
103
104 &edma0 {
105 status = "okay";
106 };
107
108 &edma1 {
109 status = "okay";
110 };
111
112 &esdhc1 {
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_esdhc1>;
115 bus-width = <4>;
116 status = "okay";
117 };
118
119 &fec0 {
120 phy-mode = "rmii";
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_fec0>;
123 status = "okay";
124 };
125
126 &fec1 {
127 phy-mode = "rmii";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_fec1>;
130 status = "okay";
131
132 fixed-link {
133 speed = <100>;
134 full-duplex;
135 };
136
137 mdio1: mdio {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 clock-frequency = <12500000>;
141 suppress-preamble;
142 status = "okay";
143 };
144 };
145
146 &i2c0 {
147 clock-frequency = <100000>;
148 pinctrl-names = "default", "gpio";
149 pinctrl-0 = <&pinctrl_i2c0>;
150 pinctrl-1 = <&pinctrl_i2c0_gpio>;
151 scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
152 sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
153 status = "okay";
154
155 lm75@48 {
156 compatible = "national,lm75";
157 reg = <0x48>;
158 };
159
160 eeprom@50 {
161 compatible = "atmel,24c04";
162 reg = <0x50>;
163 };
164
165 eeprom@52 {
166 compatible = "atmel,24c04";
167 reg = <0x52>;
168 };
169
170 ds1682@6b {
171 compatible = "dallas,ds1682";
172 reg = <0x6b>;
173 };
174 };
175
176 &i2c1 {
177 clock-frequency = <100000>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c1>;
180 status = "okay";
181 };
182
183 &i2c2 {
184 clock-frequency = <100000>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_i2c2>;
187 status = "okay";
188 };
189
190 &qspi0 {
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_qspi0>;
193 status = "okay";
194
195 /*
196 * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR
197 * modes, so, spi-max-frequency is limited to 90MHz
198 */
199 flash@0 {
200 compatible = "jedec,spi-nor";
201 #address-cells = <1>;
202 #size-cells = <1>;
203 spi-max-frequency = <90000000>;
204 spi-rx-bus-width = <4>;
205 reg = <0>;
206 m25p,fast-read;
207 };
208
209 flash@2 {
210 compatible = "jedec,spi-nor";
211 #address-cells = <1>;
212 #size-cells = <1>;
213 spi-max-frequency = <90000000>;
214 spi-rx-bus-width = <4>;
215 reg = <2>;
216 m25p,fast-read;
217 };
218 };
219
220 &uart0 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_uart0>;
223 status = "okay";
224 };
225
226 &uart1 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_uart1>;
229 status = "okay";
230 };
231
232 &uart2 {
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_uart2>;
235 status = "okay";
236 };
237
238 &usbdev0 {
239 disable-over-current;
240 vbus-supply = <&usb0_vbus>;
241 dr_mode = "host";
242 status = "okay";
243 };
244
245 &usbh1 {
246 disable-over-current;
247 status = "okay";
248 };
249
250 &usbmisc0 {
251 status = "okay";
252 };
253
254 &usbmisc1 {
255 status = "okay";
256 };
257
258 &usbphy0 {
259 status = "okay";
260 };
261
262 &usbphy1 {
263 status = "okay";
264 };
265
266 &tempsensor {
267 io-channels = <&adc0 16>;
268 };
269
270 &iomuxc {
271 pinctrl_adc0_ad5: adc0ad5grp {
272 fsl,pins = <
273 VF610_PAD_PTC30__ADC0_SE5 0x00a1
274 >;
275 };
276
277 pinctrl_dspi0: dspi0grp {
278 fsl,pins = <
279 VF610_PAD_PTB18__DSPI0_CS1 0x1182
280 VF610_PAD_PTB19__DSPI0_CS0 0x1182
281 VF610_PAD_PTB20__DSPI0_SIN 0x1181
282 VF610_PAD_PTB21__DSPI0_SOUT 0x1182
283 VF610_PAD_PTB22__DSPI0_SCK 0x1182
284 >;
285 };
286
287 pinctrl_dspi2: dspi2grp {
288 fsl,pins = <
289 VF610_PAD_PTD31__DSPI2_CS1 0x1182
290 VF610_PAD_PTD30__DSPI2_CS0 0x1182
291 VF610_PAD_PTD29__DSPI2_SIN 0x1181
292 VF610_PAD_PTD28__DSPI2_SOUT 0x1182
293 VF610_PAD_PTD27__DSPI2_SCK 0x1182
294 >;
295 };
296
297 pinctrl_esdhc1: esdhc1grp {
298 fsl,pins = <
299 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
300 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
301 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
302 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
303 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
304 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
305 VF610_PAD_PTA7__GPIO_134 0x219d
306 >;
307 };
308
309 pinctrl_fec0: fec0grp {
310 fsl,pins = <
311 VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2
312 VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
313 VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
314 VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
315 VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
316 VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
317 VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
318 VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
319 VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
320 >;
321 };
322
323 pinctrl_fec1: fec1grp {
324 fsl,pins = <
325 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
326 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
327 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
328 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
329 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
330 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
331 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
332 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
333 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
334 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
335 >;
336 };
337
338 pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
339 fsl,pins = <
340 VF610_PAD_PTB22__GPIO_44 0x33e2
341 VF610_PAD_PTB21__GPIO_43 0x33e2
342 VF610_PAD_PTB20__GPIO_42 0x33e1
343 VF610_PAD_PTB19__GPIO_41 0x33e2
344 VF610_PAD_PTB18__GPIO_40 0x33e2
345 >;
346 };
347
348 pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
349 fsl,pins = <
350 VF610_PAD_PTB5__GPIO_27 0x219d
351 >;
352 };
353
354 pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
355 fsl,pins = <
356 VF610_PAD_PTB4__GPIO_26 0x219d
357 >;
358 };
359
360 pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
361 fsl,pins = <
362 VF610_PAD_PTE14__GPIO_119 0x31c2
363 >;
364 };
365
366 pinctrl_i2c0: i2c0grp {
367 fsl,pins = <
368 VF610_PAD_PTB14__I2C0_SCL 0x37ff
369 VF610_PAD_PTB15__I2C0_SDA 0x37ff
370 >;
371 };
372
373 pinctrl_i2c0_gpio: i2c0grp-gpio {
374 fsl,pins = <
375 VF610_PAD_PTB14__GPIO_36 0x31c2
376 VF610_PAD_PTB15__GPIO_37 0x31c2
377 >;
378 };
379
380
381 pinctrl_i2c1: i2c1grp {
382 fsl,pins = <
383 VF610_PAD_PTB16__I2C1_SCL 0x37ff
384 VF610_PAD_PTB17__I2C1_SDA 0x37ff
385 >;
386 };
387
388 pinctrl_i2c2: i2c2grp {
389 fsl,pins = <
390 VF610_PAD_PTA22__I2C2_SCL 0x37ff
391 VF610_PAD_PTA23__I2C2_SDA 0x37ff
392 >;
393 };
394
395 pinctrl_leds_debug: pinctrl-leds-debug {
396 fsl,pins = <
397 VF610_PAD_PTD20__GPIO_74 0x31c2
398 >;
399 };
400
401 pinctrl_qspi0: qspi0grp {
402 fsl,pins = <
403 VF610_PAD_PTD0__QSPI0_A_QSCK 0x38c2
404 VF610_PAD_PTD1__QSPI0_A_CS0 0x38c2
405 VF610_PAD_PTD2__QSPI0_A_DATA3 0x38c3
406 VF610_PAD_PTD3__QSPI0_A_DATA2 0x38c3
407 VF610_PAD_PTD4__QSPI0_A_DATA1 0x38c3
408 VF610_PAD_PTD5__QSPI0_A_DATA0 0x38c3
409 VF610_PAD_PTD7__QSPI0_B_QSCK 0x38c2
410 VF610_PAD_PTD8__QSPI0_B_CS0 0x38c2
411 VF610_PAD_PTD9__QSPI0_B_DATA3 0x38c3
412 VF610_PAD_PTD10__QSPI0_B_DATA2 0x38c3
413 VF610_PAD_PTD11__QSPI0_B_DATA1 0x38c3
414 VF610_PAD_PTD12__QSPI0_B_DATA0 0x38c3
415 >;
416 };
417
418 pinctrl_uart0: uart0grp {
419 fsl,pins = <
420 VF610_PAD_PTB10__UART0_TX 0x21a2
421 VF610_PAD_PTB11__UART0_RX 0x21a1
422 >;
423 };
424
425 pinctrl_uart1: uart1grp {
426 fsl,pins = <
427 VF610_PAD_PTB23__UART1_TX 0x21a2
428 VF610_PAD_PTB24__UART1_RX 0x21a1
429 >;
430 };
431
432 pinctrl_uart2: uart2grp {
433 fsl,pins = <
434 VF610_PAD_PTD23__UART2_TX 0x21a2
435 VF610_PAD_PTD22__UART2_RX 0x21a1
436 >;
437 };
438
439 pinctrl_usb_vbus: pinctrl-usb-vbus {
440 fsl,pins = <
441 VF610_PAD_PTA16__GPIO_6 0x31c2
442 >;
443 };
444
445 pinctrl_usb0_host: usb0-host-grp {
446 fsl,pins = <
447 VF610_PAD_PTD6__GPIO_85 0x0062
448 >;
449 };
450 };
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