1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the iWave-RZ/G1H Qseven board
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8 /*
9 * SSI-SGTL5000
10 *
11 * This command is required when Playback/Capture
12 *
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
15 *
16 * You can use Mute
17 *
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
20 *
21 * You can use Volume Ramp
22 *
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
26 * aplay xxx.wav &
27 * amixer set "DVC Out" 80% // Volume Down
28 * amixer set "DVC Out" 100% // Volume Up
29 */
30
31 /dts-v1/;
32 #include "r8a7742-iwg21m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
34
35 / {
36 model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H";
37 compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
38
39 aliases {
40 serial2 = &scifa2;
41 serial4 = &scifb2;
42 ethernet0 = &avb;
43 };
44
45 chosen {
46 bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
47 stdout-path = "serial2:115200n8";
48 };
49
50 audio_clock: audio_clock {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <26000000>;
54 };
55
56 lcd_backlight: backlight {
57 compatible = "pwm-backlight";
58 pwms = <&tpu 2 5000000 0>;
59 brightness-levels = <0 4 8 16 32 64 128 255>;
60 pinctrl-0 = <&backlight_pins>;
61 pinctrl-names = "default";
62 default-brightness-level = <7>;
63 enable-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
64 };
65
66 leds {
67 compatible = "gpio-leds";
68
69 sdhi2_led {
70 label = "sdio-led";
71 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "mmc1";
73 };
74 };
75
76 lvds-receiver {
77 compatible = "ti,ds90cf384a", "lvds-decoder";
78 power-supply = <&vcc_3v3_tft1>;
79
80 ports {
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 port@0 {
85 reg = <0>;
86 lvds_receiver_in: endpoint {
87 remote-endpoint = <&lvds0_out>;
88 };
89 };
90 port@1 {
91 reg = <1>;
92 lvds_receiver_out: endpoint {
93 remote-endpoint = <&panel_in>;
94 };
95 };
96 };
97 };
98
99 panel {
100 compatible = "edt,etm0700g0dh6";
101 backlight = <&lcd_backlight>;
102 power-supply = <&vcc_3v3_tft1>;
103
104 port {
105 panel_in: endpoint {
106 remote-endpoint = <&lvds_receiver_out>;
107 };
108 };
109 };
110
111 reg_1p5v: 1p5v {
112 compatible = "regulator-fixed";
113 regulator-name = "1P5V";
114 regulator-min-microvolt = <1500000>;
115 regulator-max-microvolt = <1500000>;
116 regulator-always-on;
117 };
118
119 rsnd_sgtl5000: sound {
120 compatible = "simple-audio-card";
121 simple-audio-card,format = "i2s";
122 simple-audio-card,bitclock-master = <&sndcodec>;
123 simple-audio-card,frame-master = <&sndcodec>;
124
125 sndcpu: simple-audio-card,cpu {
126 sound-dai = <&rcar_sound>;
127 };
128
129 sndcodec: simple-audio-card,codec {
130 sound-dai = <&sgtl5000>;
131 };
132 };
133
134 vcc_3v3_tft1: regulator-panel {
135 compatible = "regulator-fixed";
136
137 regulator-name = "vcc-3v3-tft1";
138 regulator-min-microvolt = <3300000>;
139 regulator-max-microvolt = <3300000>;
140 enable-active-high;
141 startup-delay-us = <500>;
142 gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
143 };
144
145 vcc_sdhi2: regulator-vcc-sdhi2 {
146 compatible = "regulator-fixed";
147
148 regulator-name = "SDHI2 Vcc";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151
152 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
153 };
154
155 vccq_sdhi2: regulator-vccq-sdhi2 {
156 compatible = "regulator-gpio";
157
158 regulator-name = "SDHI2 VccQ";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <3300000>;
161
162 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
163 gpios-states = <1>;
164 states = <3300000 1>, <1800000 0>;
165 };
166 };
167
168 &avb {
169 pinctrl-0 = <&avb_pins>;
170 pinctrl-names = "default";
171
172 phy-handle = <&phy3>;
173 phy-mode = "gmii";
174 renesas,no-ether-link;
175 status = "okay";
176
177 phy3: ethernet-phy@3 {
178 compatible = "ethernet-phy-id0022.1622",
179 "ethernet-phy-ieee802.3-c22";
180 reg = <3>;
181 micrel,led-mode = <1>;
182 };
183 };
184
185 &i2c2 {
186 pinctrl-0 = <&i2c2_pins>;
187 pinctrl-names = "default";
188
189 status = "okay";
190 clock-frequency = <400000>;
191
192 sgtl5000: codec@a {
193 compatible = "fsl,sgtl5000";
194 #sound-dai-cells = <0>;
195 reg = <0x0a>;
196 clocks = <&audio_clock>;
197 VDDA-supply = <®_3p3v>;
198 VDDIO-supply = <®_3p3v>;
199 VDDD-supply = <®_1p5v>;
200 };
201
202 touch: touchpanel@38 {
203 compatible = "edt,edt-ft5406";
204 reg = <0x38>;
205 interrupt-parent = <&gpio0>;
206 interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
207 /* GP1_29 is also shared with audio codec reset pin */
208 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
209 vcc-supply = <&vcc_3v3_tft1>;
210 };
211 };
212
213 &can1 {
214 pinctrl-0 = <&can1_pins>;
215 pinctrl-names = "default";
216
217 status = "okay";
218 };
219
220 &cmt0 {
221 status = "okay";
222 };
223
224 &du {
225 status = "okay";
226 };
227
228 &gpio0 {
229 touch-interrupt-hog {
230 gpio-hog;
231 gpios = <24 GPIO_ACTIVE_LOW>;
232 input;
233 };
234 };
235
236 &gpio1 {
237 can-trx-en-hog {
238 gpio-hog;
239 gpios = <28 GPIO_ACTIVE_HIGH>;
240 output-low;
241 line-name = "can-trx-en-gpio";
242 };
243 };
244
245 &hsusb {
246 pinctrl-0 = <&usb0_pins>;
247 pinctrl-names = "default";
248 status = "okay";
249 };
250
251 &lvds0 {
252 status = "okay";
253 ports {
254 port@1 {
255 lvds0_out: endpoint {
256 remote-endpoint = <&lvds_receiver_in>;
257 };
258 };
259 };
260 };
261
262 &msiof0 {
263 pinctrl-0 = <&msiof0_pins>;
264 pinctrl-names = "default";
265 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
266
267 status = "okay";
268
269 flash1: flash@0 {
270 compatible = "sst,sst25vf016b", "jedec,spi-nor";
271 reg = <0>;
272 spi-max-frequency = <50000000>;
273 m25p,fast-read;
274
275 partitions {
276 compatible = "fixed-partitions";
277 #address-cells = <1>;
278 #size-cells = <1>;
279
280 partition@0 {
281 label = "user";
282 reg = <0x00000000 0x00200000>;
283 };
284 };
285 };
286 };
287
288 &pci0 {
289 pinctrl-0 = <&usb0_pins>;
290 pinctrl-names = "default";
291 /* Disable hsusb to enable USB2.0 host mode support on J2 */
292 /* status = "okay"; */
293 };
294
295 &pci1 {
296 pinctrl-0 = <&usb1_pins>;
297 pinctrl-names = "default";
298 status = "okay";
299 };
300
301 &pci2 {
302 /* Disable xhci to enable USB2.0 host mode support on J23 bottom port */
303 /* status = "okay"; */
304 };
305
306 &pcie_bus_clk {
307 clock-frequency = <100000000>;
308 };
309
310 &pciec {
311 /* SW2[6] determines which connector is activated
312 * ON = PCIe X4 (connector-J7)
313 * OFF = mini-PCIe (connector-J26)
314 */
315 status = "okay";
316 };
317
318 &pfc {
319 avb_pins: avb {
320 groups = "avb_mdio", "avb_gmii";
321 function = "avb";
322 };
323
324 backlight_pins: backlight {
325 groups = "tpu0_to2";
326 function = "tpu0";
327 };
328
329 can1_pins: can1 {
330 groups = "can1_data_b";
331 function = "can1";
332 };
333
334 i2c2_pins: i2c2 {
335 groups = "i2c2_b";
336 function = "i2c2";
337 };
338
339 msiof0_pins: msiof0 {
340 groups = "msiof0_clk", "msiof0_sync", "msiof0_tx", "msiof0_rx";
341 function = "msiof0";
342 };
343
344 scifa2_pins: scifa2 {
345 groups = "scifa2_data_c";
346 function = "scifa2";
347 };
348
349 scifb2_pins: scifb2 {
350 groups = "scifb2_data", "scifb2_ctrl";
351 function = "scifb2";
352 };
353
354 sdhi2_pins: sd2 {
355 groups = "sdhi2_data4", "sdhi2_ctrl";
356 function = "sdhi2";
357 power-source = <3300>;
358 };
359
360 sdhi2_pins_uhs: sd2_uhs {
361 groups = "sdhi2_data4", "sdhi2_ctrl";
362 function = "sdhi2";
363 power-source = <1800>;
364 };
365
366 sound_pins: sound {
367 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
368 function = "ssi";
369 };
370
371 usb0_pins: usb0 {
372 groups = "usb0";
373 function = "usb0";
374 };
375
376 usb1_pins: usb1 {
377 groups = "usb1_pwen";
378 function = "usb1";
379 };
380 };
381
382 &rcar_sound {
383 pinctrl-0 = <&sound_pins>;
384 pinctrl-names = "default";
385 status = "okay";
386
387 /* Single DAI */
388 #sound-dai-cells = <0>;
389
390 rcar_sound,dai {
391 dai0 {
392 playback = <&ssi4>, <&src4>, <&dvc1>;
393 capture = <&ssi3>, <&src3>, <&dvc0>;
394 };
395 };
396 };
397
398 &rwdt {
399 timeout-sec = <60>;
400 status = "okay";
401 };
402
403 &scifa2 {
404 pinctrl-0 = <&scifa2_pins>;
405 pinctrl-names = "default";
406
407 status = "okay";
408 };
409
410 &scifb2 {
411 pinctrl-0 = <&scifb2_pins>;
412 pinctrl-names = "default";
413
414 uart-has-rtscts;
415 status = "okay";
416 };
417
418 &sdhi2 {
419 pinctrl-0 = <&sdhi2_pins>;
420 pinctrl-1 = <&sdhi2_pins_uhs>;
421 pinctrl-names = "default", "state_uhs";
422
423 vmmc-supply = <&vcc_sdhi2>;
424 vqmmc-supply = <&vccq_sdhi2>;
425 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
426 wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
427 sd-uhs-sdr50;
428 status = "okay";
429 };
430
431 &ssi4 {
432 shared-pin;
433 };
434
435 &tpu {
436 status = "okay";
437 };
438
439 &usbphy {
440 status = "okay";
441 };
442
443 &xhci {
444 status = "okay";
445 };
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