1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
9
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
14
15 / {
16 compatible = "renesas,r8a7790";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &iic0;
26 i2c5 = &iic1;
27 i2c6 = &iic2;
28 i2c7 = &iic3;
29 spi0 = &qspi;
30 spi1 = &msiof0;
31 spi2 = &msiof1;
32 spi3 = &msiof2;
33 spi4 = &msiof3;
34 vin0 = &vin0;
35 vin1 = &vin1;
36 vin2 = &vin2;
37 vin3 = &vin3;
38 };
39
40 /*
41 * The external audio clocks are configured as 0 Hz fixed frequency
42 * clocks by default.
43 * Boards that provide audio clocks should override them.
44 */
45 audio_clk_a: audio_clk_a {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
50 audio_clk_b: audio_clk_b {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55 audio_clk_c: audio_clk_c {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 /* External CAN clock */
62 can_clk: can {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 /* This value must be overridden by the board. */
66 clock-frequency = <0>;
67 };
68
69 cpus {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 cpu0: cpu@0 {
74 device_type = "cpu";
75 compatible = "arm,cortex-a15";
76 reg = <0>;
77 clock-frequency = <1300000000>;
78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
79 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
80 enable-method = "renesas,apmu";
81 next-level-cache = <&L2_CA15>;
82 capacity-dmips-mhz = <1024>;
83 voltage-tolerance = <1>; /* 1% */
84 clock-latency = <300000>; /* 300 us */
85
86 /* kHz - uV - OPPs unknown yet */
87 operating-points = <1400000 1000000>,
88 <1225000 1000000>,
89 <1050000 1000000>,
90 < 875000 1000000>,
91 < 700000 1000000>,
92 < 350000 1000000>;
93 };
94
95 cpu1: cpu@1 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a15";
98 reg = <1>;
99 clock-frequency = <1300000000>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
102 enable-method = "renesas,apmu";
103 next-level-cache = <&L2_CA15>;
104 capacity-dmips-mhz = <1024>;
105 voltage-tolerance = <1>; /* 1% */
106 clock-latency = <300000>; /* 300 us */
107
108 /* kHz - uV - OPPs unknown yet */
109 operating-points = <1400000 1000000>,
110 <1225000 1000000>,
111 <1050000 1000000>,
112 < 875000 1000000>,
113 < 700000 1000000>,
114 < 350000 1000000>;
115 };
116
117 cpu2: cpu@2 {
118 device_type = "cpu";
119 compatible = "arm,cortex-a15";
120 reg = <2>;
121 clock-frequency = <1300000000>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
123 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
124 enable-method = "renesas,apmu";
125 next-level-cache = <&L2_CA15>;
126 capacity-dmips-mhz = <1024>;
127 voltage-tolerance = <1>; /* 1% */
128 clock-latency = <300000>; /* 300 us */
129
130 /* kHz - uV - OPPs unknown yet */
131 operating-points = <1400000 1000000>,
132 <1225000 1000000>,
133 <1050000 1000000>,
134 < 875000 1000000>,
135 < 700000 1000000>,
136 < 350000 1000000>;
137 };
138
139 cpu3: cpu@3 {
140 device_type = "cpu";
141 compatible = "arm,cortex-a15";
142 reg = <3>;
143 clock-frequency = <1300000000>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
145 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
146 enable-method = "renesas,apmu";
147 next-level-cache = <&L2_CA15>;
148 capacity-dmips-mhz = <1024>;
149 voltage-tolerance = <1>; /* 1% */
150 clock-latency = <300000>; /* 300 us */
151
152 /* kHz - uV - OPPs unknown yet */
153 operating-points = <1400000 1000000>,
154 <1225000 1000000>,
155 <1050000 1000000>,
156 < 875000 1000000>,
157 < 700000 1000000>,
158 < 350000 1000000>;
159 };
160
161 cpu4: cpu@100 {
162 device_type = "cpu";
163 compatible = "arm,cortex-a7";
164 reg = <0x100>;
165 clock-frequency = <780000000>;
166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
167 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
168 enable-method = "renesas,apmu";
169 next-level-cache = <&L2_CA7>;
170 capacity-dmips-mhz = <539>;
171 };
172
173 cpu5: cpu@101 {
174 device_type = "cpu";
175 compatible = "arm,cortex-a7";
176 reg = <0x101>;
177 clock-frequency = <780000000>;
178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
179 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
180 enable-method = "renesas,apmu";
181 next-level-cache = <&L2_CA7>;
182 capacity-dmips-mhz = <539>;
183 };
184
185 cpu6: cpu@102 {
186 device_type = "cpu";
187 compatible = "arm,cortex-a7";
188 reg = <0x102>;
189 clock-frequency = <780000000>;
190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
191 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
192 enable-method = "renesas,apmu";
193 next-level-cache = <&L2_CA7>;
194 capacity-dmips-mhz = <539>;
195 };
196
197 cpu7: cpu@103 {
198 device_type = "cpu";
199 compatible = "arm,cortex-a7";
200 reg = <0x103>;
201 clock-frequency = <780000000>;
202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
203 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
204 enable-method = "renesas,apmu";
205 next-level-cache = <&L2_CA7>;
206 capacity-dmips-mhz = <539>;
207 };
208
209 L2_CA15: cache-controller-0 {
210 compatible = "cache";
211 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
212 cache-unified;
213 cache-level = <2>;
214 };
215
216 L2_CA7: cache-controller-1 {
217 compatible = "cache";
218 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
219 cache-unified;
220 cache-level = <2>;
221 };
222 };
223
224 /* External root clock */
225 extal_clk: extal {
226 compatible = "fixed-clock";
227 #clock-cells = <0>;
228 /* This value must be overridden by the board. */
229 clock-frequency = <0>;
230 };
231
232 /* External PCIe clock - can be overridden by the board */
233 pcie_bus_clk: pcie_bus {
234 compatible = "fixed-clock";
235 #clock-cells = <0>;
236 clock-frequency = <0>;
237 };
238
239 pmu-0 {
240 compatible = "arm,cortex-a15-pmu";
241 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
242 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
243 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
244 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
245 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
246 };
247
248 pmu-1 {
249 compatible = "arm,cortex-a7-pmu";
250 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
251 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
252 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
253 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
254 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
255 };
256
257 /* External SCIF clock */
258 scif_clk: scif {
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
261 /* This value must be overridden by the board. */
262 clock-frequency = <0>;
263 };
264
265 soc {
266 compatible = "simple-bus";
267 interrupt-parent = <&gic>;
268
269 #address-cells = <2>;
270 #size-cells = <2>;
271 ranges;
272
273 rwdt: watchdog@e6020000 {
274 compatible = "renesas,r8a7790-wdt",
275 "renesas,rcar-gen2-wdt";
276 reg = <0 0xe6020000 0 0x0c>;
277 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&cpg CPG_MOD 402>;
279 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
280 resets = <&cpg 402>;
281 status = "disabled";
282 };
283
284 gpio0: gpio@e6050000 {
285 compatible = "renesas,gpio-r8a7790",
286 "renesas,rcar-gen2-gpio";
287 reg = <0 0xe6050000 0 0x50>;
288 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
289 #gpio-cells = <2>;
290 gpio-controller;
291 gpio-ranges = <&pfc 0 0 32>;
292 #interrupt-cells = <2>;
293 interrupt-controller;
294 clocks = <&cpg CPG_MOD 912>;
295 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
296 resets = <&cpg 912>;
297 };
298
299 gpio1: gpio@e6051000 {
300 compatible = "renesas,gpio-r8a7790",
301 "renesas,rcar-gen2-gpio";
302 reg = <0 0xe6051000 0 0x50>;
303 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
304 #gpio-cells = <2>;
305 gpio-controller;
306 gpio-ranges = <&pfc 0 32 30>;
307 #interrupt-cells = <2>;
308 interrupt-controller;
309 clocks = <&cpg CPG_MOD 911>;
310 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
311 resets = <&cpg 911>;
312 };
313
314 gpio2: gpio@e6052000 {
315 compatible = "renesas,gpio-r8a7790",
316 "renesas,rcar-gen2-gpio";
317 reg = <0 0xe6052000 0 0x50>;
318 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
319 #gpio-cells = <2>;
320 gpio-controller;
321 gpio-ranges = <&pfc 0 64 30>;
322 #interrupt-cells = <2>;
323 interrupt-controller;
324 clocks = <&cpg CPG_MOD 910>;
325 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
326 resets = <&cpg 910>;
327 };
328
329 gpio3: gpio@e6053000 {
330 compatible = "renesas,gpio-r8a7790",
331 "renesas,rcar-gen2-gpio";
332 reg = <0 0xe6053000 0 0x50>;
333 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
334 #gpio-cells = <2>;
335 gpio-controller;
336 gpio-ranges = <&pfc 0 96 32>;
337 #interrupt-cells = <2>;
338 interrupt-controller;
339 clocks = <&cpg CPG_MOD 909>;
340 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
341 resets = <&cpg 909>;
342 };
343
344 gpio4: gpio@e6054000 {
345 compatible = "renesas,gpio-r8a7790",
346 "renesas,rcar-gen2-gpio";
347 reg = <0 0xe6054000 0 0x50>;
348 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
349 #gpio-cells = <2>;
350 gpio-controller;
351 gpio-ranges = <&pfc 0 128 32>;
352 #interrupt-cells = <2>;
353 interrupt-controller;
354 clocks = <&cpg CPG_MOD 908>;
355 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
356 resets = <&cpg 908>;
357 };
358
359 gpio5: gpio@e6055000 {
360 compatible = "renesas,gpio-r8a7790",
361 "renesas,rcar-gen2-gpio";
362 reg = <0 0xe6055000 0 0x50>;
363 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
364 #gpio-cells = <2>;
365 gpio-controller;
366 gpio-ranges = <&pfc 0 160 32>;
367 #interrupt-cells = <2>;
368 interrupt-controller;
369 clocks = <&cpg CPG_MOD 907>;
370 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
371 resets = <&cpg 907>;
372 };
373
374 pfc: pinctrl@e6060000 {
375 compatible = "renesas,pfc-r8a7790";
376 reg = <0 0xe6060000 0 0x250>;
377 };
378
379 tpu: pwm@e60f0000 {
380 compatible = "renesas,tpu-r8a7790", "renesas,tpu";
381 reg = <0 0xe60f0000 0 0x148>;
382 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&cpg CPG_MOD 304>;
384 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
385 resets = <&cpg 304>;
386 #pwm-cells = <3>;
387 status = "disabled";
388 };
389
390 cpg: clock-controller@e6150000 {
391 compatible = "renesas,r8a7790-cpg-mssr";
392 reg = <0 0xe6150000 0 0x1000>;
393 clocks = <&extal_clk>, <&usb_extal_clk>;
394 clock-names = "extal", "usb_extal";
395 #clock-cells = <2>;
396 #power-domain-cells = <0>;
397 #reset-cells = <1>;
398 };
399
400 apmu@e6151000 {
401 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
402 reg = <0 0xe6151000 0 0x188>;
403 cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
404 };
405
406 apmu@e6152000 {
407 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
408 reg = <0 0xe6152000 0 0x188>;
409 cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
410 };
411
412 rst: reset-controller@e6160000 {
413 compatible = "renesas,r8a7790-rst";
414 reg = <0 0xe6160000 0 0x0100>;
415 };
416
417 sysc: system-controller@e6180000 {
418 compatible = "renesas,r8a7790-sysc";
419 reg = <0 0xe6180000 0 0x0200>;
420 #power-domain-cells = <1>;
421 };
422
423 irqc0: interrupt-controller@e61c0000 {
424 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
425 #interrupt-cells = <2>;
426 interrupt-controller;
427 reg = <0 0xe61c0000 0 0x200>;
428 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
429 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
430 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
431 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cpg CPG_MOD 407>;
433 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
434 resets = <&cpg 407>;
435 };
436
437 tmu0: timer@e61e0000 {
438 compatible = "renesas,tmu-r8a7790", "renesas,tmu";
439 reg = <0 0xe61e0000 0 0x30>;
440 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
441 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
442 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
443 interrupt-names = "tuni0", "tuni1", "tuni2";
444 clocks = <&cpg CPG_MOD 125>;
445 clock-names = "fck";
446 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
447 resets = <&cpg 125>;
448 status = "disabled";
449 };
450
451 tmu1: timer@fff60000 {
452 compatible = "renesas,tmu-r8a7790", "renesas,tmu";
453 reg = <0 0xfff60000 0 0x30>;
454 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
458 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
459 clocks = <&cpg CPG_MOD 111>;
460 clock-names = "fck";
461 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
462 resets = <&cpg 111>;
463 status = "disabled";
464 };
465
466 tmu2: timer@fff70000 {
467 compatible = "renesas,tmu-r8a7790", "renesas,tmu";
468 reg = <0 0xfff70000 0 0x30>;
469 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
470 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
471 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
473 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
474 clocks = <&cpg CPG_MOD 122>;
475 clock-names = "fck";
476 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
477 resets = <&cpg 122>;
478 status = "disabled";
479 };
480
481 tmu3: timer@fff80000 {
482 compatible = "renesas,tmu-r8a7790", "renesas,tmu";
483 reg = <0 0xfff80000 0 0x30>;
484 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
487 interrupt-names = "tuni0", "tuni1", "tuni2";
488 clocks = <&cpg CPG_MOD 121>;
489 clock-names = "fck";
490 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
491 resets = <&cpg 121>;
492 status = "disabled";
493 };
494
495 thermal: thermal@e61f0000 {
496 compatible = "renesas,thermal-r8a7790",
497 "renesas,rcar-gen2-thermal",
498 "renesas,rcar-thermal";
499 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
500 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
501 clocks = <&cpg CPG_MOD 522>;
502 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
503 resets = <&cpg 522>;
504 #thermal-sensor-cells = <0>;
505 };
506
507 ipmmu_sy0: iommu@e6280000 {
508 compatible = "renesas,ipmmu-r8a7790",
509 "renesas,ipmmu-vmsa";
510 reg = <0 0xe6280000 0 0x1000>;
511 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
512 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
513 #iommu-cells = <1>;
514 status = "disabled";
515 };
516
517 ipmmu_sy1: iommu@e6290000 {
518 compatible = "renesas,ipmmu-r8a7790",
519 "renesas,ipmmu-vmsa";
520 reg = <0 0xe6290000 0 0x1000>;
521 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
522 #iommu-cells = <1>;
523 status = "disabled";
524 };
525
526 ipmmu_ds: iommu@e6740000 {
527 compatible = "renesas,ipmmu-r8a7790",
528 "renesas,ipmmu-vmsa";
529 reg = <0 0xe6740000 0 0x1000>;
530 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
532 #iommu-cells = <1>;
533 status = "disabled";
534 };
535
536 ipmmu_mp: iommu@ec680000 {
537 compatible = "renesas,ipmmu-r8a7790",
538 "renesas,ipmmu-vmsa";
539 reg = <0 0xec680000 0 0x1000>;
540 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
541 #iommu-cells = <1>;
542 status = "disabled";
543 };
544
545 ipmmu_mx: iommu@fe951000 {
546 compatible = "renesas,ipmmu-r8a7790",
547 "renesas,ipmmu-vmsa";
548 reg = <0 0xfe951000 0 0x1000>;
549 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
551 #iommu-cells = <1>;
552 status = "disabled";
553 };
554
555 ipmmu_rt: iommu@ffc80000 {
556 compatible = "renesas,ipmmu-r8a7790",
557 "renesas,ipmmu-vmsa";
558 reg = <0 0xffc80000 0 0x1000>;
559 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
560 #iommu-cells = <1>;
561 status = "disabled";
562 };
563
564 icram0: sram@e63a0000 {
565 compatible = "mmio-sram";
566 reg = <0 0xe63a0000 0 0x12000>;
567 #address-cells = <1>;
568 #size-cells = <1>;
569 ranges = <0 0 0xe63a0000 0x12000>;
570 };
571
572 icram1: sram@e63c0000 {
573 compatible = "mmio-sram";
574 reg = <0 0xe63c0000 0 0x1000>;
575 #address-cells = <1>;
576 #size-cells = <1>;
577 ranges = <0 0 0xe63c0000 0x1000>;
578
579 smp-sram@0 {
580 compatible = "renesas,smp-sram";
581 reg = <0 0x100>;
582 };
583 };
584
585 i2c0: i2c@e6508000 {
586 #address-cells = <1>;
587 #size-cells = <0>;
588 compatible = "renesas,i2c-r8a7790",
589 "renesas,rcar-gen2-i2c";
590 reg = <0 0xe6508000 0 0x40>;
591 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 931>;
593 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
594 resets = <&cpg 931>;
595 i2c-scl-internal-delay-ns = <110>;
596 status = "disabled";
597 };
598
599 i2c1: i2c@e6518000 {
600 #address-cells = <1>;
601 #size-cells = <0>;
602 compatible = "renesas,i2c-r8a7790",
603 "renesas,rcar-gen2-i2c";
604 reg = <0 0xe6518000 0 0x40>;
605 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 930>;
607 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
608 resets = <&cpg 930>;
609 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled";
611 };
612
613 i2c2: i2c@e6530000 {
614 #address-cells = <1>;
615 #size-cells = <0>;
616 compatible = "renesas,i2c-r8a7790",
617 "renesas,rcar-gen2-i2c";
618 reg = <0 0xe6530000 0 0x40>;
619 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
620 clocks = <&cpg CPG_MOD 929>;
621 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
622 resets = <&cpg 929>;
623 i2c-scl-internal-delay-ns = <6>;
624 status = "disabled";
625 };
626
627 i2c3: i2c@e6540000 {
628 #address-cells = <1>;
629 #size-cells = <0>;
630 compatible = "renesas,i2c-r8a7790",
631 "renesas,rcar-gen2-i2c";
632 reg = <0 0xe6540000 0 0x40>;
633 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&cpg CPG_MOD 928>;
635 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
636 resets = <&cpg 928>;
637 i2c-scl-internal-delay-ns = <110>;
638 status = "disabled";
639 };
640
641 iic0: i2c@e6500000 {
642 #address-cells = <1>;
643 #size-cells = <0>;
644 compatible = "renesas,iic-r8a7790",
645 "renesas,rcar-gen2-iic",
646 "renesas,rmobile-iic";
647 reg = <0 0xe6500000 0 0x425>;
648 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&cpg CPG_MOD 318>;
650 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
651 <&dmac1 0x61>, <&dmac1 0x62>;
652 dma-names = "tx", "rx", "tx", "rx";
653 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
654 resets = <&cpg 318>;
655 status = "disabled";
656 };
657
658 iic1: i2c@e6510000 {
659 #address-cells = <1>;
660 #size-cells = <0>;
661 compatible = "renesas,iic-r8a7790",
662 "renesas,rcar-gen2-iic",
663 "renesas,rmobile-iic";
664 reg = <0 0xe6510000 0 0x425>;
665 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&cpg CPG_MOD 323>;
667 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
668 <&dmac1 0x65>, <&dmac1 0x66>;
669 dma-names = "tx", "rx", "tx", "rx";
670 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
671 resets = <&cpg 323>;
672 status = "disabled";
673 };
674
675 iic2: i2c@e6520000 {
676 #address-cells = <1>;
677 #size-cells = <0>;
678 compatible = "renesas,iic-r8a7790",
679 "renesas,rcar-gen2-iic",
680 "renesas,rmobile-iic";
681 reg = <0 0xe6520000 0 0x425>;
682 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
683 clocks = <&cpg CPG_MOD 300>;
684 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
685 <&dmac1 0x69>, <&dmac1 0x6a>;
686 dma-names = "tx", "rx", "tx", "rx";
687 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
688 resets = <&cpg 300>;
689 status = "disabled";
690 };
691
692 iic3: i2c@e60b0000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "renesas,iic-r8a7790",
696 "renesas,rcar-gen2-iic",
697 "renesas,rmobile-iic";
698 reg = <0 0xe60b0000 0 0x425>;
699 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
700 clocks = <&cpg CPG_MOD 926>;
701 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
702 <&dmac1 0x77>, <&dmac1 0x78>;
703 dma-names = "tx", "rx", "tx", "rx";
704 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
705 resets = <&cpg 926>;
706 status = "disabled";
707 };
708
709 hsusb: usb@e6590000 {
710 compatible = "renesas,usbhs-r8a7790",
711 "renesas,rcar-gen2-usbhs";
712 reg = <0 0xe6590000 0 0x100>;
713 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
714 clocks = <&cpg CPG_MOD 704>;
715 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
716 <&usb_dmac1 0>, <&usb_dmac1 1>;
717 dma-names = "ch0", "ch1", "ch2", "ch3";
718 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
719 resets = <&cpg 704>;
720 renesas,buswait = <4>;
721 phys = <&usb0 1>;
722 phy-names = "usb";
723 status = "disabled";
724 };
725
726 usbphy: usb-phy-controller@e6590100 {
727 compatible = "renesas,usb-phy-r8a7790",
728 "renesas,rcar-gen2-usb-phy";
729 reg = <0 0xe6590100 0 0x100>;
730 #address-cells = <1>;
731 #size-cells = <0>;
732 clocks = <&cpg CPG_MOD 704>;
733 clock-names = "usbhs";
734 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
735 resets = <&cpg 704>;
736 status = "disabled";
737
738 usb0: usb-phy@0 {
739 reg = <0>;
740 #phy-cells = <1>;
741 };
742 usb2: usb-phy@2 {
743 reg = <2>;
744 #phy-cells = <1>;
745 };
746 };
747
748 usb_dmac0: dma-controller@e65a0000 {
749 compatible = "renesas,r8a7790-usb-dmac",
750 "renesas,usb-dmac";
751 reg = <0 0xe65a0000 0 0x100>;
752 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
754 interrupt-names = "ch0", "ch1";
755 clocks = <&cpg CPG_MOD 330>;
756 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
757 resets = <&cpg 330>;
758 #dma-cells = <1>;
759 dma-channels = <2>;
760 };
761
762 usb_dmac1: dma-controller@e65b0000 {
763 compatible = "renesas,r8a7790-usb-dmac",
764 "renesas,usb-dmac";
765 reg = <0 0xe65b0000 0 0x100>;
766 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
768 interrupt-names = "ch0", "ch1";
769 clocks = <&cpg CPG_MOD 331>;
770 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
771 resets = <&cpg 331>;
772 #dma-cells = <1>;
773 dma-channels = <2>;
774 };
775
776 dmac0: dma-controller@e6700000 {
777 compatible = "renesas,dmac-r8a7790",
778 "renesas,rcar-dmac";
779 reg = <0 0xe6700000 0 0x20000>;
780 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
796 interrupt-names = "error",
797 "ch0", "ch1", "ch2", "ch3",
798 "ch4", "ch5", "ch6", "ch7",
799 "ch8", "ch9", "ch10", "ch11",
800 "ch12", "ch13", "ch14";
801 clocks = <&cpg CPG_MOD 219>;
802 clock-names = "fck";
803 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
804 resets = <&cpg 219>;
805 #dma-cells = <1>;
806 dma-channels = <15>;
807 };
808
809 dmac1: dma-controller@e6720000 {
810 compatible = "renesas,dmac-r8a7790",
811 "renesas,rcar-dmac";
812 reg = <0 0xe6720000 0 0x20000>;
813 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
825 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
826 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
827 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
828 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
829 interrupt-names = "error",
830 "ch0", "ch1", "ch2", "ch3",
831 "ch4", "ch5", "ch6", "ch7",
832 "ch8", "ch9", "ch10", "ch11",
833 "ch12", "ch13", "ch14";
834 clocks = <&cpg CPG_MOD 218>;
835 clock-names = "fck";
836 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
837 resets = <&cpg 218>;
838 #dma-cells = <1>;
839 dma-channels = <15>;
840 };
841
842 avb: ethernet@e6800000 {
843 compatible = "renesas,etheravb-r8a7790",
844 "renesas,etheravb-rcar-gen2";
845 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
846 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
847 clocks = <&cpg CPG_MOD 812>;
848 clock-names = "fck";
849 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
850 resets = <&cpg 812>;
851 #address-cells = <1>;
852 #size-cells = <0>;
853 status = "disabled";
854 };
855
856 qspi: spi@e6b10000 {
857 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
858 reg = <0 0xe6b10000 0 0x2c>;
859 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&cpg CPG_MOD 917>;
861 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
862 <&dmac1 0x17>, <&dmac1 0x18>;
863 dma-names = "tx", "rx", "tx", "rx";
864 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
865 resets = <&cpg 917>;
866 num-cs = <1>;
867 #address-cells = <1>;
868 #size-cells = <0>;
869 status = "disabled";
870 };
871
872 scifa0: serial@e6c40000 {
873 compatible = "renesas,scifa-r8a7790",
874 "renesas,rcar-gen2-scifa", "renesas,scifa";
875 reg = <0 0xe6c40000 0 64>;
876 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 204>;
878 clock-names = "fck";
879 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
880 <&dmac1 0x21>, <&dmac1 0x22>;
881 dma-names = "tx", "rx", "tx", "rx";
882 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
883 resets = <&cpg 204>;
884 status = "disabled";
885 };
886
887 scifa1: serial@e6c50000 {
888 compatible = "renesas,scifa-r8a7790",
889 "renesas,rcar-gen2-scifa", "renesas,scifa";
890 reg = <0 0xe6c50000 0 64>;
891 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
892 clocks = <&cpg CPG_MOD 203>;
893 clock-names = "fck";
894 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
895 <&dmac1 0x25>, <&dmac1 0x26>;
896 dma-names = "tx", "rx", "tx", "rx";
897 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
898 resets = <&cpg 203>;
899 status = "disabled";
900 };
901
902 scifa2: serial@e6c60000 {
903 compatible = "renesas,scifa-r8a7790",
904 "renesas,rcar-gen2-scifa", "renesas,scifa";
905 reg = <0 0xe6c60000 0 64>;
906 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&cpg CPG_MOD 202>;
908 clock-names = "fck";
909 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
910 <&dmac1 0x27>, <&dmac1 0x28>;
911 dma-names = "tx", "rx", "tx", "rx";
912 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
913 resets = <&cpg 202>;
914 status = "disabled";
915 };
916
917 scifb0: serial@e6c20000 {
918 compatible = "renesas,scifb-r8a7790",
919 "renesas,rcar-gen2-scifb", "renesas,scifb";
920 reg = <0 0xe6c20000 0 0x100>;
921 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
922 clocks = <&cpg CPG_MOD 206>;
923 clock-names = "fck";
924 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
925 <&dmac1 0x3d>, <&dmac1 0x3e>;
926 dma-names = "tx", "rx", "tx", "rx";
927 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
928 resets = <&cpg 206>;
929 status = "disabled";
930 };
931
932 scifb1: serial@e6c30000 {
933 compatible = "renesas,scifb-r8a7790",
934 "renesas,rcar-gen2-scifb", "renesas,scifb";
935 reg = <0 0xe6c30000 0 0x100>;
936 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
937 clocks = <&cpg CPG_MOD 207>;
938 clock-names = "fck";
939 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
940 <&dmac1 0x19>, <&dmac1 0x1a>;
941 dma-names = "tx", "rx", "tx", "rx";
942 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
943 resets = <&cpg 207>;
944 status = "disabled";
945 };
946
947 scifb2: serial@e6ce0000 {
948 compatible = "renesas,scifb-r8a7790",
949 "renesas,rcar-gen2-scifb", "renesas,scifb";
950 reg = <0 0xe6ce0000 0 0x100>;
951 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
952 clocks = <&cpg CPG_MOD 216>;
953 clock-names = "fck";
954 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
955 <&dmac1 0x1d>, <&dmac1 0x1e>;
956 dma-names = "tx", "rx", "tx", "rx";
957 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
958 resets = <&cpg 216>;
959 status = "disabled";
960 };
961
962 scif0: serial@e6e60000 {
963 compatible = "renesas,scif-r8a7790",
964 "renesas,rcar-gen2-scif",
965 "renesas,scif";
966 reg = <0 0xe6e60000 0 64>;
967 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
968 clocks = <&cpg CPG_MOD 721>,
969 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
970 clock-names = "fck", "brg_int", "scif_clk";
971 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
972 <&dmac1 0x29>, <&dmac1 0x2a>;
973 dma-names = "tx", "rx", "tx", "rx";
974 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
975 resets = <&cpg 721>;
976 status = "disabled";
977 };
978
979 scif1: serial@e6e68000 {
980 compatible = "renesas,scif-r8a7790",
981 "renesas,rcar-gen2-scif",
982 "renesas,scif";
983 reg = <0 0xe6e68000 0 64>;
984 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
985 clocks = <&cpg CPG_MOD 720>,
986 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
987 clock-names = "fck", "brg_int", "scif_clk";
988 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
989 <&dmac1 0x2d>, <&dmac1 0x2e>;
990 dma-names = "tx", "rx", "tx", "rx";
991 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
992 resets = <&cpg 720>;
993 status = "disabled";
994 };
995
996 scif2: serial@e6e56000 {
997 compatible = "renesas,scif-r8a7790",
998 "renesas,rcar-gen2-scif",
999 "renesas,scif";
1000 reg = <0 0xe6e56000 0 64>;
1001 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1002 clocks = <&cpg CPG_MOD 310>,
1003 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1004 clock-names = "fck", "brg_int", "scif_clk";
1005 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
1006 <&dmac1 0x2b>, <&dmac1 0x2c>;
1007 dma-names = "tx", "rx", "tx", "rx";
1008 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1009 resets = <&cpg 310>;
1010 status = "disabled";
1011 };
1012
1013 hscif0: serial@e62c0000 {
1014 compatible = "renesas,hscif-r8a7790",
1015 "renesas,rcar-gen2-hscif", "renesas,hscif";
1016 reg = <0 0xe62c0000 0 96>;
1017 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
1018 clocks = <&cpg CPG_MOD 717>,
1019 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1020 clock-names = "fck", "brg_int", "scif_clk";
1021 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
1022 <&dmac1 0x39>, <&dmac1 0x3a>;
1023 dma-names = "tx", "rx", "tx", "rx";
1024 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1025 resets = <&cpg 717>;
1026 status = "disabled";
1027 };
1028
1029 hscif1: serial@e62c8000 {
1030 compatible = "renesas,hscif-r8a7790",
1031 "renesas,rcar-gen2-hscif", "renesas,hscif";
1032 reg = <0 0xe62c8000 0 96>;
1033 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1034 clocks = <&cpg CPG_MOD 716>,
1035 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1036 clock-names = "fck", "brg_int", "scif_clk";
1037 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
1038 <&dmac1 0x4d>, <&dmac1 0x4e>;
1039 dma-names = "tx", "rx", "tx", "rx";
1040 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1041 resets = <&cpg 716>;
1042 status = "disabled";
1043 };
1044
1045 msiof0: spi@e6e20000 {
1046 compatible = "renesas,msiof-r8a7790",
1047 "renesas,rcar-gen2-msiof";
1048 reg = <0 0xe6e20000 0 0x0064>;
1049 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1050 clocks = <&cpg CPG_MOD 0>;
1051 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1052 <&dmac1 0x51>, <&dmac1 0x52>;
1053 dma-names = "tx", "rx", "tx", "rx";
1054 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1055 resets = <&cpg 0>;
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 status = "disabled";
1059 };
1060
1061 msiof1: spi@e6e10000 {
1062 compatible = "renesas,msiof-r8a7790",
1063 "renesas,rcar-gen2-msiof";
1064 reg = <0 0xe6e10000 0 0x0064>;
1065 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1066 clocks = <&cpg CPG_MOD 208>;
1067 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1068 <&dmac1 0x55>, <&dmac1 0x56>;
1069 dma-names = "tx", "rx", "tx", "rx";
1070 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1071 resets = <&cpg 208>;
1072 #address-cells = <1>;
1073 #size-cells = <0>;
1074 status = "disabled";
1075 };
1076
1077 msiof2: spi@e6e00000 {
1078 compatible = "renesas,msiof-r8a7790",
1079 "renesas,rcar-gen2-msiof";
1080 reg = <0 0xe6e00000 0 0x0064>;
1081 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1082 clocks = <&cpg CPG_MOD 205>;
1083 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1084 <&dmac1 0x41>, <&dmac1 0x42>;
1085 dma-names = "tx", "rx", "tx", "rx";
1086 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1087 resets = <&cpg 205>;
1088 #address-cells = <1>;
1089 #size-cells = <0>;
1090 status = "disabled";
1091 };
1092
1093 msiof3: spi@e6c90000 {
1094 compatible = "renesas,msiof-r8a7790",
1095 "renesas,rcar-gen2-msiof";
1096 reg = <0 0xe6c90000 0 0x0064>;
1097 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1098 clocks = <&cpg CPG_MOD 215>;
1099 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1100 <&dmac1 0x45>, <&dmac1 0x46>;
1101 dma-names = "tx", "rx", "tx", "rx";
1102 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1103 resets = <&cpg 215>;
1104 #address-cells = <1>;
1105 #size-cells = <0>;
1106 status = "disabled";
1107 };
1108
1109 pwm0: pwm@e6e30000 {
1110 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1111 reg = <0 0xe6e30000 0 0x8>;
1112 clocks = <&cpg CPG_MOD 523>;
1113 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1114 resets = <&cpg 523>;
1115 #pwm-cells = <2>;
1116 status = "disabled";
1117 };
1118
1119 pwm1: pwm@e6e31000 {
1120 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1121 reg = <0 0xe6e31000 0 0x8>;
1122 clocks = <&cpg CPG_MOD 523>;
1123 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1124 resets = <&cpg 523>;
1125 #pwm-cells = <2>;
1126 status = "disabled";
1127 };
1128
1129 pwm2: pwm@e6e32000 {
1130 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1131 reg = <0 0xe6e32000 0 0x8>;
1132 clocks = <&cpg CPG_MOD 523>;
1133 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1134 resets = <&cpg 523>;
1135 #pwm-cells = <2>;
1136 status = "disabled";
1137 };
1138
1139 pwm3: pwm@e6e33000 {
1140 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1141 reg = <0 0xe6e33000 0 0x8>;
1142 clocks = <&cpg CPG_MOD 523>;
1143 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1144 resets = <&cpg 523>;
1145 #pwm-cells = <2>;
1146 status = "disabled";
1147 };
1148
1149 pwm4: pwm@e6e34000 {
1150 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1151 reg = <0 0xe6e34000 0 0x8>;
1152 clocks = <&cpg CPG_MOD 523>;
1153 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1154 resets = <&cpg 523>;
1155 #pwm-cells = <2>;
1156 status = "disabled";
1157 };
1158
1159 pwm5: pwm@e6e35000 {
1160 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1161 reg = <0 0xe6e35000 0 0x8>;
1162 clocks = <&cpg CPG_MOD 523>;
1163 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1164 resets = <&cpg 523>;
1165 #pwm-cells = <2>;
1166 status = "disabled";
1167 };
1168
1169 pwm6: pwm@e6e36000 {
1170 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
1171 reg = <0 0xe6e36000 0 0x8>;
1172 clocks = <&cpg CPG_MOD 523>;
1173 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1174 resets = <&cpg 523>;
1175 #pwm-cells = <2>;
1176 status = "disabled";
1177 };
1178
1179 can0: can@e6e80000 {
1180 compatible = "renesas,can-r8a7790",
1181 "renesas,rcar-gen2-can";
1182 reg = <0 0xe6e80000 0 0x1000>;
1183 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1184 clocks = <&cpg CPG_MOD 916>,
1185 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1186 clock-names = "clkp1", "clkp2", "can_clk";
1187 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1188 resets = <&cpg 916>;
1189 status = "disabled";
1190 };
1191
1192 can1: can@e6e88000 {
1193 compatible = "renesas,can-r8a7790",
1194 "renesas,rcar-gen2-can";
1195 reg = <0 0xe6e88000 0 0x1000>;
1196 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1197 clocks = <&cpg CPG_MOD 915>,
1198 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1199 clock-names = "clkp1", "clkp2", "can_clk";
1200 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1201 resets = <&cpg 915>;
1202 status = "disabled";
1203 };
1204
1205 vin0: video@e6ef0000 {
1206 compatible = "renesas,vin-r8a7790",
1207 "renesas,rcar-gen2-vin";
1208 reg = <0 0xe6ef0000 0 0x1000>;
1209 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MOD 811>;
1211 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1212 resets = <&cpg 811>;
1213 status = "disabled";
1214 };
1215
1216 vin1: video@e6ef1000 {
1217 compatible = "renesas,vin-r8a7790",
1218 "renesas,rcar-gen2-vin";
1219 reg = <0 0xe6ef1000 0 0x1000>;
1220 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1221 clocks = <&cpg CPG_MOD 810>;
1222 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1223 resets = <&cpg 810>;
1224 status = "disabled";
1225 };
1226
1227 vin2: video@e6ef2000 {
1228 compatible = "renesas,vin-r8a7790",
1229 "renesas,rcar-gen2-vin";
1230 reg = <0 0xe6ef2000 0 0x1000>;
1231 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1232 clocks = <&cpg CPG_MOD 809>;
1233 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1234 resets = <&cpg 809>;
1235 status = "disabled";
1236 };
1237
1238 vin3: video@e6ef3000 {
1239 compatible = "renesas,vin-r8a7790",
1240 "renesas,rcar-gen2-vin";
1241 reg = <0 0xe6ef3000 0 0x1000>;
1242 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1243 clocks = <&cpg CPG_MOD 808>;
1244 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1245 resets = <&cpg 808>;
1246 status = "disabled";
1247 };
1248
1249 rcar_sound: sound@ec500000 {
1250 /*
1251 * #sound-dai-cells is required if simple-card
1252 *
1253 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1254 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1255 */
1256 compatible = "renesas,rcar_sound-r8a7790",
1257 "renesas,rcar_sound-gen2";
1258 reg = <0 0xec500000 0 0x1000>, /* SCU */
1259 <0 0xec5a0000 0 0x100>, /* ADG */
1260 <0 0xec540000 0 0x1000>, /* SSIU */
1261 <0 0xec541000 0 0x280>, /* SSI */
1262 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1263 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1264
1265 clocks = <&cpg CPG_MOD 1005>,
1266 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1267 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1268 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1269 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1270 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1271 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1272 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1273 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1274 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1275 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1276 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1277 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1278 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1279 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1280 <&cpg CPG_CORE R8A7790_CLK_M2>;
1281 clock-names = "ssi-all",
1282 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1283 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1284 "ssi.1", "ssi.0",
1285 "src.9", "src.8", "src.7", "src.6",
1286 "src.5", "src.4", "src.3", "src.2",
1287 "src.1", "src.0",
1288 "ctu.0", "ctu.1",
1289 "mix.0", "mix.1",
1290 "dvc.0", "dvc.1",
1291 "clk_a", "clk_b", "clk_c", "clk_i";
1292 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1293 resets = <&cpg 1005>,
1294 <&cpg 1006>, <&cpg 1007>,
1295 <&cpg 1008>, <&cpg 1009>,
1296 <&cpg 1010>, <&cpg 1011>,
1297 <&cpg 1012>, <&cpg 1013>,
1298 <&cpg 1014>, <&cpg 1015>;
1299 reset-names = "ssi-all",
1300 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1301 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1302 "ssi.1", "ssi.0";
1303
1304 status = "disabled";
1305
1306 rcar_sound,dvc {
1307 dvc0: dvc-0 {
1308 dmas = <&audma1 0xbc>;
1309 dma-names = "tx";
1310 };
1311 dvc1: dvc-1 {
1312 dmas = <&audma1 0xbe>;
1313 dma-names = "tx";
1314 };
1315 };
1316
1317 rcar_sound,mix {
1318 mix0: mix-0 { };
1319 mix1: mix-1 { };
1320 };
1321
1322 rcar_sound,ctu {
1323 ctu00: ctu-0 { };
1324 ctu01: ctu-1 { };
1325 ctu02: ctu-2 { };
1326 ctu03: ctu-3 { };
1327 ctu10: ctu-4 { };
1328 ctu11: ctu-5 { };
1329 ctu12: ctu-6 { };
1330 ctu13: ctu-7 { };
1331 };
1332
1333 rcar_sound,src {
1334 src0: src-0 {
1335 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1336 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1337 dma-names = "rx", "tx";
1338 };
1339 src1: src-1 {
1340 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1341 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1342 dma-names = "rx", "tx";
1343 };
1344 src2: src-2 {
1345 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1346 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1347 dma-names = "rx", "tx";
1348 };
1349 src3: src-3 {
1350 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1351 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1352 dma-names = "rx", "tx";
1353 };
1354 src4: src-4 {
1355 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1356 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1357 dma-names = "rx", "tx";
1358 };
1359 src5: src-5 {
1360 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1361 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1362 dma-names = "rx", "tx";
1363 };
1364 src6: src-6 {
1365 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1366 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1367 dma-names = "rx", "tx";
1368 };
1369 src7: src-7 {
1370 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1371 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1372 dma-names = "rx", "tx";
1373 };
1374 src8: src-8 {
1375 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1376 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1377 dma-names = "rx", "tx";
1378 };
1379 src9: src-9 {
1380 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1381 dmas = <&audma0 0x97>, <&audma1 0xba>;
1382 dma-names = "rx", "tx";
1383 };
1384 };
1385
1386 rcar_sound,ssi {
1387 ssi0: ssi-0 {
1388 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1389 dmas = <&audma0 0x01>, <&audma1 0x02>,
1390 <&audma0 0x15>, <&audma1 0x16>;
1391 dma-names = "rx", "tx", "rxu", "txu";
1392 };
1393 ssi1: ssi-1 {
1394 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1395 dmas = <&audma0 0x03>, <&audma1 0x04>,
1396 <&audma0 0x49>, <&audma1 0x4a>;
1397 dma-names = "rx", "tx", "rxu", "txu";
1398 };
1399 ssi2: ssi-2 {
1400 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1401 dmas = <&audma0 0x05>, <&audma1 0x06>,
1402 <&audma0 0x63>, <&audma1 0x64>;
1403 dma-names = "rx", "tx", "rxu", "txu";
1404 };
1405 ssi3: ssi-3 {
1406 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1407 dmas = <&audma0 0x07>, <&audma1 0x08>,
1408 <&audma0 0x6f>, <&audma1 0x70>;
1409 dma-names = "rx", "tx", "rxu", "txu";
1410 };
1411 ssi4: ssi-4 {
1412 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1413 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1414 <&audma0 0x71>, <&audma1 0x72>;
1415 dma-names = "rx", "tx", "rxu", "txu";
1416 };
1417 ssi5: ssi-5 {
1418 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1419 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1420 <&audma0 0x73>, <&audma1 0x74>;
1421 dma-names = "rx", "tx", "rxu", "txu";
1422 };
1423 ssi6: ssi-6 {
1424 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1425 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1426 <&audma0 0x75>, <&audma1 0x76>;
1427 dma-names = "rx", "tx", "rxu", "txu";
1428 };
1429 ssi7: ssi-7 {
1430 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1431 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1432 <&audma0 0x79>, <&audma1 0x7a>;
1433 dma-names = "rx", "tx", "rxu", "txu";
1434 };
1435 ssi8: ssi-8 {
1436 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1437 dmas = <&audma0 0x11>, <&audma1 0x12>,
1438 <&audma0 0x7b>, <&audma1 0x7c>;
1439 dma-names = "rx", "tx", "rxu", "txu";
1440 };
1441 ssi9: ssi-9 {
1442 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1443 dmas = <&audma0 0x13>, <&audma1 0x14>,
1444 <&audma0 0x7d>, <&audma1 0x7e>;
1445 dma-names = "rx", "tx", "rxu", "txu";
1446 };
1447 };
1448 };
1449
1450 audma0: dma-controller@ec700000 {
1451 compatible = "renesas,dmac-r8a7790",
1452 "renesas,rcar-dmac";
1453 reg = <0 0xec700000 0 0x10000>;
1454 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1455 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1456 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1457 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1458 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1459 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1460 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1461 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1462 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1463 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1464 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1465 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1466 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1467 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1468 interrupt-names = "error",
1469 "ch0", "ch1", "ch2", "ch3",
1470 "ch4", "ch5", "ch6", "ch7",
1471 "ch8", "ch9", "ch10", "ch11",
1472 "ch12";
1473 clocks = <&cpg CPG_MOD 502>;
1474 clock-names = "fck";
1475 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1476 resets = <&cpg 502>;
1477 #dma-cells = <1>;
1478 dma-channels = <13>;
1479 };
1480
1481 audma1: dma-controller@ec720000 {
1482 compatible = "renesas,dmac-r8a7790",
1483 "renesas,rcar-dmac";
1484 reg = <0 0xec720000 0 0x10000>;
1485 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1486 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1487 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1488 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1489 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1490 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1491 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1492 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1493 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1494 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1495 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1496 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1497 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1498 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1499 interrupt-names = "error",
1500 "ch0", "ch1", "ch2", "ch3",
1501 "ch4", "ch5", "ch6", "ch7",
1502 "ch8", "ch9", "ch10", "ch11",
1503 "ch12";
1504 clocks = <&cpg CPG_MOD 501>;
1505 clock-names = "fck";
1506 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1507 resets = <&cpg 501>;
1508 #dma-cells = <1>;
1509 dma-channels = <13>;
1510 };
1511
1512 xhci: usb@ee000000 {
1513 compatible = "renesas,xhci-r8a7790",
1514 "renesas,rcar-gen2-xhci";
1515 reg = <0 0xee000000 0 0xc00>;
1516 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1517 clocks = <&cpg CPG_MOD 328>;
1518 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1519 resets = <&cpg 328>;
1520 phys = <&usb2 1>;
1521 phy-names = "usb";
1522 status = "disabled";
1523 };
1524
1525 pci0: pci@ee090000 {
1526 compatible = "renesas,pci-r8a7790",
1527 "renesas,pci-rcar-gen2";
1528 device_type = "pci";
1529 reg = <0 0xee090000 0 0xc00>,
1530 <0 0xee080000 0 0x1100>;
1531 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1532 clocks = <&cpg CPG_MOD 703>;
1533 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1534 resets = <&cpg 703>;
1535 status = "disabled";
1536
1537 bus-range = <0 0>;
1538 #address-cells = <3>;
1539 #size-cells = <2>;
1540 #interrupt-cells = <1>;
1541 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1542 interrupt-map-mask = <0xf800 0 0 0x7>;
1543 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1544 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1545 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1546
1547 usb@1,0 {
1548 reg = <0x800 0 0 0 0>;
1549 phys = <&usb0 0>;
1550 phy-names = "usb";
1551 };
1552
1553 usb@2,0 {
1554 reg = <0x1000 0 0 0 0>;
1555 phys = <&usb0 0>;
1556 phy-names = "usb";
1557 };
1558 };
1559
1560 pci1: pci@ee0b0000 {
1561 compatible = "renesas,pci-r8a7790",
1562 "renesas,pci-rcar-gen2";
1563 device_type = "pci";
1564 reg = <0 0xee0b0000 0 0xc00>,
1565 <0 0xee0a0000 0 0x1100>;
1566 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1567 clocks = <&cpg CPG_MOD 703>;
1568 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1569 resets = <&cpg 703>;
1570 status = "disabled";
1571
1572 bus-range = <1 1>;
1573 #address-cells = <3>;
1574 #size-cells = <2>;
1575 #interrupt-cells = <1>;
1576 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1577 interrupt-map-mask = <0xf800 0 0 0x7>;
1578 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1579 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1580 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1581 };
1582
1583 pci2: pci@ee0d0000 {
1584 compatible = "renesas,pci-r8a7790",
1585 "renesas,pci-rcar-gen2";
1586 device_type = "pci";
1587 clocks = <&cpg CPG_MOD 703>;
1588 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1589 resets = <&cpg 703>;
1590 reg = <0 0xee0d0000 0 0xc00>,
1591 <0 0xee0c0000 0 0x1100>;
1592 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1593 status = "disabled";
1594
1595 bus-range = <2 2>;
1596 #address-cells = <3>;
1597 #size-cells = <2>;
1598 #interrupt-cells = <1>;
1599 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1600 interrupt-map-mask = <0xf800 0 0 0x7>;
1601 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1602 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1603 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1604
1605 usb@1,0 {
1606 reg = <0x20800 0 0 0 0>;
1607 phys = <&usb2 0>;
1608 phy-names = "usb";
1609 };
1610
1611 usb@2,0 {
1612 reg = <0x21000 0 0 0 0>;
1613 phys = <&usb2 0>;
1614 phy-names = "usb";
1615 };
1616 };
1617
1618 sdhi0: mmc@ee100000 {
1619 compatible = "renesas,sdhi-r8a7790",
1620 "renesas,rcar-gen2-sdhi";
1621 reg = <0 0xee100000 0 0x328>;
1622 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1623 clocks = <&cpg CPG_MOD 314>;
1624 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1625 <&dmac1 0xcd>, <&dmac1 0xce>;
1626 dma-names = "tx", "rx", "tx", "rx";
1627 max-frequency = <195000000>;
1628 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1629 resets = <&cpg 314>;
1630 status = "disabled";
1631 };
1632
1633 sdhi1: mmc@ee120000 {
1634 compatible = "renesas,sdhi-r8a7790",
1635 "renesas,rcar-gen2-sdhi";
1636 reg = <0 0xee120000 0 0x328>;
1637 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&cpg CPG_MOD 313>;
1639 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1640 <&dmac1 0xc9>, <&dmac1 0xca>;
1641 dma-names = "tx", "rx", "tx", "rx";
1642 max-frequency = <195000000>;
1643 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1644 resets = <&cpg 313>;
1645 status = "disabled";
1646 };
1647
1648 sdhi2: mmc@ee140000 {
1649 compatible = "renesas,sdhi-r8a7790",
1650 "renesas,rcar-gen2-sdhi";
1651 reg = <0 0xee140000 0 0x100>;
1652 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1653 clocks = <&cpg CPG_MOD 312>;
1654 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1655 <&dmac1 0xc1>, <&dmac1 0xc2>;
1656 dma-names = "tx", "rx", "tx", "rx";
1657 max-frequency = <97500000>;
1658 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1659 resets = <&cpg 312>;
1660 status = "disabled";
1661 };
1662
1663 sdhi3: mmc@ee160000 {
1664 compatible = "renesas,sdhi-r8a7790",
1665 "renesas,rcar-gen2-sdhi";
1666 reg = <0 0xee160000 0 0x100>;
1667 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1668 clocks = <&cpg CPG_MOD 311>;
1669 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1670 <&dmac1 0xd3>, <&dmac1 0xd4>;
1671 dma-names = "tx", "rx", "tx", "rx";
1672 max-frequency = <97500000>;
1673 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1674 resets = <&cpg 311>;
1675 status = "disabled";
1676 };
1677
1678 mmcif0: mmc@ee200000 {
1679 compatible = "renesas,mmcif-r8a7790",
1680 "renesas,sh-mmcif";
1681 reg = <0 0xee200000 0 0x80>;
1682 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1683 clocks = <&cpg CPG_MOD 315>;
1684 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1685 <&dmac1 0xd1>, <&dmac1 0xd2>;
1686 dma-names = "tx", "rx", "tx", "rx";
1687 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1688 resets = <&cpg 315>;
1689 reg-io-width = <4>;
1690 status = "disabled";
1691 max-frequency = <97500000>;
1692 };
1693
1694 mmcif1: mmc@ee220000 {
1695 compatible = "renesas,mmcif-r8a7790",
1696 "renesas,sh-mmcif";
1697 reg = <0 0xee220000 0 0x80>;
1698 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1699 clocks = <&cpg CPG_MOD 305>;
1700 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1701 <&dmac1 0xe1>, <&dmac1 0xe2>;
1702 dma-names = "tx", "rx", "tx", "rx";
1703 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1704 resets = <&cpg 305>;
1705 reg-io-width = <4>;
1706 status = "disabled";
1707 max-frequency = <97500000>;
1708 };
1709
1710 sata0: sata@ee300000 {
1711 compatible = "renesas,sata-r8a7790",
1712 "renesas,rcar-gen2-sata";
1713 reg = <0 0xee300000 0 0x200000>;
1714 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1715 clocks = <&cpg CPG_MOD 815>;
1716 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1717 resets = <&cpg 815>;
1718 status = "disabled";
1719 };
1720
1721 sata1: sata@ee500000 {
1722 compatible = "renesas,sata-r8a7790",
1723 "renesas,rcar-gen2-sata";
1724 reg = <0 0xee500000 0 0x200000>;
1725 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1726 clocks = <&cpg CPG_MOD 814>;
1727 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1728 resets = <&cpg 814>;
1729 status = "disabled";
1730 };
1731
1732 ether: ethernet@ee700000 {
1733 compatible = "renesas,ether-r8a7790",
1734 "renesas,rcar-gen2-ether";
1735 reg = <0 0xee700000 0 0x400>;
1736 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1737 clocks = <&cpg CPG_MOD 813>;
1738 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1739 resets = <&cpg 813>;
1740 phy-mode = "rmii";
1741 #address-cells = <1>;
1742 #size-cells = <0>;
1743 status = "disabled";
1744 };
1745
1746 gic: interrupt-controller@f1001000 {
1747 compatible = "arm,gic-400";
1748 #interrupt-cells = <3>;
1749 #address-cells = <0>;
1750 interrupt-controller;
1751 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1752 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1753 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1754 clocks = <&cpg CPG_MOD 408>;
1755 clock-names = "clk";
1756 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1757 resets = <&cpg 408>;
1758 };
1759
1760 pciec: pcie@fe000000 {
1761 compatible = "renesas,pcie-r8a7790",
1762 "renesas,pcie-rcar-gen2";
1763 reg = <0 0xfe000000 0 0x80000>;
1764 #address-cells = <3>;
1765 #size-cells = <2>;
1766 bus-range = <0x00 0xff>;
1767 device_type = "pci";
1768 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1769 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1770 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1771 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1772 /* Map all possible DDR as inbound ranges */
1773 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1774 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1775 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1776 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1777 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1778 #interrupt-cells = <1>;
1779 interrupt-map-mask = <0 0 0 0>;
1780 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1781 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1782 clock-names = "pcie", "pcie_bus";
1783 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1784 resets = <&cpg 319>;
1785 status = "disabled";
1786 };
1787
1788 vsp@fe920000 {
1789 compatible = "renesas,vsp1";
1790 reg = <0 0xfe920000 0 0x8000>;
1791 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1792 clocks = <&cpg CPG_MOD 130>;
1793 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1794 resets = <&cpg 130>;
1795 };
1796
1797 vsp@fe928000 {
1798 compatible = "renesas,vsp1";
1799 reg = <0 0xfe928000 0 0x8000>;
1800 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1801 clocks = <&cpg CPG_MOD 131>;
1802 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1803 resets = <&cpg 131>;
1804 };
1805
1806 vsp@fe930000 {
1807 compatible = "renesas,vsp1";
1808 reg = <0 0xfe930000 0 0x8000>;
1809 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1810 clocks = <&cpg CPG_MOD 128>;
1811 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1812 resets = <&cpg 128>;
1813 };
1814
1815 vsp@fe938000 {
1816 compatible = "renesas,vsp1";
1817 reg = <0 0xfe938000 0 0x8000>;
1818 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1819 clocks = <&cpg CPG_MOD 127>;
1820 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1821 resets = <&cpg 127>;
1822 };
1823
1824 fdp1@fe940000 {
1825 compatible = "renesas,fdp1";
1826 reg = <0 0xfe940000 0 0x2400>;
1827 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1828 clocks = <&cpg CPG_MOD 119>;
1829 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1830 resets = <&cpg 119>;
1831 };
1832
1833 fdp1@fe944000 {
1834 compatible = "renesas,fdp1";
1835 reg = <0 0xfe944000 0 0x2400>;
1836 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1837 clocks = <&cpg CPG_MOD 118>;
1838 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1839 resets = <&cpg 118>;
1840 };
1841
1842 fdp1@fe948000 {
1843 compatible = "renesas,fdp1";
1844 reg = <0 0xfe948000 0 0x2400>;
1845 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1846 clocks = <&cpg CPG_MOD 117>;
1847 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1848 resets = <&cpg 117>;
1849 };
1850
1851 jpu: jpeg-codec@fe980000 {
1852 compatible = "renesas,jpu-r8a7790",
1853 "renesas,rcar-gen2-jpu";
1854 reg = <0 0xfe980000 0 0x10300>;
1855 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1856 clocks = <&cpg CPG_MOD 106>;
1857 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1858 resets = <&cpg 106>;
1859 };
1860
1861 du: display@feb00000 {
1862 compatible = "renesas,du-r8a7790";
1863 reg = <0 0xfeb00000 0 0x70000>;
1864 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1865 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1866 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1867 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1868 <&cpg CPG_MOD 722>;
1869 clock-names = "du.0", "du.1", "du.2";
1870 resets = <&cpg 724>;
1871 reset-names = "du.0";
1872 status = "disabled";
1873
1874 ports {
1875 #address-cells = <1>;
1876 #size-cells = <0>;
1877
1878 port@0 {
1879 reg = <0>;
1880 du_out_rgb: endpoint {
1881 };
1882 };
1883 port@1 {
1884 reg = <1>;
1885 du_out_lvds0: endpoint {
1886 remote-endpoint = <&lvds0_in>;
1887 };
1888 };
1889 port@2 {
1890 reg = <2>;
1891 du_out_lvds1: endpoint {
1892 remote-endpoint = <&lvds1_in>;
1893 };
1894 };
1895 };
1896 };
1897
1898 lvds0: lvds@feb90000 {
1899 compatible = "renesas,r8a7790-lvds";
1900 reg = <0 0xfeb90000 0 0x1c>;
1901 clocks = <&cpg CPG_MOD 726>;
1902 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1903 resets = <&cpg 726>;
1904 status = "disabled";
1905
1906 ports {
1907 #address-cells = <1>;
1908 #size-cells = <0>;
1909
1910 port@0 {
1911 reg = <0>;
1912 lvds0_in: endpoint {
1913 remote-endpoint = <&du_out_lvds0>;
1914 };
1915 };
1916 port@1 {
1917 reg = <1>;
1918 lvds0_out: endpoint {
1919 };
1920 };
1921 };
1922 };
1923
1924 lvds1: lvds@feb94000 {
1925 compatible = "renesas,r8a7790-lvds";
1926 reg = <0 0xfeb94000 0 0x1c>;
1927 clocks = <&cpg CPG_MOD 725>;
1928 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1929 resets = <&cpg 725>;
1930 status = "disabled";
1931
1932 ports {
1933 #address-cells = <1>;
1934 #size-cells = <0>;
1935
1936 port@0 {
1937 reg = <0>;
1938 lvds1_in: endpoint {
1939 remote-endpoint = <&du_out_lvds1>;
1940 };
1941 };
1942 port@1 {
1943 reg = <1>;
1944 lvds1_out: endpoint {
1945 };
1946 };
1947 };
1948 };
1949
1950 prr: chipid@ff000044 {
1951 compatible = "renesas,prr";
1952 reg = <0 0xff000044 0 4>;
1953 };
1954
1955 cmt0: timer@ffca0000 {
1956 compatible = "renesas,r8a7790-cmt0",
1957 "renesas,rcar-gen2-cmt0";
1958 reg = <0 0xffca0000 0 0x1004>;
1959 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1960 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1961 clocks = <&cpg CPG_MOD 124>;
1962 clock-names = "fck";
1963 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1964 resets = <&cpg 124>;
1965
1966 status = "disabled";
1967 };
1968
1969 cmt1: timer@e6130000 {
1970 compatible = "renesas,r8a7790-cmt1",
1971 "renesas,rcar-gen2-cmt1";
1972 reg = <0 0xe6130000 0 0x1004>;
1973 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1974 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1975 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1976 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1977 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1978 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1979 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1980 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1981 clocks = <&cpg CPG_MOD 329>;
1982 clock-names = "fck";
1983 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1984 resets = <&cpg 329>;
1985
1986 status = "disabled";
1987 };
1988 };
1989
1990 thermal-zones {
1991 cpu_thermal: cpu-thermal {
1992 polling-delay-passive = <0>;
1993 polling-delay = <0>;
1994
1995 thermal-sensors = <&thermal>;
1996
1997 trips {
1998 cpu-crit {
1999 temperature = <95000>;
2000 hysteresis = <0>;
2001 type = "critical";
2002 };
2003 };
2004 cooling-maps {
2005 };
2006 };
2007 };
2008
2009 timer {
2010 compatible = "arm,armv7-timer";
2011 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2012 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2013 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2014 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
2015 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
2016 };
2017
2018 /* External USB clock - can be overridden by the board */
2019 usb_extal_clk: usb_extal {
2020 compatible = "fixed-clock";
2021 #clock-cells = <0>;
2022 clock-frequency = <48000000>;
2023 };
2024 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.