1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device tree file for Phytec phyCORE-RK3288 SoM
4 * Copyright (C) 2017 PHYTEC Messtechnik GmbH
5 * Author: Wadim Egorov <w.egorov@phytec.de>
6 */
7
8 #include <dt-bindings/net/ti-dp83867.h>
9 #include "rk3288.dtsi"
10
11 / {
12 model = "Phytec RK3288 phyCORE";
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
14
15 /*
16 * Set the minimum memory size here and
17 * let the bootloader set the real size.
18 */
19 memory {
20 device_type = "memory";
21 reg = <0x0 0x0 0x0 0x8000000>;
22 };
23
24 aliases {
25 rtc0 = &i2c_rtc;
26 rtc1 = &rk818;
27 };
28
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
34 };
35
36 leds: user-leds {
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&user_led_pin>;
40
41 user_led: led-0 {
42 label = "green_led";
43 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
44 linux,default-trigger = "heartbeat";
45 default-state = "keep";
46 };
47 };
48
49 vdd_emmc_io: vdd-emmc-io {
50 compatible = "regulator-fixed";
51 regulator-name = "vdd_emmc_io";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
54 vin-supply = <&vdd_3v3_io>;
55 };
56
57 vdd_in_otg_out: vdd-in-otg-out {
58 compatible = "regulator-fixed";
59 regulator-name = "vdd_in_otg_out";
60 regulator-always-on;
61 regulator-boot-on;
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
64 };
65
66 vdd_misc_1v8: vdd-misc-1v8 {
67 compatible = "regulator-fixed";
68 regulator-name = "vdd_misc_1v8";
69 regulator-always-on;
70 regulator-boot-on;
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 };
74 };
75
76 &emmc {
77 status = "okay";
78 bus-width = <8>;
79 cap-mmc-highspeed;
80 disable-wp;
81 non-removable;
82 pinctrl-names = "default";
83 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
84 vmmc-supply = <&vdd_3v3_io>;
85 vqmmc-supply = <&vdd_emmc_io>;
86 };
87
88 &gmac {
89 assigned-clocks = <&cru SCLK_MAC>;
90 assigned-clock-parents = <&ext_gmac>;
91 clock_in_out = "input";
92 pinctrl-names = "default";
93 pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
94 phy-handle = <&phy0>;
95 phy-supply = <&vdd_eth_2v5>;
96 phy-mode = "rgmii-id";
97 snps,reset-active-low;
98 snps,reset-delays-us = <0 10000 1000000>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
100 tx_delay = <0x0>;
101 rx_delay = <0x0>;
102
103 mdio0 {
104 compatible = "snps,dwmac-mdio";
105 #address-cells = <1>;
106 #size-cells = <0>;
107
108 phy0: ethernet-phy@0 {
109 compatible = "ethernet-phy-ieee802.3-c22";
110 reg = <0>;
111 interrupt-parent = <&gpio4>;
112 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
113 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
114 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
115 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
116 enet-phy-lane-no-swap;
117 ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>;
118 };
119 };
120 };
121
122 &hdmi {
123 ddc-i2c-bus = <&i2c5>;
124 };
125
126 &io_domains {
127 status = "okay";
128 sdcard-supply = <&vdd_io_sd>;
129 flash0-supply = <&vdd_emmc_io>;
130 flash1-supply = <&vdd_misc_1v8>;
131 gpio1830-supply = <&vdd_3v3_io>;
132 gpio30-supply = <&vdd_3v3_io>;
133 bb-supply = <&vdd_3v3_io>;
134 dvp-supply = <&vdd_3v3_io>;
135 lcdc-supply = <&vdd_3v3_io>;
136 wifi-supply = <&vdd_3v3_io>;
137 audio-supply = <&vdd_3v3_io>;
138 };
139
140 &i2c0 {
141 status = "okay";
142 clock-frequency = <400000>;
143
144 rk818: pmic@1c {
145 compatible = "rockchip,rk818";
146 reg = <0x1c>;
147 interrupt-parent = <&gpio0>;
148 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pmic_int>;
151 rockchip,system-power-controller;
152 wakeup-source;
153 #clock-cells = <1>;
154
155 vcc1-supply = <&vdd_sys>;
156 vcc2-supply = <&vdd_sys>;
157 vcc3-supply = <&vdd_sys>;
158 vcc4-supply = <&vdd_sys>;
159 boost-supply = <&vdd_in_otg_out>;
160 vcc6-supply = <&vdd_sys>;
161 vcc7-supply = <&vdd_misc_1v8>;
162 vcc8-supply = <&vdd_misc_1v8>;
163 vcc9-supply = <&vdd_3v3_io>;
164 vddio-supply = <&vdd_3v3_io>;
165
166 regulators {
167 vdd_log: DCDC_REG1 {
168 regulator-name = "vdd_log";
169 regulator-always-on;
170 regulator-boot-on;
171 regulator-min-microvolt = <1100000>;
172 regulator-max-microvolt = <1100000>;
173 regulator-state-mem {
174 regulator-off-in-suspend;
175 };
176 };
177
178 vdd_gpu: DCDC_REG2 {
179 regulator-name = "vdd_gpu";
180 regulator-always-on;
181 regulator-boot-on;
182 regulator-min-microvolt = <800000>;
183 regulator-max-microvolt = <1250000>;
184 regulator-state-mem {
185 regulator-on-in-suspend;
186 regulator-suspend-microvolt = <1000000>;
187 };
188 };
189
190 vcc_ddr: DCDC_REG3 {
191 regulator-name = "vcc_ddr";
192 regulator-always-on;
193 regulator-boot-on;
194 regulator-state-mem {
195 regulator-on-in-suspend;
196 };
197 };
198
199 vdd_3v3_io: DCDC_REG4 {
200 regulator-name = "vdd_3v3_io";
201 regulator-always-on;
202 regulator-boot-on;
203 regulator-min-microvolt = <3300000>;
204 regulator-max-microvolt = <3300000>;
205 regulator-state-mem {
206 regulator-on-in-suspend;
207 regulator-suspend-microvolt = <3300000>;
208 };
209 };
210
211 vdd_sys: DCDC_BOOST {
212 regulator-name = "vdd_sys";
213 regulator-always-on;
214 regulator-boot-on;
215 regulator-min-microvolt = <5000000>;
216 regulator-max-microvolt = <5000000>;
217 regulator-state-mem {
218 regulator-on-in-suspend;
219 regulator-suspend-microvolt = <5000000>;
220 };
221 };
222
223 /* vcc9 */
224 vdd_sd: SWITCH_REG {
225 regulator-name = "vdd_sd";
226 regulator-always-on;
227 regulator-boot-on;
228 regulator-state-mem {
229 regulator-off-in-suspend;
230 };
231 };
232
233 /* vcc6 */
234 vdd_eth_2v5: LDO_REG2 {
235 regulator-name = "vdd_eth_2v5";
236 regulator-always-on;
237 regulator-boot-on;
238 regulator-min-microvolt = <2500000>;
239 regulator-max-microvolt = <2500000>;
240 regulator-state-mem {
241 regulator-on-in-suspend;
242 regulator-suspend-microvolt = <2500000>;
243 };
244 };
245
246 /* vcc7 */
247 vdd_1v0: LDO_REG3 {
248 regulator-name = "vdd_1v0";
249 regulator-always-on;
250 regulator-boot-on;
251 regulator-min-microvolt = <1000000>;
252 regulator-max-microvolt = <1000000>;
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 regulator-suspend-microvolt = <1000000>;
256 };
257 };
258
259 /* vcc8 */
260 vdd_1v8_lcd_ldo: LDO_REG4 {
261 regulator-name = "vdd_1v8_lcd_ldo";
262 regulator-always-on;
263 regulator-boot-on;
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <1800000>;
266 regulator-state-mem {
267 regulator-on-in-suspend;
268 regulator-suspend-microvolt = <1800000>;
269 };
270 };
271
272 /* vcc8 */
273 vdd_1v0_lcd: LDO_REG6 {
274 regulator-name = "vdd_1v0_lcd";
275 regulator-always-on;
276 regulator-boot-on;
277 regulator-min-microvolt = <1000000>;
278 regulator-max-microvolt = <1000000>;
279 regulator-state-mem {
280 regulator-on-in-suspend;
281 regulator-suspend-microvolt = <1000000>;
282 };
283 };
284
285 /* vcc7 */
286 vdd_1v8_ldo: LDO_REG7 {
287 regulator-name = "vdd_1v8_ldo";
288 regulator-always-on;
289 regulator-boot-on;
290 regulator-min-microvolt = <1800000>;
291 regulator-max-microvolt = <1800000>;
292 regulator-state-mem {
293 regulator-off-in-suspend;
294 regulator-suspend-microvolt = <1800000>;
295 };
296 };
297
298 /* vcc9 */
299 vdd_io_sd: LDO_REG9 {
300 regulator-name = "vdd_io_sd";
301 regulator-always-on;
302 regulator-boot-on;
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <3300000>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
307 };
308 };
309 };
310 };
311
312 /* M24C32-D */
313 i2c_eeprom: eeprom@50 {
314 compatible = "atmel,24c32";
315 reg = <0x50>;
316 pagesize = <32>;
317 };
318
319 vdd_cpu: regulator@60 {
320 compatible = "fcs,fan53555";
321 reg = <0x60>;
322 fcs,suspend-voltage-selector = <1>;
323 regulator-always-on;
324 regulator-boot-on;
325 regulator-enable-ramp-delay = <300>;
326 regulator-name = "vdd_cpu";
327 regulator-min-microvolt = <800000>;
328 regulator-max-microvolt = <1430000>;
329 regulator-ramp-delay = <8000>;
330 vin-supply = <&vdd_sys>;
331 };
332 };
333
334 &pinctrl {
335 pcfg_output_high: pcfg-output-high {
336 output-high;
337 };
338
339 emmc {
340 /*
341 * We run eMMC at max speed; bump up drive strength.
342 * We also have external pulls, so disable the internal ones.
343 */
344 emmc_clk: emmc-clk {
345 rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_12ma>;
346 };
347
348 emmc_cmd: emmc-cmd {
349 rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_12ma>;
350 };
351
352 emmc_bus8: emmc-bus8 {
353 rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_12ma>,
354 <3 RK_PA1 2 &pcfg_pull_none_12ma>,
355 <3 RK_PA2 2 &pcfg_pull_none_12ma>,
356 <3 RK_PA3 2 &pcfg_pull_none_12ma>,
357 <3 RK_PA4 2 &pcfg_pull_none_12ma>,
358 <3 RK_PA5 2 &pcfg_pull_none_12ma>,
359 <3 RK_PA6 2 &pcfg_pull_none_12ma>,
360 <3 RK_PA7 2 &pcfg_pull_none_12ma>;
361 };
362 };
363
364 gmac {
365 phy_int: phy-int {
366 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
367 };
368
369 phy_rst: phy-rst {
370 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
371 };
372 };
373
374 leds {
375 user_led_pin: user-led-pin {
376 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>;
377 };
378 };
379
380 pmic {
381 pmic_int: pmic-int {
382 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
383 };
384
385 /* Pin for switching state between sleep and non-sleep state */
386 pmic_sleep: pmic-sleep {
387 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
388 };
389 };
390 };
391
392 &pwm1 {
393 status = "okay";
394 };
395
396 &saradc {
397 status = "okay";
398 vref-supply = <&vdd_1v8_ldo>;
399 };
400
401 &spi2 {
402 status = "okay";
403
404 serial_flash: flash@0 {
405 compatible = "micron,n25q128a13", "jedec,spi-nor";
406 reg = <0x0>;
407 spi-max-frequency = <50000000>;
408 m25p,fast-read;
409 #address-cells = <1>;
410 #size-cells = <1>;
411 status = "okay";
412 };
413 };
414
415 &tsadc {
416 status = "okay";
417 rockchip,hw-tshut-mode = <0>;
418 rockchip,hw-tshut-polarity = <0>;
419 };
420
421 &vopb {
422 status = "okay";
423 };
424
425 &vopb_mmu {
426 status = "okay";
427 };
428
429 &vopl {
430 status = "okay";
431 };
432
433 &vopl_mmu {
434 status = "okay";
435 };
436
437 &wdt {
438 status = "okay";
439 };
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