1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Google Veyron (and derivatives) fragment for the max98090 audio
4 * codec and analog headphone jack.
5 *
6 * Copyright 2016 Google, Inc
7 */
8
9 / {
10 sound {
11 compatible = "rockchip,rockchip-audio-max98090";
12 pinctrl-names = "default";
13 pinctrl-0 = <&mic_det>, <&hp_det>;
14 rockchip,model = "VEYRON-I2S";
15 rockchip,i2s-controller = <&i2s>;
16 rockchip,audio-codec = <&max98090>;
17 rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
18 rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
19 rockchip,headset-codec = <&headsetcodec>;
20 rockchip,hdmi-codec = <&hdmi>;
21 };
22 };
23
24 &i2c2 {
25 max98090: max98090@10 {
26 compatible = "maxim,max98090";
27 reg = <0x10>;
28 interrupt-parent = <&gpio6>;
29 interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
30 clock-names = "mclk";
31 clocks = <&cru SCLK_I2S0_OUT>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&int_codec>;
34 };
35 };
36
37 &i2c4 {
38 headsetcodec: ts3a227e@3b {
39 compatible = "ti,ts3a227e";
40 reg = <0x3b>;
41 interrupt-parent = <&gpio0>;
42 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&ts3a227e_int_l>;
45 ti,micbias = <7>; /* MICBIAS = 2.8V */
46 };
47 };
48
49 &i2s {
50 status = "okay";
51 };
52
53 &io_domains {
54 audio-supply = <&vcc18_codec>;
55 };
56
57 &rk808 {
58 vcc10-supply = <&vcc33_sys>;
59
60 regulators {
61 vcc18_codec: LDO_REG6 {
62 regulator-name = "vcc18_codec";
63 regulator-always-on;
64 regulator-boot-on;
65 regulator-min-microvolt = <1800000>;
66 regulator-max-microvolt = <1800000>;
67 regulator-state-mem {
68 regulator-off-in-suspend;
69 };
70 };
71 };
72 };
73
74 &pinctrl {
75 codec {
76 hp_det: hp-det {
77 rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
78 };
79
80 /*
81 * HACK: We're going to _pull down_ this _active low_ interrupt
82 * so that it never fires. We don't need this interrupt because
83 * we've got a ts3a227e chip but the driver requires it.
84 */
85 int_codec: int-codec {
86 rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
87 };
88
89 mic_det: mic-det {
90 rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
91 };
92 };
93
94 headset {
95 ts3a227e_int_l: ts3a227e-int-l {
96 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
97 };
98 };
99 };
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