1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
4 */
5
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <arm64/rockchip/rockchip-pinconf.dtsi>
8
9 /*
10 * This file is auto generated by pin2dts tool, please keep these code
11 * by adding changes at end of this file.
12 */
13 &pinctrl {
14 clk_out_ethernet {
15 /omit-if-no-ref/
16 clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
17 rockchip,pins =
18 /* clk_out_ethernet_m1 */
19 <2 RK_PC5 2 &pcfg_pull_none>;
20 };
21 };
22 emmc {
23 /omit-if-no-ref/
24 emmc_rstnout: emmc-rstnout {
25 rockchip,pins =
26 /* emmc_rstn */
27 <1 RK_PA3 2 &pcfg_pull_none>;
28 };
29 /omit-if-no-ref/
30 emmc_bus8: emmc-bus8 {
31 rockchip,pins =
32 /* emmc_d0 */
33 <0 RK_PC4 2 &pcfg_pull_up_drv_level_2>,
34 /* emmc_d1 */
35 <0 RK_PC5 2 &pcfg_pull_up_drv_level_2>,
36 /* emmc_d2 */
37 <0 RK_PC6 2 &pcfg_pull_up_drv_level_2>,
38 /* emmc_d3 */
39 <0 RK_PC7 2 &pcfg_pull_up_drv_level_2>,
40 /* emmc_d4 */
41 <0 RK_PD0 2 &pcfg_pull_up_drv_level_2>,
42 /* emmc_d5 */
43 <0 RK_PD1 2 &pcfg_pull_up_drv_level_2>,
44 /* emmc_d6 */
45 <0 RK_PD2 2 &pcfg_pull_up_drv_level_2>,
46 /* emmc_d7 */
47 <0 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
48 };
49 /omit-if-no-ref/
50 emmc_clk: emmc-clk {
51 rockchip,pins =
52 /* emmc_clko */
53 <0 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
54 };
55 /omit-if-no-ref/
56 emmc_cmd: emmc-cmd {
57 rockchip,pins =
58 /* emmc_cmd */
59 <0 RK_PD5 2 &pcfg_pull_up_drv_level_2>;
60 };
61 };
62 fspi {
63 /omit-if-no-ref/
64 fspi_pins: fspi-pins {
65 rockchip,pins =
66 /* fspi_clk */
67 <1 RK_PA3 3 &pcfg_pull_down>,
68 /* fspi_cs0n */
69 <0 RK_PD4 3 &pcfg_pull_up>,
70 /* fspi_d0 */
71 <1 RK_PA0 3 &pcfg_pull_up>,
72 /* fspi_d1 */
73 <1 RK_PA1 3 &pcfg_pull_up>,
74 /* fspi_d2 */
75 <0 RK_PD6 3 &pcfg_pull_up>,
76 /* fspi_d3 */
77 <1 RK_PA2 3 &pcfg_pull_up>;
78 };
79 };
80 i2c0 {
81 /omit-if-no-ref/
82 i2c0_xfer: i2c0-xfer {
83 rockchip,pins =
84 /* i2c0_scl */
85 <0 RK_PB4 1 &pcfg_pull_none_drv_level_0_smt>,
86 /* i2c0_sda */
87 <0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
88 };
89 };
90 i2c2 {
91 /omit-if-no-ref/
92 i2c2_xfer: i2c2-xfer {
93 rockchip,pins =
94 /* i2c2_scl */
95 <0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
96 /* i2c2_sda */
97 <0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
98 };
99 };
100 pwm2 {
101 /omit-if-no-ref/
102 pwm2m0_pins: pwm2m0-pins {
103 rockchip,pins =
104 /* pwm2_pin_m0 */
105 <0 RK_PC0 3 &pcfg_pull_none>;
106 };
107 };
108 pwm11 {
109 /omit-if-no-ref/
110 pwm11m0_pins: pwm11m0-pins {
111 rockchip,pins =
112 /* pwm11_pin_m0 */
113 <3 RK_PA7 6 &pcfg_pull_none>;
114 };
115 };
116 rgmii {
117 /omit-if-no-ref/
118 rgmiim1_miim: rgmiim1-miim {
119 rockchip,pins =
120 /* rgmii_mdc_m1 */
121 <2 RK_PC2 2 &pcfg_pull_none>,
122 /* rgmii_mdio_m1 */
123 <2 RK_PC1 2 &pcfg_pull_none>;
124 };
125 /omit-if-no-ref/
126 rgmiim1_rxer: rgmiim1-rxer {
127 rockchip,pins =
128 /* rgmii_rxer_m1 */
129 <2 RK_PC0 2 &pcfg_pull_none>;
130 };
131 /omit-if-no-ref/
132 rgmiim1_bus2: rgmiim1-bus2 {
133 rockchip,pins =
134 /* rgmii_rxd0_m1 */
135 <2 RK_PB5 2 &pcfg_pull_none>,
136 /* rgmii_rxd1_m1 */
137 <2 RK_PB6 2 &pcfg_pull_none>,
138 /* rgmii_rxdv_m1 */
139 <2 RK_PB4 2 &pcfg_pull_none>,
140 /* rgmii_txd0_m1 */
141 <2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
142 /* rgmii_txd1_m1 */
143 <2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
144 /* rgmii_txen_m1 */
145 <2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
146 };
147 /omit-if-no-ref/
148 rgmiim1_bus4: rgmiim1-bus4 {
149 rockchip,pins =
150 /* rgmii_rxclk_m1 */
151 <2 RK_PD3 2 &pcfg_pull_none>,
152 /* rgmii_rxd2_m1 */
153 <2 RK_PC7 2 &pcfg_pull_none>,
154 /* rgmii_rxd3_m1 */
155 <2 RK_PD0 2 &pcfg_pull_none>,
156 /* rgmii_txclk_m1 */
157 <2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
158 /* rgmii_txd2_m1 */
159 <2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
160 /* rgmii_txd3_m1 */
161 <2 RK_PA4 2 &pcfg_pull_none_drv_level_3>;
162 };
163 /omit-if-no-ref/
164 rgmiim1_mclkinout: rgmiim1-mclkinout {
165 rockchip,pins =
166 /* rgmii_clk_m1 */
167 <2 RK_PB7 2 &pcfg_pull_none>;
168 };
169 };
170 sdmmc0 {
171 /omit-if-no-ref/
172 sdmmc0_bus4: sdmmc0-bus4 {
173 rockchip,pins =
174 /* sdmmc0_d0 */
175 <1 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
176 /* sdmmc0_d1 */
177 <1 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
178 /* sdmmc0_d2 */
179 <1 RK_PA6 1 &pcfg_pull_up_drv_level_2>,
180 /* sdmmc0_d3 */
181 <1 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
182 };
183 /omit-if-no-ref/
184 sdmmc0_clk: sdmmc0-clk {
185 rockchip,pins =
186 /* sdmmc0_clk */
187 <1 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
188 };
189 /omit-if-no-ref/
190 sdmmc0_cmd: sdmmc0-cmd {
191 rockchip,pins =
192 /* sdmmc0_cmd */
193 <1 RK_PB1 1 &pcfg_pull_up_drv_level_2>;
194 };
195 /omit-if-no-ref/
196 sdmmc0_det: sdmmc0-det {
197 rockchip,pins =
198 <0 RK_PA3 1 &pcfg_pull_none>;
199 };
200 /omit-if-no-ref/
201 sdmmc0_pwr: sdmmc0-pwr {
202 rockchip,pins =
203 <0 RK_PC0 1 &pcfg_pull_none>;
204 };
205 };
206 sdmmc1 {
207 /omit-if-no-ref/
208 sdmmc1_bus4: sdmmc1-bus4 {
209 rockchip,pins =
210 /* sdmmc1_d0 */
211 <1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
212 /* sdmmc1_d1 */
213 <1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
214 /* sdmmc1_d2 */
215 <1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
216 /* sdmmc1_d3 */
217 <1 RK_PB7 1 &pcfg_pull_up_drv_level_2>;
218 };
219 /omit-if-no-ref/
220 sdmmc1_clk: sdmmc1-clk {
221 rockchip,pins =
222 /* sdmmc1_clk */
223 <1 RK_PB2 1 &pcfg_pull_up_drv_level_2>;
224 };
225 /omit-if-no-ref/
226 sdmmc1_cmd: sdmmc1-cmd {
227 rockchip,pins =
228 /* sdmmc1_cmd */
229 <1 RK_PB3 1 &pcfg_pull_up_drv_level_2>;
230 };
231 /omit-if-no-ref/
232 sdmmc1_det: sdmmc1-det {
233 rockchip,pins =
234 <1 RK_PD0 2 &pcfg_pull_none>;
235 };
236 /omit-if-no-ref/
237 sdmmc1_pwr: sdmmc1-pwr {
238 rockchip,pins =
239 <1 RK_PD1 2 &pcfg_pull_none>;
240 };
241 };
242 uart0 {
243 /omit-if-no-ref/
244 uart0_xfer: uart0-xfer {
245 rockchip,pins =
246 /* uart0_rx */
247 <1 RK_PC2 1 &pcfg_pull_up>,
248 /* uart0_tx */
249 <1 RK_PC3 1 &pcfg_pull_up>;
250 };
251 /omit-if-no-ref/
252 uart0_ctsn: uart0-ctsn {
253 rockchip,pins =
254 <1 RK_PC1 1 &pcfg_pull_none>;
255 };
256 /omit-if-no-ref/
257 uart0_rtsn: uart0-rtsn {
258 rockchip,pins =
259 <1 RK_PC0 1 &pcfg_pull_none>;
260 };
261 /omit-if-no-ref/
262 uart0_rtsn_gpio: uart0-rts-pin {
263 rockchip,pins =
264 <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
265 };
266 };
267 uart1 {
268 /omit-if-no-ref/
269 uart1m0_xfer: uart1m0-xfer {
270 rockchip,pins =
271 /* uart1_rx_m0 */
272 <0 RK_PB7 2 &pcfg_pull_up>,
273 /* uart1_tx_m0 */
274 <0 RK_PB6 2 &pcfg_pull_up>;
275 };
276 };
277 uart2 {
278 /omit-if-no-ref/
279 uart2m1_xfer: uart2m1-xfer {
280 rockchip,pins =
281 /* uart2_rx_m1 */
282 <3 RK_PA3 1 &pcfg_pull_up>,
283 /* uart2_tx_m1 */
284 <3 RK_PA2 1 &pcfg_pull_up>;
285 };
286 };
287 uart3 {
288 /omit-if-no-ref/
289 uart3m0_xfer: uart3m0-xfer {
290 rockchip,pins =
291 /* uart3_rx_m0 */
292 <3 RK_PC7 4 &pcfg_pull_up>,
293 /* uart3_tx_m0 */
294 <3 RK_PC6 4 &pcfg_pull_up>;
295 };
296 /omit-if-no-ref/
297 uart3m2_xfer: uart3m2-xfer {
298 rockchip,pins =
299 /* uart3_rx_m2 */
300 <3 RK_PA1 4 &pcfg_pull_up>,
301 /* uart3_tx_m2 */
302 <3 RK_PA0 4 &pcfg_pull_up>;
303 };
304 };
305 uart4 {
306 /omit-if-no-ref/
307 uart4m0_xfer: uart4m0-xfer {
308 rockchip,pins =
309 /* uart4_rx_m0 */
310 <3 RK_PA5 4 &pcfg_pull_up>,
311 /* uart4_tx_m0 */
312 <3 RK_PA4 4 &pcfg_pull_up>;
313 };
314 /omit-if-no-ref/
315 uart4m2_xfer: uart4m2-xfer {
316 rockchip,pins =
317 /* uart4_rx_m2 */
318 <1 RK_PD4 3 &pcfg_pull_up>,
319 /* uart4_tx_m2 */
320 <1 RK_PD5 3 &pcfg_pull_up>;
321 };
322 };
323 uart5 {
324 /omit-if-no-ref/
325 uart5m0_xfer: uart5m0-xfer {
326 rockchip,pins =
327 /* uart5_rx_m0 */
328 <3 RK_PA7 4 &pcfg_pull_up>,
329 /* uart5_tx_m0 */
330 <3 RK_PA6 4 &pcfg_pull_up>;
331 };
332 /omit-if-no-ref/
333 uart5m2_xfer: uart5m2-xfer {
334 rockchip,pins =
335 /* uart5_rx_m2 */
336 <2 RK_PA1 3 &pcfg_pull_up>,
337 /* uart5_tx_m2 */
338 <2 RK_PA0 3 &pcfg_pull_up>;
339 };
340 };
341 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.