1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2014 Linaro Ltd.
4 */
5
6 #include "ste-ab8500.dtsi"
7
8 / {
9 soc {
10 prcmu@80157000 {
11 ab8500 {
12 phy {
13 pinctrl-names = "default", "sleep";
14 pinctrl-0 = <&usb_a_1_default>;
15 pinctrl-1 = <&usb_a_1_sleep>;
16 };
17
18 regulator {
19 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
20 regulator-name = "V-DISPLAY";
21 };
22
23 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
24 regulator-name = "V-eMMC1";
25 };
26
27 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
28 regulator-name = "V-MMC-SD";
29 };
30
31 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
32 regulator-name = "V-INTCORE";
33 };
34
35 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
36 regulator-name = "V-TVOUT";
37 };
38
39 ab8500_ldo_audio_reg: ab8500_ldo_audio {
40 regulator-name = "V-AUD";
41 };
42
43 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
44 regulator-name = "V-AMIC1";
45 };
46
47 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
48 regulator-name = "V-AMIC2";
49 };
50
51 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
52 regulator-name = "V-DMIC";
53 };
54
55 ab8500_ldo_ana_reg: ab8500_ldo_ana {
56 regulator-name = "V-CSI/DSI";
57 };
58 };
59
60 gpio {
61 /* Hog a few default settings */
62 pinctrl-names = "default";
63 pinctrl-0 = <&gpio2_default_mode>,
64 <&gpio4_default_mode>,
65 <&gpio10_default_mode>,
66 <&gpio11_default_mode>,
67 <&gpio12_default_mode>,
68 <&gpio13_default_mode>,
69 <&gpio16_default_mode>,
70 <&gpio24_default_mode>,
71 <&gpio25_default_mode>,
72 <&gpio36_default_mode>,
73 <&gpio37_default_mode>,
74 <&gpio38_default_mode>,
75 <&gpio39_default_mode>,
76 <&gpio42_default_mode>,
77 <&gpio26_default_mode>,
78 <&gpio35_default_mode>,
79 <&ycbcr_default_mode>,
80 <&pwm_default_mode>,
81 <&adi1_default_mode>,
82 <&usbuicc_default_mode>,
83 <&dmic_default_mode>,
84 <&extcpena_default_mode>,
85 <&modsclsda_default_mode>;
86
87 /*
88 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
89 * are muxed in as GPIO, and configured as INPUT PULL DOWN
90 */
91 gpio2 {
92 gpio2_default_mode: gpio2_default {
93 default_mux {
94 function = "gpio";
95 groups = "gpio2_a_1";
96 };
97 default_cfg {
98 pins = "GPIO2_T9";
99 input-enable;
100 bias-pull-down;
101 };
102 };
103 };
104 gpio4 {
105 gpio4_default_mode: gpio4_default {
106 default_mux {
107 function = "gpio";
108 groups = "gpio4_a_1";
109 };
110 default_cfg {
111 pins = "GPIO4_W2";
112 input-enable;
113 bias-pull-down;
114 };
115 };
116 };
117 gpio10 {
118 gpio10_default_mode: gpio10_default {
119 default_mux {
120 function = "gpio";
121 groups = "gpio10_d_1";
122 };
123 default_cfg {
124 pins = "GPIO10_U17";
125 input-enable;
126 bias-pull-down;
127 };
128 };
129 };
130 gpio11 {
131 gpio11_default_mode: gpio11_default {
132 default_mux {
133 function = "gpio";
134 groups = "gpio11_d_1";
135 };
136 default_cfg {
137 pins = "GPIO11_AA18";
138 input-enable;
139 bias-pull-down;
140 };
141 };
142 };
143 gpio12 {
144 gpio12_default_mode: gpio12_default {
145 default_mux {
146 function = "gpio";
147 groups = "gpio12_d_1";
148 };
149 default_cfg {
150 pins = "GPIO12_U16";
151 input-enable;
152 bias-pull-down;
153 };
154 };
155 };
156 gpio13 {
157 gpio13_default_mode: gpio13_default {
158 default_mux {
159 function = "gpio";
160 groups = "gpio13_d_1";
161 };
162 default_cfg {
163 pins = "GPIO13_W17";
164 input-enable;
165 bias-pull-down;
166 };
167 };
168 };
169 gpio16 {
170 gpio16_default_mode: gpio16_default {
171 default_mux {
172 function = "gpio";
173 groups = "gpio16_a_1";
174 };
175 default_cfg {
176 pins = "GPIO16_F15";
177 input-enable;
178 bias-pull-down;
179 };
180 };
181 };
182 gpio24 {
183 gpio24_default_mode: gpio24_default {
184 default_mux {
185 function = "gpio";
186 groups = "gpio24_a_1";
187 };
188 default_cfg {
189 pins = "GPIO24_T14";
190 input-enable;
191 bias-pull-down;
192 };
193 };
194 };
195 gpio25 {
196 gpio25_default_mode: gpio25_default {
197 default_mux {
198 function = "gpio";
199 groups = "gpio25_a_1";
200 };
201 default_cfg {
202 pins = "GPIO25_R16";
203 input-enable;
204 bias-pull-down;
205 };
206 };
207 };
208 gpio36 {
209 gpio36_default_mode: gpio36_default {
210 default_mux {
211 function = "gpio";
212 groups = "gpio36_a_1";
213 };
214 default_cfg {
215 pins = "GPIO36_A17";
216 input-enable;
217 bias-pull-down;
218 };
219 };
220 };
221 gpio37 {
222 gpio37_default_mode: gpio37_default {
223 default_mux {
224 function = "gpio";
225 groups = "gpio37_a_1";
226 };
227 default_cfg {
228 pins = "GPIO37_E15";
229 input-enable;
230 bias-pull-down;
231 };
232 };
233 };
234 gpio38 {
235 gpio38_default_mode: gpio38_default {
236 default_mux {
237 function = "gpio";
238 groups = "gpio38_a_1";
239 };
240 default_cfg {
241 pins = "GPIO38_C17";
242 input-enable;
243 bias-pull-down;
244 };
245 };
246 };
247 gpio39 {
248 gpio39_default_mode: gpio39_default {
249 default_mux {
250 function = "gpio";
251 groups = "gpio39_a_1";
252 };
253 default_cfg {
254 pins = "GPIO39_E16";
255 input-enable;
256 bias-pull-down;
257 };
258 };
259 };
260 gpio42 {
261 gpio42_default_mode: gpio42_default {
262 default_mux {
263 function = "gpio";
264 groups = "gpio42_a_1";
265 };
266 default_cfg {
267 pins = "GPIO42_U2";
268 input-enable;
269 bias-pull-down;
270 };
271 };
272 };
273 /*
274 * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
275 */
276 gpio26 {
277 gpio26_default_mode: gpio26_default {
278 default_mux {
279 function = "gpio";
280 groups = "gpio26_d_1";
281 };
282 default_cfg {
283 pins = "GPIO26_M16";
284 output-low;
285 };
286 };
287 };
288 gpio35 {
289 gpio35_default_mode: gpio35_default {
290 default_mux {
291 function = "gpio";
292 groups = "gpio35_d_1";
293 };
294 default_cfg {
295 pins = "GPIO35_W15";
296 output-low;
297 };
298 };
299 };
300 /*
301 * This sets up the YCBCR connector pins, i.e. analog video out.
302 * Set as input with no bias.
303 */
304 ycbcr {
305 ycbcr_default_mode: ycbcr_default {
306 default_mux {
307 function = "ycbcr";
308 groups = "ycbcr0123_d_1";
309 };
310 default_cfg {
311 pins = "GPIO6_Y18",
312 "GPIO7_AA20",
313 "GPIO8_W18",
314 "GPIO9_AA19";
315 input-enable;
316 bias-disable;
317 };
318 };
319 };
320 /* This sets up the PWM pins 14 and 15 */
321 pwm {
322 pwm_default_mode: pwm_default {
323 default_mux {
324 function = "pwmout";
325 groups = "pwmout1_d_1", "pwmout2_d_1";
326 };
327 default_cfg {
328 pins = "GPIO14_F14",
329 "GPIO15_B17";
330 input-enable;
331 bias-pull-down;
332 };
333 };
334 };
335 /* This sets up audio interface 1 */
336 adi1 {
337 adi1_default_mode: adi1_default {
338 default_mux {
339 function = "adi1";
340 groups = "adi1_d_1";
341 };
342 default_cfg {
343 pins = "GPIO17_P5",
344 "GPIO18_R5",
345 "GPIO19_U5",
346 "GPIO20_T5";
347 input-enable;
348 bias-pull-down;
349 };
350 };
351 };
352 /* This sets up the USB UICC pins */
353 usbuicc {
354 usbuicc_default_mode: usbuicc_default {
355 default_mux {
356 function = "usbuicc";
357 groups = "usbuicc_d_1";
358 };
359 default_cfg {
360 pins = "GPIO21_H19",
361 "GPIO22_G20",
362 "GPIO23_G19";
363 input-enable;
364 bias-pull-down;
365 };
366 };
367 };
368 /* This sets up the microphone pins */
369 dmic {
370 dmic_default_mode: dmic_default {
371 default_mux {
372 function = "dmic";
373 groups = "dmic12_d_1",
374 "dmic34_d_1",
375 "dmic56_d_1";
376 };
377 default_cfg {
378 pins = "GPIO27_J6",
379 "GPIO28_K6",
380 "GPIO29_G6",
381 "GPIO30_H6",
382 "GPIO31_F5",
383 "GPIO32_G5";
384 input-enable;
385 bias-pull-down;
386 };
387 };
388 };
389 extcpena {
390 extcpena_default_mode: extcpena_default {
391 default_mux {
392 function = "extcpena";
393 groups = "extcpena_d_1";
394 };
395 default_cfg {
396 pins = "GPIO34_R17";
397 input-enable;
398 bias-pull-down;
399 };
400 };
401 };
402 /* Modem I2C setup (SCL and SDA pins) */
403 modsclsda {
404 modsclsda_default_mode: modsclsda_default {
405 default_mux {
406 function = "modsclsda";
407 groups = "modsclsda_d_1";
408 };
409 default_cfg {
410 pins = "GPIO40_T19",
411 "GPIO41_U19";
412 input-enable;
413 bias-pull-down;
414 };
415 };
416 };
417 /*
418 * Clock output pins associated with regulators.
419 */
420 sysclkreq2 {
421 sysclkreq2_default_mode: sysclkreq2_default {
422 default_mux {
423 function = "sysclkreq";
424 groups = "sysclkreq2_d_1";
425 };
426 default_cfg {
427 pins = "GPIO1_T10";
428 input-enable;
429 bias-disable;
430 };
431 };
432 sysclkreq2_sleep_mode: sysclkreq2_sleep {
433 default_mux {
434 function = "gpio";
435 groups = "gpio1_a_1";
436 };
437 default_cfg {
438 pins = "GPIO1_T10";
439 input-enable;
440 bias-pull-down;
441 };
442 };
443 };
444 sysclkreq4 {
445 sysclkreq4_default_mode: sysclkreq4_default {
446 default_mux {
447 function = "sysclkreq";
448 groups = "sysclkreq4_d_1";
449 };
450 default_cfg {
451 pins = "GPIO3_U9";
452 input-enable;
453 bias-disable;
454 };
455 };
456 sysclkreq4_sleep_mode: sysclkreq4_sleep {
457 default_mux {
458 function = "gpio";
459 groups = "gpio3_a_1";
460 };
461 default_cfg {
462 pins = "GPIO3_U9";
463 input-enable;
464 bias-pull-down;
465 };
466 };
467 };
468 };
469 /*
470 * Charging is not working on the HREF unless an actual battery is
471 * mounted, most HREFs have a DC cable in to the "battery power"
472 * which means this will only be cofusing. So do not enable charging
473 * of the HREFs.
474 */
475 ab8500_fg {
476 status = "disabled";
477 };
478 ab8500_btemp {
479 status = "disabled";
480 };
481 ab8500_charger {
482 status = "disabled";
483 };
484 ab8500_chargalg {
485 status = "disabled";
486 };
487 };
488 };
489 };
490 };
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