1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /*
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
5 * Author: Dom VOVARD <dom.vovard@linrt.com>.
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16 #include "stm32mp15-pinctrl.dtsi"
17
18 / {
19 model = "PHYTEC phyCORE-STM32MP15 SOM";
20 compatible = "phytec,phycore-stm32mp157c-som", "st,stm32mp157";
21
22 aliases {
23 ethernet0 = ðernet0;
24 rtc0 = &i2c4_rtc;
25 rtc1 = &rtc;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n8";
30 };
31
32 gpio-keys {
33 compatible = "gpio-keys";
34
35 key-home {
36 label = "Home";
37 gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_HOME>;
39 };
40
41 key-enter {
42 label = "Enter";
43 gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_ENTER>;
45 };
46 };
47
48 reserved-memory {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 retram: retram@38000000 {
54 compatible = "shared-dma-pool";
55 reg = <0x38000000 0x10000>;
56 no-map;
57 };
58
59 mcuram: mcuram@30000000 {
60 compatible = "shared-dma-pool";
61 reg = <0x30000000 0x40000>;
62 no-map;
63 };
64
65 mcuram2: mcuram2@10000000 {
66 compatible = "shared-dma-pool";
67 reg = <0x10000000 0x40000>;
68 no-map;
69 };
70
71 vdev0vring0: vdev0vring0@10040000 {
72 compatible = "shared-dma-pool";
73 reg = <0x10040000 0x1000>;
74 no-map;
75 };
76
77 vdev0vring1: vdev0vring1@10041000 {
78 compatible = "shared-dma-pool";
79 reg = <0x10041000 0x1000>;
80 no-map;
81 };
82
83 vdev0buffer: vdev0buffer@10042000 {
84 compatible = "shared-dma-pool";
85 reg = <0x10042000 0x4000>;
86 no-map;
87 };
88 };
89
90 sound {
91 compatible = "audio-graph-card";
92 label = "STM32MP1-PHYCORE";
93 routing =
94 "Playback", "MCLK", /* Set a route between "MCLK" and "playback" widgets */
95 "Capture", "MCLK";
96 dais = <&sai2b_port>,
97 <&sai2a_port>;
98 };
99
100 regulator_vin: regulator {
101 compatible = "regulator-fixed";
102 regulator-name = "vin";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
105 regulator-always-on;
106 };
107 };
108
109 ðernet0 {
110 pinctrl-0 = <ðernet0_rgmii_pins_d>;
111 pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
112 pinctrl-names = "default", "sleep";
113 phy-mode = "rgmii-id";
114 max-speed = <1000>;
115 phy-handle = <&phy0>;
116 st,eth-clk-sel;
117 status = "okay";
118
119 mdio {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "snps,dwmac-mdio";
123
124 phy0: ethernet-phy@1 {
125 compatible = "ethernet-phy-ieee802.3-c22";
126 reg = <1>;
127 interrupt-parent = <&gpiog>;
128 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
129 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
130 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
131 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
132 ti,min-output-impedance;
133 enet-phy-lane-no-swap;
134 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
135 };
136 };
137 };
138
139 &i2c1 {
140 pinctrl-names = "default", "sleep";
141 pinctrl-0 = <&i2c1_pins_b>;
142 pinctrl-1 = <&i2c1_sleep_pins_b>;
143 i2c-scl-rising-time-ns = <100>;
144 i2c-scl-falling-time-ns = <7>;
145 status = "okay";
146
147 codec@18 {
148 compatible = "ti,tlv320aic3007";
149 reg = <0x18>;
150 #sound-dai-cells = <0>;
151
152 ai3x-micbias-vg = <2>;
153
154 AVDD-supply = <&v3v3>;
155 IOVDD-supply = <&v3v3>;
156 DRVDD-supply = <&v3v3>;
157 DVDD-supply = <&v1v8_audio>;
158
159 clocks = <&sai2b>;
160
161 port {
162 #address-cells = <1>;
163 #size-cells = <0>;
164
165 tlv320_tx_endpoint: endpoint@0 {
166 reg = <0>;
167 remote-endpoint = <&sai2b_endpoint>;
168 frame-master;
169 bitclock-master;
170 };
171
172 tlv320_rx_endpoint: endpoint@1 {
173 reg = <1>;
174 remote-endpoint = <&sai2a_endpoint>;
175 frame-master;
176 bitclock-master;
177 };
178 };
179 };
180
181 touch@44 {
182 compatible = "st,stmpe811";
183 reg = <0x44>;
184 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
185 interrupt-parent = <&gpioi>;
186 vio-supply = <&v3v3>;
187 vcc-supply = <&v3v3>;
188
189 touchscreen {
190 compatible = "st,stmpe-ts";
191 st,sample-time = <4>;
192 st,mod-12b = <1>;
193 st,ref-sel = <0>;
194 st,adc-freq = <1>;
195 st,ave-ctrl = <1>;
196 st,touch-det-delay = <2>;
197 st,settling = <2>;
198 st,fraction-z = <7>;
199 st,i-drive = <1>;
200 };
201 };
202
203 leds@62 {
204 compatible = "nxp,pca9533";
205 reg = <0x62>;
206
207 led-0 {
208 color = <LED_COLOR_ID_RED>;
209 function = LED_FUNCTION_POWER;
210 type = <PCA9532_TYPE_LED>;
211 };
212
213 led-1 {
214 color = <LED_COLOR_ID_GREEN>;
215 function = LED_FUNCTION_POWER;
216 type = <PCA9532_TYPE_LED>;
217 };
218
219 led-2 {
220 color = <LED_COLOR_ID_BLUE>;
221 function = LED_FUNCTION_HEARTBEAT;
222 type = <PCA9532_TYPE_LED>;
223 linux,default-trigger = "heartbeat";
224 };
225 };
226 };
227
228 &i2c4 {
229 pinctrl-names = "default", "sleep";
230 pinctrl-0 = <&i2c4_pins_a>;
231 pinctrl-1 = <&i2c4_sleep_pins_a>;
232 i2c-scl-rising-time-ns = <185>;
233 i2c-scl-falling-time-ns = <20>;
234 status = "okay";
235
236 pmic@33 {
237 compatible = "st,stpmic1";
238 reg = <0x33>;
239 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
240 interrupt-controller;
241 #interrupt-cells = <2>;
242
243 regulators {
244 compatible = "st,stpmic1-regulators";
245 buck1-supply = <®ulator_vin>;
246 buck2-supply = <®ulator_vin>;
247 buck3-supply = <®ulator_vin>;
248 buck4-supply = <®ulator_vin>;
249 ldo1-supply = <&v3v3>;
250 ldo2-supply = <&v3v3>;
251 ldo3-supply = <&vdd_ddr>;
252 ldo4-supply = <®ulator_vin>;
253 ldo5-supply = <&v3v3>;
254 ldo6-supply = <&v3v3>;
255 boost-supply = <®ulator_vin>;
256 pwr_sw1-supply = <&bst_out>;
257 pwr_sw2-supply = <&bst_out>;
258
259 vddcore: buck1 {
260 regulator-name = "vddcore";
261 regulator-min-microvolt = <1200000>;
262 regulator-max-microvolt = <1350000>;
263 regulator-always-on;
264 regulator-initial-mode = <0>;
265 };
266
267 vdd_ddr: buck2 {
268 regulator-name = "vdd_ddr";
269 regulator-min-microvolt = <1350000>;
270 regulator-max-microvolt = <1350000>;
271 regulator-always-on;
272 regulator-initial-mode = <0>;
273 };
274
275 vdd: buck3 {
276 regulator-name = "vdd";
277 regulator-min-microvolt = <3300000>;
278 regulator-max-microvolt = <3300000>;
279 regulator-always-on;
280 st,mask-reset;
281 regulator-initial-mode = <0>;
282 };
283
284 v3v3: buck4 {
285 regulator-name = "v3v3";
286 regulator-min-microvolt = <3300000>;
287 regulator-max-microvolt = <3300000>;
288 regulator-always-on;
289 regulator-initial-mode = <0>;
290 };
291
292 v1v8_audio: ldo1 {
293 regulator-name = "v1v8_audio";
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <1800000>;
296 regulator-always-on;
297 interrupts = <IT_CURLIM_LDO1 0>;
298
299 };
300
301 vdd_eth_2v5: ldo2 {
302 regulator-name = "dd_eth_2v5";
303 regulator-min-microvolt = <2500000>;
304 regulator-max-microvolt = <2500000>;
305 regulator-always-on;
306 interrupts = <IT_CURLIM_LDO2 0>;
307
308 };
309
310 vtt_ddr: ldo3 {
311 regulator-name = "vtt_ddr";
312 regulator-min-microvolt = <500000>;
313 regulator-max-microvolt = <750000>;
314 regulator-always-on;
315 regulator-over-current-protection;
316 };
317
318 vdd_usb: ldo4 {
319 regulator-name = "vdd_usb";
320 interrupts = <IT_CURLIM_LDO4 0>;
321 };
322
323 vdda: ldo5 {
324 regulator-name = "vdda";
325 regulator-min-microvolt = <2900000>;
326 regulator-max-microvolt = <2900000>;
327 interrupts = <IT_CURLIM_LDO5 0>;
328 regulator-boot-on;
329 };
330
331 vdd_eth_1v0: ldo6 {
332 regulator-name = "vdd_eth_1v0";
333 regulator-min-microvolt = <1000000>;
334 regulator-max-microvolt = <1000000>;
335 regulator-always-on;
336 interrupts = <IT_CURLIM_LDO6 0>;
337
338 };
339
340 vref_ddr: vref_ddr {
341 regulator-name = "vref_ddr";
342 regulator-always-on;
343 };
344
345 bst_out: boost {
346 regulator-name = "bst_out";
347 interrupts = <IT_OCP_BOOST 0>;
348 };
349
350 vbus_otg: pwr_sw1 {
351 regulator-name = "vbus_otg";
352 interrupts = <IT_OCP_OTG 0>;
353 regulator-active-discharge = <1>;
354 };
355
356 vbus_sw: pwr_sw2 {
357 regulator-name = "vbus_sw";
358 interrupts = <IT_OCP_SWOUT 0>;
359 regulator-active-discharge = <1>;
360 };
361 };
362
363 onkey {
364 compatible = "st,stpmic1-onkey";
365 interrupts = <IT_PONKEY_F 0>,
366 <IT_PONKEY_R 0>;
367 interrupt-names = "onkey-falling",
368 "onkey-rising";
369 power-off-time-sec = <10>;
370 };
371
372 watchdog {
373 compatible = "st,stpmic1-wdt";
374 };
375 };
376
377 i2c4_eeprom: eeprom@50 {
378 compatible = "microchip,24c32",
379 "atmel,24c32";
380 reg = <0x50>;
381 };
382
383 i2c4_rtc: rtc@52 {
384 compatible = "microcrystal,rv3028";
385 reg = <0x52>;
386 };
387 };
388
389 &ipcc {
390 status = "okay";
391 };
392
393 &iwdg2 {
394 timeout-sec = <32>;
395 status = "okay";
396 };
397
398 &m_can2 {
399 pinctrl-names = "default", "sleep";
400 pinctrl-0 = <&m_can2_pins_a>;
401 pinctrl-1 = <&m_can2_sleep_pins_a>;
402 status = "okay";
403 };
404
405 &m4_rproc {
406 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
407 <&vdev0vring1>, <&vdev0buffer>;
408 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
409 mbox-names = "vq0", "vq1", "shutdown", "detach";
410 interrupt-parent = <&exti>;
411 interrupts = <68 1>;
412 status = "okay";
413 };
414
415 &pwr_regulators {
416 vdd-supply = <&vdd>;
417 vdd_3v3_usbfs-supply = <&vdd_usb>;
418 };
419
420 &qspi {
421 pinctrl-names = "default", "sleep";
422 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
423 pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
424 status = "okay";
425
426 flash0: flash@0 {
427 compatible = "winbond,w25q128", "jedec,spi-nor";
428 reg = <0>;
429 spi-rx-bus-width = <4>;
430 spi-max-frequency = <50000000>;
431 m25p,fast-read;
432 #address-cells = <1>;
433 #size-cells = <1>;
434 };
435 };
436
437 &rng1 {
438 status = "okay";
439 };
440
441 &rtc {
442 status = "okay";
443 };
444
445 &sai2 {
446 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
447 clock-names = "pclk", "x8k", "x11k";
448 pinctrl-names = "default", "sleep";
449 pinctrl-0 = <&sai2a_pins_b>, <&sai2b_pins_d>;
450 pinctrl-1 = <&sai2a_sleep_pins_b>, <&sai2b_sleep_pins_d>;
451 status = "okay";
452 };
453
454 &sai2a {
455 dma-names = "rx";
456 st,sync = <&sai2b 2>;
457 clocks = <&rcc SAI2_K>, <&sai2b>;
458 clock-names = "sai_ck", "MCLK";
459 #clock-cells = <0>;
460
461 sai2a_port: port {
462 sai2a_endpoint: endpoint {
463 remote-endpoint = <&tlv320_rx_endpoint>;
464 mclk-fs = <256>;
465 dai-tdm-slot-num = <2>;
466 dai-tdm-slot-width = <16>;
467 };
468 };
469 };
470
471 &sai2b {
472 dma-names = "tx";
473 #clock-cells = <0>;
474
475 sai2b_port: port {
476 sai2b_endpoint: endpoint {
477 remote-endpoint = <&tlv320_tx_endpoint>;
478 mclk-fs = <256>;
479 dai-tdm-slot-num = <2>;
480 dai-tdm-slot-width = <16>;
481 };
482 };
483 };
484
485 &sdmmc1 {
486 pinctrl-names = "default", "opendrain", "sleep";
487 pinctrl-0 = <&sdmmc1_b4_pins_b>;
488 pinctrl-1 = <&sdmmc1_b4_od_pins_b>;
489 pinctrl-2 = <&sdmmc1_b4_sleep_pins_b>;
490 cd-gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
491 disable-wp;
492 st,neg-edge;
493 bus-width = <4>;
494 vmmc-supply = <&v3v3>;
495 status = "okay";
496 };
497
498 &sdmmc2 {
499 pinctrl-names = "default", "opendrain", "sleep";
500 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>;
501 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_e>;
502 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_e>;
503 non-removable;
504 no-sd;
505 no-sdio;
506 st,neg-edge;
507 bus-width = <8>;
508 vmmc-supply = <&v3v3>;
509 vqmmc-supply = <&v3v3>;
510 mmc-ddr-3_3v;
511 };
512
513 &spi1 {
514 pinctrl-names = "default", "sleep";
515 pinctrl-0 = <&spi1_pins_a>;
516 pinctrl-1 = <&spi1_sleep_pins_a>;
517 cs-gpios = <&gpioz 3 0>;
518 status = "okay";
519 };
520
521 &uart4 {
522 pinctrl-names = "default", "sleep", "idle";
523 pinctrl-0 = <&uart4_pins_a>;
524 pinctrl-1 = <&uart4_sleep_pins_a>;
525 pinctrl-2 = <&uart4_idle_pins_a>;
526 pinctrl-3 = <&uart4_pins_a>;
527 /delete-property/dmas;
528 /delete-property/dma-names;
529 status = "okay";
530 };
531
532 &usart1 {
533 pinctrl-names = "default", "sleep", "idle";
534 pinctrl-0 = <&usart1_pins_b &usart1_pins_a>;
535 pinctrl-1 = <&usart1_sleep_pins_b &usart1_sleep_pins_a>;
536 pinctrl-2 = <&usart1_idle_pins_b &usart1_idle_pins_a>;
537 uart-has-rtscts;
538 status = "okay";
539 };
540
541 &usart3 {
542 pinctrl-names = "default", "sleep", "idle";
543 pinctrl-0 = <&usart3_pins_a>;
544 pinctrl-1 = <&usart3_sleep_pins_a>;
545 pinctrl-2 = <&usart3_idle_pins_a>;
546 status = "okay";
547 };
548
549 &usbh_ehci {
550 status = "okay";
551 };
552
553 &usbh_ohci {
554 status = "okay";
555 };
556
557 &usbotg_hs {
558 phys = <&usbphyc_port1 0>;
559 phy-names = "usb2-phy";
560 status = "okay";
561 };
562
563 &usbphyc {
564 status = "okay";
565 };
566
567 &usbphyc_port0 {
568 phy-supply = <&vdd_usb>;
569 };
570
571 &usbphyc_port1 {
572 phy-supply = <&vdd_usb>;
573 };
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