1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Support for CompuLab CM-T3517
4 */
5 /dts-v1/;
6
7 #include "am3517.dtsi"
8 #include "omap3-cm-t3x.dtsi"
9
10 / {
11 model = "CompuLab CM-T3517";
12 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
13
14 vmmc: regulator-vmmc {
15 compatible = "regulator-fixed";
16 regulator-name = "vmmc";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
19 };
20
21 wl12xx_vmmc2: wl12xx_vmmc2 {
22 compatible = "regulator-fixed";
23 regulator-name = "vw1271";
24 pinctrl-names = "default";
25 pinctrl-0 = <
26 &wl12xx_wkup_pins
27 &wl12xx_core_pins
28 >;
29 regulator-min-microvolt = <1800000>;
30 regulator-max-microvolt = <1800000>;
31 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
32 startup-delay-us = <20000>;
33 enable-active-high;
34 };
35
36 wl12xx_vaux2: wl12xx_vaux2 {
37 compatible = "regulator-fixed";
38 regulator-name = "vwl1271_vaux2";
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>;
41 };
42 };
43
44 &omap3_pmx_wkup {
45
46 wl12xx_wkup_pins: wl12xx-wkup-pins {
47 pinctrl-single,pins = <
48 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
49 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
50 >;
51 };
52 };
53
54 &omap3_pmx_core {
55
56 phy1_reset_pins: hsusb1-phy-reset-pins {
57 pinctrl-single,pins = <
58 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
59 >;
60 };
61
62 phy2_reset_pins: hsusb2-phy-reset-pins {
63 pinctrl-single,pins = <
64 OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
65 >;
66 };
67
68 otg_drv_vbus: otg-drv-vbus-pins {
69 pinctrl-single,pins = <
70 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
71 >;
72 };
73
74 mmc2_pins: mmc2-pins {
75 pinctrl-single,pins = <
76 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
77 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
78 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
79 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
80 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
81 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
82 >;
83 };
84
85 wl12xx_core_pins: wl12xx-core-pins {
86 pinctrl-single,pins = <
87 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
88 OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
89 >;
90 };
91
92 usb_hub_pins: usb-hub-pins {
93 pinctrl-single,pins = <
94 OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
95 >;
96 };
97 };
98
99 &hsusb1_phy {
100 pinctrl-names = "default";
101 pinctrl-0 = <&phy1_reset_pins>;
102 reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
103 };
104
105 &hsusb2_phy {
106 pinctrl-names = "default";
107 pinctrl-0 = <&phy2_reset_pins>;
108 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
109 };
110
111 &davinci_emac {
112 status = "okay";
113 };
114
115 &davinci_mdio {
116 status = "okay";
117 };
118
119 &am35x_otg_hs {
120 status = "okay";
121 pinctrl-names = "default";
122 pinctrl-0 = <&otg_drv_vbus>;
123 };
124
125 &mmc1 {
126 vmmc-supply = <&vmmc>;
127 };
128
129 &mmc2 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&mmc2_pins>;
132 vmmc-supply = <&wl12xx_vmmc2>;
133 vqmmc-supply = <&wl12xx_vaux2>;
134 non-removable;
135 bus-width = <4>;
136 cap-power-off-card;
137
138 #address-cells = <1>;
139 #size-cells = <0>;
140 wlcore: wlcore@2 {
141 compatible = "ti,wl1271";
142 reg = <2>;
143 interrupt-parent = <&gpio5>;
144 interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
145 ref-clock-frequency = <38400000>;
146 };
147 };
148
149 &dss {
150 status = "okay";
151
152 pinctrl-names = "default";
153 pinctrl-0 = <
154 &dss_dpi_pins_common
155 &dss_dpi_pins_cm_t35x
156 >;
157 };
158
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