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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/ti/omap/omap3-sniper.dts

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  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
  4  */
  5 /dts-v1/;
  6 
  7 #include "omap36xx.dtsi"
  8 #include <dt-bindings/input/input.h>
  9 
 10 / {
 11         model = "LG Optimus Black";
 12         compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap3";
 13 
 14         cpus {
 15                 cpu@0 {
 16                         cpu0-supply = <&vcc>;
 17                 };
 18         };
 19 
 20         memory@80000000 {
 21                 device_type = "memory";
 22                 reg = <0x80000000 0x20000000>; /* 512 MB */
 23         };
 24 };
 25 
 26 &omap3_pmx_core {
 27         pinctrl-names = "default";
 28 
 29         uart3_pins: uart3-pins {
 30                 pinctrl-single,pins = <
 31                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)        /* uart3_rx_irrx */
 32                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx */
 33                 >;
 34         };
 35 
 36         dp3t_sel_pins: dp3t-sel-pins {
 37                 pinctrl-single,pins = <
 38                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4)       /* gpio_161 */
 39                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* gpio_162 */
 40                 >;
 41         };
 42 
 43         i2c1_pins: i2c1-pins {
 44                 pinctrl-single,pins = <
 45                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl */
 46                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda */
 47                 >;
 48         };
 49 
 50         i2c2_pins: i2c2-pins {
 51                 pinctrl-single,pins = <
 52                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
 53                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
 54                 >;
 55         };
 56 
 57         i2c3_pins: i2c3-pins {
 58                 pinctrl-single,pins = <
 59                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
 60                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
 61                 >;
 62         };
 63 
 64         lp8720_en_pin: lp8720-en-pins {
 65                 pinctrl-single,pins = <
 66                         OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4)       /* gpio_37 */
 67                 >;
 68         };
 69 
 70         mmc1_pins: mmc1-pins {
 71                 pinctrl-single,pins = <
 72                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0)        /* sdmmc1_clk */
 73                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)        /* sdmmc1_cmd */
 74                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat0 */
 75                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat1 */
 76                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat2 */
 77                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat3 */
 78                 >;
 79         };
 80 
 81         mmc2_pins: mmc2-pins {
 82                 pinctrl-single,pins = <
 83                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0)        /* sdmmc2_clk */
 84                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0)        /* sdmmc2_cmd */
 85                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat0 */
 86                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat1 */
 87                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat2 */
 88                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat3 */
 89                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat4 */
 90                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat5 */
 91                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat6 */
 92                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat7 */
 93                 >;
 94         };
 95 
 96         usb_otg_hs_pins: usb-otg-hs-pins {
 97                 pinctrl-single,pins = <
 98                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk */
 99                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp */
100                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir */
101                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt */
102                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0 */
103                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1 */
104                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2 */
105                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3 */
106                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4 */
107                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5 */
108                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6 */
109                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7 */
110                 >;
111         };
112 };
113 
114 &omap3_pmx_wkup {
115         pinctrl-names = "default";
116 
117         mmc1_cd_pin: mmc1-cd-pins {
118                 pinctrl-single,pins = <
119                         OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4)         /* gpio_10 */
120                 >;
121         };
122 };
123 
124 &gpio2 {
125         ti,no-reset-on-init;
126 };
127 
128 &gpio5 {
129         ti,no-reset-on-init;
130 };
131 
132 &gpio6 {
133         ti,no-reset-on-init;
134 };
135 
136 &uart3 {
137         pinctrl-names = "default";
138         pinctrl-0 = <&uart3_pins &dp3t_sel_pins>;
139 
140         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
141 };
142 
143 &i2c1 {
144         pinctrl-names = "default";
145         pinctrl-0 = <&i2c1_pins>;
146 
147         clock-frequency = <2600000>;
148 
149         twl: twl@48 {
150                 reg = <0x48>;
151                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
152                 interrupt-parent = <&intc>;
153 
154                 power {
155                         compatible = "ti,twl4030-power";
156                         ti,use_poweroff;
157                 };
158         };
159 };
160 
161 &i2c2 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&i2c2_pins>;
164 
165         clock-frequency = <400000>;
166 };
167 
168 &i2c3 {
169         pinctrl-names = "default";
170         pinctrl-0 = <&i2c3_pins>;
171 
172         clock-frequency = <400000>;
173 
174         lp8720@7d {
175                 pinctrl-names = "default";
176                 pinctrl-0 = <&lp8720_en_pin>;
177 
178                 compatible = "ti,lp8720";
179                 reg = <0x7d>;
180 
181                 enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */
182 
183                 lp8720_ldo1: ldo1 {
184                         regulator-min-microvolt = <3000000>;
185                         regulator-max-microvolt = <3000000>;
186                 };
187         };
188 };
189 
190 &mmc1 {
191         pinctrl-names = "default";
192         pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>;
193 
194         vmmc-supply = <&lp8720_ldo1>;
195         cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */
196         bus-width = <4>;
197 };
198 
199 &mmc2 {
200         pinctrl-names = "default";
201         pinctrl-0 = <&mmc2_pins>;
202 
203         vmmc-supply = <&vmmc2>;
204         ti,non-removable;
205         bus-width = <8>;
206 };
207 
208 &mmc3 {
209         status = "disabled";
210 };
211 
212 &usb_otg_hs {
213         pinctrl-names = "default";
214         pinctrl-0 = <&usb_otg_hs_pins>;
215 
216         interface-type = <0>;
217         usb-phy = <&usb2_phy>;
218         phys = <&usb2_phy>;
219         phy-names = "usb2-phy";
220         mode = <3>;
221         power = <50>;
222 };
223 
224 #include "twl4030.dtsi"
225 #include "twl4030_omap3.dtsi"
226 
227 &twl_keypad {
228         linux,keymap = <
229                 MATRIX_KEY(0x00, 0x00, KEY_VOLUMEUP)
230                 MATRIX_KEY(0x01, 0x00, KEY_VOLUMEDOWN)
231                 MATRIX_KEY(0x02, 0x00, KEY_SELECT)
232         >;
233 };
234 
235 /*
236  * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3.
237  * When not powered, these sensors cause the I2C3 clock to stay low at all times,
238  * making it impossible to reach other devices on I2C3.
239  */
240 
241 &vaux2 {
242         regulator-min-microvolt = <2800000>;
243         regulator-max-microvolt = <2800000>;
244         regulator-always-on;
245 };
246 
247 &vdac {
248         regulator-min-microvolt = <1800000>;
249         regulator-max-microvolt = <1800000>;
250         regulator-always-on;
251 };

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