1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* IRQ definitions for Marvell Dove 88AP510 SoC */ 3 4 #ifndef __ASM_ARCH_IRQS_H 5 #define __ASM_ARCH_IRQS_H 6 7 /* 8 * Dove Low Interrupt Controller 9 */ 10 #define IRQ_DOVE_BRIDGE (1 + 0) 11 #define IRQ_DOVE_H2C (1 + 1) 12 #define IRQ_DOVE_C2H (1 + 2) 13 #define IRQ_DOVE_NAND (1 + 3) 14 #define IRQ_DOVE_PDMA (1 + 4) 15 #define IRQ_DOVE_SPI1 (1 + 5) 16 #define IRQ_DOVE_SPI0 (1 + 6) 17 #define IRQ_DOVE_UART_0 (1 + 7) 18 #define IRQ_DOVE_UART_1 (1 + 8) 19 #define IRQ_DOVE_UART_2 (1 + 9) 20 #define IRQ_DOVE_UART_3 (1 + 10) 21 #define IRQ_DOVE_I2C (1 + 11) 22 #define IRQ_DOVE_GPIO_0_7 (1 + 12) 23 #define IRQ_DOVE_GPIO_8_15 (1 + 13) 24 #define IRQ_DOVE_GPIO_16_23 (1 + 14) 25 #define IRQ_DOVE_PCIE0_ERR (1 + 15) 26 #define IRQ_DOVE_PCIE0 (1 + 16) 27 #define IRQ_DOVE_PCIE1_ERR (1 + 17) 28 #define IRQ_DOVE_PCIE1 (1 + 18) 29 #define IRQ_DOVE_I2S0 (1 + 19) 30 #define IRQ_DOVE_I2S0_ERR (1 + 20) 31 #define IRQ_DOVE_I2S1 (1 + 21) 32 #define IRQ_DOVE_I2S1_ERR (1 + 22) 33 #define IRQ_DOVE_USB_ERR (1 + 23) 34 #define IRQ_DOVE_USB0 (1 + 24) 35 #define IRQ_DOVE_USB1 (1 + 25) 36 #define IRQ_DOVE_GE00_RX (1 + 26) 37 #define IRQ_DOVE_GE00_TX (1 + 27) 38 #define IRQ_DOVE_GE00_MISC (1 + 28) 39 #define IRQ_DOVE_GE00_SUM (1 + 29) 40 #define IRQ_DOVE_GE00_ERR (1 + 30) 41 #define IRQ_DOVE_CRYPTO (1 + 31) 42 43 /* 44 * Dove High Interrupt Controller 45 */ 46 #define IRQ_DOVE_AC97 (1 + 32) 47 #define IRQ_DOVE_PMU (1 + 33) 48 #define IRQ_DOVE_CAM (1 + 34) 49 #define IRQ_DOVE_SDIO0 (1 + 35) 50 #define IRQ_DOVE_SDIO1 (1 + 36) 51 #define IRQ_DOVE_SDIO0_WAKEUP (1 + 37) 52 #define IRQ_DOVE_SDIO1_WAKEUP (1 + 38) 53 #define IRQ_DOVE_XOR_00 (1 + 39) 54 #define IRQ_DOVE_XOR_01 (1 + 40) 55 #define IRQ_DOVE_XOR0_ERR (1 + 41) 56 #define IRQ_DOVE_XOR_10 (1 + 42) 57 #define IRQ_DOVE_XOR_11 (1 + 43) 58 #define IRQ_DOVE_XOR1_ERR (1 + 44) 59 #define IRQ_DOVE_LCD_DCON (1 + 45) 60 #define IRQ_DOVE_LCD1 (1 + 46) 61 #define IRQ_DOVE_LCD0 (1 + 47) 62 #define IRQ_DOVE_GPU (1 + 48) 63 #define IRQ_DOVE_PERFORM_MNTR (1 + 49) 64 #define IRQ_DOVE_VPRO_DMA1 (1 + 51) 65 #define IRQ_DOVE_SSP_TIMER (1 + 54) 66 #define IRQ_DOVE_SSP (1 + 55) 67 #define IRQ_DOVE_MC_L2_ERR (1 + 56) 68 #define IRQ_DOVE_CRYPTO_ERR (1 + 59) 69 #define IRQ_DOVE_GPIO_24_31 (1 + 60) 70 #define IRQ_DOVE_HIGH_GPIO (1 + 61) 71 #define IRQ_DOVE_SATA (1 + 62) 72 73 /* 74 * DOVE General Purpose Pins 75 */ 76 #define IRQ_DOVE_GPIO_START 65 77 #define NR_GPIO_IRQS 64 78 79 /* 80 * PMU interrupts 81 */ 82 #define IRQ_DOVE_PMU_START (IRQ_DOVE_GPIO_START + NR_GPIO_IRQS) 83 #define NR_PMU_IRQS 7 84 #define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5) 85 86 #define DOVE_NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) 87 88 89 #endif 90
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