1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/err.h>
3 #include <linux/module.h>
4 #include <linux/io.h>
5 #include <linux/of.h>
6 #include <linux/of_address.h>
7
8 #include "hardware.h"
9 #include "common.h"
10
11 unsigned int __mxc_cpu_type;
12 static unsigned int imx_soc_revision;
13
14 void mxc_set_cpu_type(unsigned int type)
15 {
16 __mxc_cpu_type = type;
17 }
18
19 void imx_set_soc_revision(unsigned int rev)
20 {
21 imx_soc_revision = rev;
22 }
23
24 unsigned int imx_get_soc_revision(void)
25 {
26 return imx_soc_revision;
27 }
28
29 void imx_print_silicon_rev(const char *cpu, int srev)
30 {
31 if (srev == IMX_CHIP_REVISION_UNKNOWN)
32 pr_info("CPU identified as %s, unknown revision\n", cpu);
33 else
34 pr_info("CPU identified as %s, silicon rev %d.%d\n",
35 cpu, (srev >> 4) & 0xf, srev & 0xf);
36 }
37
38 void __init imx_set_aips(void __iomem *base)
39 {
40 unsigned int reg;
41 /*
42 * Set all MPROTx to be non-bufferable, trusted for R/W,
43 * not forced to user-mode.
44 */
45 imx_writel(0x77777777, base + 0x0);
46 imx_writel(0x77777777, base + 0x4);
47
48 /*
49 * Set all OPACRx to be non-bufferable, to not require
50 * supervisor privilege level for access, allow for
51 * write access and untrusted master access.
52 */
53 imx_writel(0x0, base + 0x40);
54 imx_writel(0x0, base + 0x44);
55 imx_writel(0x0, base + 0x48);
56 imx_writel(0x0, base + 0x4C);
57 reg = imx_readl(base + 0x50) & 0x00FFFFFF;
58 imx_writel(reg, base + 0x50);
59 }
60
61 void __init imx_aips_allow_unprivileged_access(
62 const char *compat)
63 {
64 void __iomem *aips_base_addr;
65 struct device_node *np;
66
67 for_each_compatible_node(np, NULL, compat) {
68 aips_base_addr = of_iomap(np, 0);
69 WARN_ON(!aips_base_addr);
70 imx_set_aips(aips_base_addr);
71 }
72 }
73
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