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TOMOYO Linux Cross Reference
Linux/arch/arm/mach-omap1/mux.h

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  1 /* SPDX-License-Identifier: GPL-2.0-or-later */
  2 /*
  3  * Table of the Omap register configurations for the FUNC_MUX and
  4  * PULL_DWN combinations.
  5  *
  6  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
  7  * Copyright (C) 2003 - 2008 Nokia Corporation
  8  *
  9  * Written by Tony Lindgren
 10  *
 11  * NOTE: Please use the following naming style for new pin entries.
 12  *       For example, W8_1610_MMC2_DAT0, where:
 13  *       - W8        = ball
 14  *       - 1610      = 1510 or 1610, none if common for both 1510 and 1610
 15  *       - MMC2_DAT0 = function
 16  */
 17 
 18 #ifndef __ASM_ARCH_MUX_H
 19 #define __ASM_ARCH_MUX_H
 20 
 21 #include <linux/soc/ti/omap1-mux.h>
 22 
 23 #define PU_PD_SEL_NA            0       /* No pu_pd reg available */
 24 #define PULL_DWN_CTRL_NA        0       /* No pull-down control needed */
 25 
 26 #ifdef  CONFIG_OMAP_MUX_DEBUG
 27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
 28                                         .mux_reg = FUNC_MUX_CTRL_##reg, \
 29                                         .mask_offset = mode_offset, \
 30                                         .mask = mode,
 31 
 32 #define PULL_REG(reg, bit, status)      .pull_name = "PULL_DWN_CTRL_"#reg, \
 33                                         .pull_reg = PULL_DWN_CTRL_##reg, \
 34                                         .pull_bit = bit, \
 35                                         .pull_val = status,
 36 
 37 #define PU_PD_REG(reg, status)          .pu_pd_name = "PU_PD_SEL_"#reg, \
 38                                         .pu_pd_reg = PU_PD_SEL_##reg, \
 39                                         .pu_pd_val = status,
 40 
 41 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
 42                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
 43                                         .mask_offset = mode_offset, \
 44                                         .mask = mode,
 45 
 46 #define PULL_REG_7XX(reg, bit, status)  .pull_name = "OMAP7XX_IO_CONF_"#reg, \
 47                                         .pull_reg = OMAP7XX_IO_CONF_##reg, \
 48                                         .pull_bit = bit, \
 49                                         .pull_val = status,
 50 
 51 #else
 52 
 53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
 54                                         .mask_offset = mode_offset, \
 55                                         .mask = mode,
 56 
 57 #define PULL_REG(reg, bit, status)      .pull_reg = PULL_DWN_CTRL_##reg, \
 58                                         .pull_bit = bit, \
 59                                         .pull_val = status,
 60 
 61 #define PU_PD_REG(reg, status)          .pu_pd_reg = PU_PD_SEL_##reg, \
 62                                         .pu_pd_val = status,
 63 
 64 #define MUX_REG_7XX(reg, mode_offset, mode) \
 65                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
 66                                         .mask_offset = mode_offset, \
 67                                         .mask = mode,
 68 
 69 #define PULL_REG_7XX(reg, bit, status)  .pull_reg = OMAP7XX_IO_CONF_##reg, \
 70                                         .pull_bit = bit, \
 71                                         .pull_val = status,
 72 
 73 #endif /* CONFIG_OMAP_MUX_DEBUG */
 74 
 75 #define MUX_CFG(desc, mux_reg, mode_offset, mode,       \
 76                 pull_reg, pull_bit, pull_status,        \
 77                 pu_pd_reg, pu_pd_status, debug_status)  \
 78 {                                                       \
 79         .name =  desc,                                  \
 80         .debug = debug_status,                          \
 81         MUX_REG(mux_reg, mode_offset, mode)             \
 82         PULL_REG(pull_reg, pull_bit, pull_status)       \
 83         PU_PD_REG(pu_pd_reg, pu_pd_status)              \
 84 },
 85 
 86 
 87 /*
 88  * OMAP730/850 has a slightly different config for the pin mux.
 89  * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
 90  *   not the FUNC_MUX_CTRL_x regs from hardware.h
 91  * - for pull-up/down, only has one enable bit which is in the same register
 92  *   as mux config
 93  */
 94 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode,   \
 95                    pull_bit, pull_status, debug_status)\
 96 {                                                       \
 97         .name =  desc,                                  \
 98         .debug = debug_status,                          \
 99         MUX_REG_7XX(mux_reg, mode_offset, mode)         \
100         PULL_REG_7XX(mux_reg, pull_bit, pull_status)    \
101         PU_PD_REG(NA, 0)                \
102 },
103 
104 struct pin_config {
105         char                    *name;
106         const unsigned int      mux_reg;
107         unsigned char           debug;
108 
109         const unsigned char mask_offset;
110         const unsigned char mask;
111 
112         const char *pull_name;
113         const unsigned int pull_reg;
114         const unsigned char pull_val;
115         const unsigned char pull_bit;
116 
117         const char *pu_pd_name;
118         const unsigned int pu_pd_reg;
119         const unsigned char pu_pd_val;
120 
121 #if     defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
122         const char *mux_reg_name;
123 #endif
124 
125 };
126 
127 struct omap_mux_cfg {
128         struct pin_config       *pins;
129         unsigned long           size;
130         int                     (*cfg_reg)(const struct pin_config *cfg);
131 };
132 
133 #ifdef  CONFIG_OMAP_MUX
134 /* setup pin muxing in Linux */
135 extern int omap1_mux_init(void);
136 extern int omap_mux_register(struct omap_mux_cfg *);
137 #else
138 /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
139 static inline int omap1_mux_init(void) { return 0; }
140 #endif
141 
142 extern int omap2_mux_init(void);
143 
144 #endif
145 

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