1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Orion CPU Bridge Registers */ 3 4 #ifndef __ASM_ARCH_BRIDGE_REGS_H 5 #define __ASM_ARCH_BRIDGE_REGS_H 6 7 #include "orion5x.h" 8 9 #define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) 10 11 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) 12 13 #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) 14 #define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) 15 16 #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) 17 18 #define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) 19 20 #define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) 21 22 #define BRIDGE_INT_TIMER1_CLR (~0x0004) 23 24 #define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) 25 26 #define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) 27 28 #define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300) 29 #define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300) 30 #endif 31
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