~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/arch/arm/mach-rockchip/sleep.S

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*
  3  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  4  * Author: Tony Xie <tony.xie@rock-chips.com>
  5  */
  6 
  7 #include <linux/linkage.h>
  8 #include <asm/assembler.h>
  9 #include <asm/page.h>
 10 
 11 .data
 12 /*
 13  * this code will be copied from
 14  * ddr to sram for system resumeing.
 15  * so it is ".data section".
 16  */
 17         .align  2
 18 
 19 ENTRY(rockchip_slp_cpu_resume)
 20         setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set svc, irqs off
 21         mrc     p15, 0, r1, c0, c0, 5
 22         and     r1, r1, #0xf
 23         cmp     r1, #0
 24         /* olny cpu0 can continue to run, the others is halt here */
 25         beq     cpu0run
 26 secondary_loop:
 27         wfe
 28         b       secondary_loop
 29 cpu0run:
 30         ldr     r3, rkpm_bootdata_l2ctlr_f
 31         cmp     r3, #0
 32         beq     sp_set
 33         ldr     r3, rkpm_bootdata_l2ctlr
 34         mcr     p15, 1, r3, c9, c0, 2
 35 sp_set:
 36         ldr     sp, rkpm_bootdata_cpusp
 37         ldr     r1, rkpm_bootdata_cpu_code
 38         bx      r1
 39 ENDPROC(rockchip_slp_cpu_resume)
 40 
 41 /* Parameters filled in by the kernel */
 42 
 43 /* Flag for whether to restore L2CTLR on resume */
 44         .global rkpm_bootdata_l2ctlr_f
 45 rkpm_bootdata_l2ctlr_f:
 46         .long 0
 47 
 48 /* Saved L2CTLR to restore on resume */
 49         .global rkpm_bootdata_l2ctlr
 50 rkpm_bootdata_l2ctlr:
 51         .long 0
 52 
 53 /* CPU resume SP addr */
 54         .globl rkpm_bootdata_cpusp
 55 rkpm_bootdata_cpusp:
 56         .long 0
 57 
 58 /* CPU resume function (physical address) */
 59         .globl rkpm_bootdata_cpu_code
 60 rkpm_bootdata_cpu_code:
 61         .long 0
 62 
 63 ENTRY(rk3288_bootram_sz)
 64         .word   . - rockchip_slp_cpu_resume

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php