1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/arch/arm/mm/arm740.S: utility functions for ARM740 4 * 5 * Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com) 6 */ 7 #include <linux/linkage.h> 8 #include <linux/init.h> 9 #include <linux/cfi_types.h> 10 #include <linux/pgtable.h> 11 #include <asm/assembler.h> 12 #include <asm/asm-offsets.h> 13 #include <asm/hwcap.h> 14 #include <asm/pgtable-hwdef.h> 15 #include <asm/ptrace.h> 16 17 #include "proc-macros.S" 18 19 .text 20 /* 21 * cpu_arm740_proc_init() 22 * cpu_arm740_do_idle() 23 * cpu_arm740_dcache_clean_area() 24 * cpu_arm740_switch_mm() 25 * 26 * These are not required. 27 */ 28 SYM_TYPED_FUNC_START(cpu_arm740_proc_init) 29 ret lr 30 SYM_FUNC_END(cpu_arm740_proc_init) 31 32 SYM_TYPED_FUNC_START(cpu_arm740_do_idle) 33 ret lr 34 SYM_FUNC_END(cpu_arm740_do_idle) 35 36 SYM_TYPED_FUNC_START(cpu_arm740_dcache_clean_area) 37 ret lr 38 SYM_FUNC_END(cpu_arm740_dcache_clean_area) 39 40 SYM_TYPED_FUNC_START(cpu_arm740_switch_mm) 41 ret lr 42 SYM_FUNC_END(cpu_arm740_switch_mm) 43 44 /* 45 * cpu_arm740_proc_fin() 46 */ 47 SYM_TYPED_FUNC_START(cpu_arm740_proc_fin) 48 mrc p15, 0, r0, c1, c0, 0 49 bic r0, r0, #0x3f000000 @ bank/f/lock/s 50 bic r0, r0, #0x0000000c @ w-buffer/cache 51 mcr p15, 0, r0, c1, c0, 0 @ disable caches 52 ret lr 53 SYM_FUNC_END(cpu_arm740_proc_fin) 54 55 /* 56 * cpu_arm740_reset(loc) 57 * Params : r0 = address to jump to 58 * Notes : This sets up everything for a reset 59 */ 60 .pushsection .idmap.text, "ax" 61 SYM_TYPED_FUNC_START(cpu_arm740_reset) 62 mov ip, #0 63 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache 64 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 65 bic ip, ip, #0x0000000c @ ............wc.. 66 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 67 ret r0 68 SYM_FUNC_END(cpu_arm740_reset) 69 .popsection 70 71 .type __arm740_setup, #function 72 __arm740_setup: 73 mov r0, #0 74 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches 75 76 mcr p15, 0, r0, c6, c3 @ disable area 3~7 77 mcr p15, 0, r0, c6, c4 78 mcr p15, 0, r0, c6, c5 79 mcr p15, 0, r0, c6, c6 80 mcr p15, 0, r0, c6, c7 81 82 mov r0, #0x0000003F @ base = 0, size = 4GB 83 mcr p15, 0, r0, c6, c0 @ set area 0, default 84 85 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM 86 ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) 87 mov r4, #10 @ 11 is the minimum (4KB) 88 1: add r4, r4, #1 @ area size *= 2 89 movs r3, r3, lsr #1 90 bne 1b @ count not zero r-shift 91 orr r0, r0, r4, lsl #1 @ the area register value 92 orr r0, r0, #1 @ set enable bit 93 mcr p15, 0, r0, c6, c1 @ set area 1, RAM 94 95 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH 96 ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB) 97 cmp r3, #0 98 moveq r0, #0 99 beq 2f 100 mov r4, #10 @ 11 is the minimum (4KB) 101 1: add r4, r4, #1 @ area size *= 2 102 movs r3, r3, lsr #1 103 bne 1b @ count not zero r-shift 104 orr r0, r0, r4, lsl #1 @ the area register value 105 orr r0, r0, #1 @ set enable bit 106 2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH 107 108 mov r0, #0x06 109 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable 110 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 111 mov r0, #0x00 @ disable whole write buffer 112 #else 113 mov r0, #0x02 @ Region 1 write bufferred 114 #endif 115 mcr p15, 0, r0, c3, c0 116 117 mov r0, #0x10000 118 sub r0, r0, #1 @ r0 = 0xffff 119 mcr p15, 0, r0, c5, c0 @ all read/write access 120 121 mrc p15, 0, r0, c1, c0 @ get control register 122 bic r0, r0, #0x3F000000 @ set to standard caching mode 123 @ need some benchmark 124 orr r0, r0, #0x0000000d @ MPU/Cache/WB 125 126 ret lr 127 128 .size __arm740_setup, . - __arm740_setup 129 130 __INITDATA 131 132 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S) 133 define_processor_functions arm740, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1 134 135 .section ".rodata" 136 137 string cpu_arch_name, "armv4" 138 string cpu_elf_name, "v4" 139 string cpu_arm740_name, "ARM740T" 140 141 .align 142 143 .section ".proc.info.init", "a" 144 .type __arm740_proc_info,#object 145 __arm740_proc_info: 146 .long 0x41807400 147 .long 0xfffffff0 148 .long 0 149 .long 0 150 initfn __arm740_setup, __arm740_proc_info 151 .long cpu_arch_name 152 .long cpu_elf_name 153 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT 154 .long cpu_arm740_name 155 .long arm740_processor_functions 156 .long 0 157 .long 0 158 .long v4_cache_fns @ cache model 159 .size __arm740_proc_info, . - __arm740_proc_info
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