1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/arch/arm/mm/tlbv4wbi.S 4 * 5 * Copyright (C) 1997-2002 Russell King 6 * 7 * ARM architecture version 4 and version 5 TLB handling functions. 8 * These assume a split I/D TLBs, with a write buffer. 9 * 10 * Processors: ARM920 ARM922 ARM925 ARM926 XScale 11 */ 12 #include <linux/linkage.h> 13 #include <linux/init.h> 14 #include <linux/cfi_types.h> 15 #include <asm/assembler.h> 16 #include <asm/asm-offsets.h> 17 #include <asm/tlbflush.h> 18 #include "proc-macros.S" 19 20 /* 21 * v4wb_flush_user_tlb_range(start, end, mm) 22 * 23 * Invalidate a range of TLB entries in the specified address space. 24 * 25 * - start - range start address 26 * - end - range end address 27 * - mm - mm_struct describing address space 28 */ 29 .align 5 30 SYM_TYPED_FUNC_START(v4wbi_flush_user_tlb_range) 31 vma_vm_mm ip, r2 32 act_mm r3 @ get current->active_mm 33 eors r3, ip, r3 @ == mm ? 34 retne lr @ no, we dont do anything 35 mov r3, #0 36 mcr p15, 0, r3, c7, c10, 4 @ drain WB 37 vma_vm_flags r2, r2 38 bic r0, r0, #0x0ff 39 bic r0, r0, #0xf00 40 1: tst r2, #VM_EXEC 41 mcrne p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry 42 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 43 add r0, r0, #PAGE_SZ 44 cmp r0, r1 45 blo 1b 46 ret lr 47 SYM_FUNC_END(v4wbi_flush_user_tlb_range) 48 49 SYM_TYPED_FUNC_START(v4wbi_flush_kern_tlb_range) 50 mov r3, #0 51 mcr p15, 0, r3, c7, c10, 4 @ drain WB 52 bic r0, r0, #0x0ff 53 bic r0, r0, #0xf00 54 1: mcr p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry 55 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 56 add r0, r0, #PAGE_SZ 57 cmp r0, r1 58 blo 1b 59 ret lr 60 SYM_FUNC_END(v4wbi_flush_kern_tlb_range)
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