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TOMOYO Linux Cross Reference
Linux/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts

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  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 /*
  3  * Copyright (c) 2018 BayLibre SAS. All rights reserved.
  4  */
  5 
  6 /dts-v1/;
  7 
  8 #include "meson-g12a.dtsi"
  9 #include <dt-bindings/gpio/gpio.h>
 10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
 12 
 13 / {
 14         compatible = "amediatech,x96-max", "amlogic,g12a";
 15         model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
 16 
 17         aliases {
 18                 serial0 = &uart_AO;
 19                 ethernet0 = &ethmac;
 20         };
 21 
 22         spdif_dit: audio-codec-1 {
 23                 #sound-dai-cells = <0>;
 24                 compatible = "linux,spdif-dit";
 25                 sound-name-prefix = "DIT";
 26         };
 27 
 28         chosen {
 29                 stdout-path = "serial0:115200n8";
 30         };
 31         memory@0 {
 32                 device_type = "memory";
 33                 reg = <0x0 0x0 0x0 0x40000000>;
 34         };
 35 
 36         cvbs-connector {
 37                 compatible = "composite-video-connector";
 38 
 39                 port {
 40                         cvbs_connector_in: endpoint {
 41                                 remote-endpoint = <&cvbs_vdac_out>;
 42                         };
 43                 };
 44         };
 45 
 46         hdmi-connector {
 47                 compatible = "hdmi-connector";
 48                 type = "a";
 49 
 50                 port {
 51                         hdmi_connector_in: endpoint {
 52                                 remote-endpoint = <&hdmi_tx_tmds_out>;
 53                         };
 54                 };
 55         };
 56 
 57         emmc_pwrseq: emmc-pwrseq {
 58                 compatible = "mmc-pwrseq-emmc";
 59                 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
 60         };
 61 
 62         sdio_pwrseq: sdio-pwrseq {
 63                 compatible = "mmc-pwrseq-simple";
 64                 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
 65                 clocks = <&wifi32k>;
 66                 clock-names = "ext_clock";
 67         };
 68 
 69         flash_1v8: regulator-flash-1v8 {
 70                 compatible = "regulator-fixed";
 71                 regulator-name = "FLASH_1V8";
 72                 regulator-min-microvolt = <1800000>;
 73                 regulator-max-microvolt = <1800000>;
 74                 vin-supply = <&vcc_3v3>;
 75                 regulator-always-on;
 76         };
 77 
 78         dc_in: regulator-dc-in {
 79                 compatible = "regulator-fixed";
 80                 regulator-name = "DC_IN";
 81                 regulator-min-microvolt = <5000000>;
 82                 regulator-max-microvolt = <5000000>;
 83                 regulator-always-on;
 84         };
 85 
 86         vcc_1v8: regulator-vcc-1v8 {
 87                 compatible = "regulator-fixed";
 88                 regulator-name = "VCC_1V8";
 89                 regulator-min-microvolt = <1800000>;
 90                 regulator-max-microvolt = <1800000>;
 91                 vin-supply = <&vcc_3v3>;
 92                 regulator-always-on;
 93         };
 94 
 95         vcc_3v3: regulator-vcc-3v3 {
 96                 compatible = "regulator-fixed";
 97                 regulator-name = "VCC_3V3";
 98                 regulator-min-microvolt = <3300000>;
 99                 regulator-max-microvolt = <3300000>;
100                 vin-supply = <&vddao_3v3>;
101                 regulator-always-on;
102                 /* FIXME: actually controlled by VDDCPU_B_EN */
103         };
104 
105         vcc_5v: regulator-vcc-5v {
106                 compatible = "regulator-fixed";
107                 regulator-name = "VCC_5V";
108                 regulator-min-microvolt = <5000000>;
109                 regulator-max-microvolt = <5000000>;
110                 vin-supply = <&dc_in>;
111 
112                 gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
113         };
114 
115         vddao_1v8: regulator-vddao-1v8 {
116                 compatible = "regulator-fixed";
117                 regulator-name = "VDDAO_1V8";
118                 regulator-min-microvolt = <1800000>;
119                 regulator-max-microvolt = <1800000>;
120                 vin-supply = <&vddao_3v3>;
121                 regulator-always-on;
122         };
123 
124         vddao_3v3: regulator-vddao-3v3 {
125                 compatible = "regulator-fixed";
126                 regulator-name = "VDDAO_3V3";
127                 regulator-min-microvolt = <3300000>;
128                 regulator-max-microvolt = <3300000>;
129                 vin-supply = <&dc_in>;
130                 regulator-always-on;
131         };
132 
133         vddcpu: regulator-vddcpu {
134                 compatible = "pwm-regulator";
135 
136                 regulator-name = "VDDCPU";
137                 regulator-min-microvolt = <721000>;
138                 regulator-max-microvolt = <1022000>;
139 
140                 pwm-supply = <&dc_in>;
141 
142                 pwms = <&pwm_AO_cd 1 1250 0>;
143                 pwm-dutycycle-range = <100 0>;
144 
145                 regulator-boot-on;
146                 regulator-always-on;
147         };
148 
149         sound {
150                 compatible = "amlogic,axg-sound-card";
151                 model = "X96-MAX";
152                 audio-aux-devs = <&tdmout_b>;
153                 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
154                                 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
155                                 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
156                                 "TDM_B Playback", "TDMOUT_B OUT",
157                                 "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
158                                 "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
159                                 "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
160 
161                 assigned-clocks = <&clkc CLKID_MPLL2>,
162                                   <&clkc CLKID_MPLL0>,
163                                   <&clkc CLKID_MPLL1>;
164                 assigned-clock-parents = <0>, <0>, <0>;
165                 assigned-clock-rates = <294912000>,
166                                        <270950400>,
167                                        <393216000>;
168 
169                 dai-link-0 {
170                         sound-dai = <&frddr_a>;
171                 };
172 
173                 dai-link-1 {
174                         sound-dai = <&frddr_b>;
175                 };
176 
177                 dai-link-2 {
178                         sound-dai = <&frddr_c>;
179                 };
180 
181                 /* 8ch hdmi interface */
182                 dai-link-3 {
183                         sound-dai = <&tdmif_b>;
184                         dai-format = "i2s";
185                         dai-tdm-slot-tx-mask-0 = <1 1>;
186                         dai-tdm-slot-tx-mask-1 = <1 1>;
187                         dai-tdm-slot-tx-mask-2 = <1 1>;
188                         dai-tdm-slot-tx-mask-3 = <1 1>;
189                         mclk-fs = <256>;
190 
191                         codec {
192                                 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
193                         };
194                 };
195 
196                 /* spdif hdmi or toslink interface */
197                 dai-link-4 {
198                         sound-dai = <&spdifout_a>;
199 
200                         codec-0 {
201                                 sound-dai = <&spdif_dit>;
202                         };
203 
204                         codec-1 {
205                                 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
206                         };
207                 };
208 
209                 /* spdif hdmi interface */
210                 dai-link-5 {
211                         sound-dai = <&spdifout_b>;
212 
213                         codec {
214                                 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
215                         };
216                 };
217 
218                 /* hdmi glue */
219                 dai-link-6 {
220                         sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
221 
222                         codec {
223                                 sound-dai = <&hdmi_tx>;
224                         };
225                 };
226         };
227 
228         wifi32k: wifi32k {
229                 compatible = "pwm-clock";
230                 #clock-cells = <0>;
231                 clock-frequency = <32768>;
232                 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
233         };
234 };
235 
236 &arb {
237         status = "okay";
238 };
239 
240 &cec_AO {
241         pinctrl-0 = <&cec_ao_a_h_pins>;
242         pinctrl-names = "default";
243         status = "disabled";
244         hdmi-phandle = <&hdmi_tx>;
245 };
246 
247 &cecb_AO {
248         pinctrl-0 = <&cec_ao_b_h_pins>;
249         pinctrl-names = "default";
250         status = "okay";
251         hdmi-phandle = <&hdmi_tx>;
252 };
253 
254 &clkc_audio {
255         status = "okay";
256 };
257 
258 &cpu0 {
259         cpu-supply = <&vddcpu>;
260         operating-points-v2 = <&cpu_opp_table>;
261         clocks = <&clkc CLKID_CPU_CLK>;
262         clock-latency = <50000>;
263 };
264 
265 &cpu1 {
266         cpu-supply = <&vddcpu>;
267         operating-points-v2 = <&cpu_opp_table>;
268         clocks = <&clkc CLKID_CPU_CLK>;
269         clock-latency = <50000>;
270 };
271 
272 &cpu2 {
273         cpu-supply = <&vddcpu>;
274         operating-points-v2 = <&cpu_opp_table>;
275         clocks = <&clkc CLKID_CPU_CLK>;
276         clock-latency = <50000>;
277 };
278 
279 &cpu3 {
280         cpu-supply = <&vddcpu>;
281         operating-points-v2 = <&cpu_opp_table>;
282         clocks = <&clkc CLKID_CPU_CLK>;
283         clock-latency = <50000>;
284 };
285 
286 &cvbs_vdac_port {
287         cvbs_vdac_out: endpoint {
288                 remote-endpoint = <&cvbs_connector_in>;
289         };
290 };
291 
292 &frddr_a {
293         status = "okay";
294 };
295 
296 &frddr_b {
297         status = "okay";
298 };
299 
300 &frddr_c {
301         status = "okay";
302 };
303 
304 &hdmi_tx {
305         status = "okay";
306         pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
307         pinctrl-names = "default";
308         hdmi-supply = <&vcc_5v>;
309 };
310 
311 &hdmi_tx_tmds_port {
312         hdmi_tx_tmds_out: endpoint {
313                 remote-endpoint = <&hdmi_connector_in>;
314         };
315 };
316 
317 &ir {
318         status = "okay";
319         pinctrl-0 = <&remote_input_ao_pins>;
320         pinctrl-names = "default";
321         linux,rc-map-name = "rc-x96max";
322 };
323 
324 &pwm_AO_cd {
325         pinctrl-0 = <&pwm_ao_d_e_pins>;
326         pinctrl-names = "default";
327         clocks = <&xtal>;
328         clock-names = "clkin1";
329         status = "okay";
330 };
331 
332 &ext_mdio {
333         external_phy: ethernet-phy@0 {
334                 /* Realtek RTL8211F (0x001cc916) */
335                 reg = <0>;
336                 max-speed = <1000>;
337                 eee-broken-1000t;
338 
339                 reset-assert-us = <10000>;
340                 reset-deassert-us = <80000>;
341                 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
342 
343                 interrupt-parent = <&gpio_intc>;
344                 /* MAC_INTR on GPIOZ_14 */
345                 interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>;
346         };
347 };
348 
349 &ethmac {
350         pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
351         pinctrl-names = "default";
352         status = "okay";
353         phy-mode = "rgmii";
354         phy-handle = <&external_phy>;
355         amlogic,tx-delay-ns = <2>;
356 };
357 
358 &pwm_ef {
359         status = "okay";
360         pinctrl-0 = <&pwm_e_pins>;
361         pinctrl-names = "default";
362         clocks = <&xtal>;
363         clock-names = "clkin0";
364 };
365 
366 &uart_A {
367         status = "okay";
368         pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
369         pinctrl-names = "default";
370         uart-has-rtscts;
371 
372         bluetooth {
373                 compatible = "brcm,bcm43438-bt";
374                 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
375                 max-speed = <2000000>;
376                 clocks = <&wifi32k>;
377                 clock-names = "lpo";
378         };
379 };
380 
381 &uart_AO {
382         status = "okay";
383         pinctrl-0 = <&uart_ao_a_pins>;
384         pinctrl-names = "default";
385 };
386 
387 &usb {
388         status = "okay";
389         dr_mode = "host";
390 };
391 
392 /* SDIO */
393 &sd_emmc_a {
394         status = "okay";
395         pinctrl-0 = <&sdio_pins>;
396         pinctrl-1 = <&sdio_clk_gate_pins>;
397         pinctrl-names = "default", "clk-gate";
398         #address-cells = <1>;
399         #size-cells = <0>;
400 
401         bus-width = <4>;
402         cap-sd-highspeed;
403         sd-uhs-sdr50;
404         max-frequency = <100000000>;
405 
406         non-removable;
407         disable-wp;
408 
409         /* WiFi firmware requires power to be kept while in suspend */
410         keep-power-in-suspend;
411 
412         mmc-pwrseq = <&sdio_pwrseq>;
413 
414         vmmc-supply = <&vddao_3v3>;
415         vqmmc-supply = <&vddao_1v8>;
416 
417         brcmf: wifi@1 {
418                 reg = <1>;
419                 compatible = "brcm,bcm4329-fmac";
420         };
421 };
422 
423 /* SD card */
424 &sd_emmc_b {
425         status = "okay";
426         pinctrl-0 = <&sdcard_c_pins>;
427         pinctrl-1 = <&sdcard_clk_gate_c_pins>;
428         pinctrl-names = "default", "clk-gate";
429 
430         bus-width = <4>;
431         cap-sd-highspeed;
432         max-frequency = <100000000>;
433         disable-wp;
434 
435         cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
436         vmmc-supply = <&vddao_3v3>;
437         vqmmc-supply = <&vddao_3v3>;
438 };
439 
440 /* eMMC */
441 &sd_emmc_c {
442         status = "okay";
443         pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
444         pinctrl-1 = <&emmc_clk_gate_pins>;
445         pinctrl-names = "default", "clk-gate";
446 
447         bus-width = <8>;
448         cap-mmc-highspeed;
449         max-frequency = <100000000>;
450         non-removable;
451         disable-wp;
452 
453         mmc-pwrseq = <&emmc_pwrseq>;
454         vmmc-supply = <&vcc_3v3>;
455         vqmmc-supply = <&flash_1v8>;
456 };
457 
458 &spdifout_a {
459         pinctrl-0 = <&spdif_out_h_pins>;
460         pinctrl-names = "default";
461         status = "okay";
462 };
463 
464 &spdifout_b {
465         status = "okay";
466 };
467 
468 &tdmif_b {
469         status = "okay";
470 };
471 
472 &tdmout_b {
473         status = "okay";
474 };
475 
476 &tohdmitx {
477         status = "okay";
478 };

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