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Linux/arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi

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  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 /*
  3  * Copyright (c) 2017 BayLibre SAS
  4  * Author: Neil Armstrong <narmstrong@baylibre.com>
  5  */
  6 
  7 / {
  8         gpu_opp_table: opp-table {
  9                 compatible = "operating-points-v2";
 10 
 11                 opp-125000000 {
 12                         opp-hz = /bits/ 64 <125000000>;
 13                         opp-microvolt = <950000>;
 14                 };
 15                 opp-250000000 {
 16                         opp-hz = /bits/ 64 <250000000>;
 17                         opp-microvolt = <950000>;
 18                 };
 19                 opp-285714285 {
 20                         opp-hz = /bits/ 64 <285714285>;
 21                         opp-microvolt = <950000>;
 22                 };
 23                 opp-400000000 {
 24                         opp-hz = /bits/ 64 <400000000>;
 25                         opp-microvolt = <950000>;
 26                 };
 27                 opp-500000000 {
 28                         opp-hz = /bits/ 64 <500000000>;
 29                         opp-microvolt = <950000>;
 30                 };
 31                 opp-666666666 {
 32                         opp-hz = /bits/ 64 <666666666>;
 33                         opp-microvolt = <950000>;
 34                 };
 35                 opp-744000000 {
 36                         opp-hz = /bits/ 64 <744000000>;
 37                         opp-microvolt = <950000>;
 38                 };
 39         };
 40 };
 41 
 42 &apb {
 43         mali: gpu@c0000 {
 44                 compatible = "arm,mali-450";
 45                 reg = <0x0 0xc0000 0x0 0x40000>;
 46                 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
 47                              <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
 48                              <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
 49                              <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
 50                              <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
 51                              <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
 52                              <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
 53                              <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
 54                              <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
 55                              <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 56                 interrupt-names = "gp", "gpmmu", "pp", "pmu",
 57                         "pp0", "ppmmu0", "pp1", "ppmmu1",
 58                         "pp2", "ppmmu2";
 59                 operating-points-v2 = <&gpu_opp_table>;
 60         };
 61 };

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