1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Author: Jerome Brunet <jbrunet@baylibre.com>
6 */
7
8 /dts-v1/;
9
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/sound/meson-aiu.h>
12
13 #include "meson-gxl-s805x.dtsi"
14
15 / {
16 compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
17 "amlogic,meson-gxl";
18 model = "Libre Computer AML-S805X-AC";
19
20 aliases {
21 serial0 = &uart_AO;
22 ethernet0 = ðmac;
23 spi0 = &spifc;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 cvbs-connector {
31 /*
32 * The pads are present but no connector is soldered on
33 * 2J2, so keep this off by default.
34 */
35 status = "disabled";
36 compatible = "composite-video-connector";
37
38 port {
39 cvbs_connector_in: endpoint {
40 remote-endpoint = <&cvbs_vdac_out>;
41 };
42 };
43 };
44
45 dc_5v: regulator-dc-5v {
46 compatible = "regulator-fixed";
47 regulator-name = "DC_5V";
48 regulator-min-microvolt = <5000000>;
49 regulator-max-microvolt = <5000000>;
50 regulator-always-on;
51 };
52
53 emmc_pwrseq: emmc-pwrseq {
54 compatible = "mmc-pwrseq-emmc";
55 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
56 };
57
58 hdmi-connector {
59 compatible = "hdmi-connector";
60 type = "a";
61
62 port {
63 hdmi_connector_in: endpoint {
64 remote-endpoint = <&hdmi_tx_tmds_out>;
65 };
66 };
67 };
68
69 memory@0 {
70 device_type = "memory";
71 reg = <0x0 0x0 0x0 0x20000000>;
72 };
73
74 vcck: regulator-vcck {
75 compatible = "regulator-fixed";
76 regulator-name = "VCCK";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
79 vin-supply = <&dc_5v>;
80
81 /*
82 * This is controlled by GPIOAO_9 we reserve this but
83 * claiming it as done below reset the board anyway
84 * Need to investigate this
85 *
86 * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
87 * enable-active-high;
88 */
89 regulator-always-on;
90 };
91
92 vcc_3v3: regulator-vcc-3v3 {
93 compatible = "regulator-fixed";
94 regulator-name = "VCC_3V3";
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
97 vin-supply = <&dc_5v>;
98 regulator-always-on;
99 };
100
101 vddio_ao18: regulator-vddio-ao18 {
102 compatible = "regulator-fixed";
103 regulator-name = "VDDIO_AO18";
104 regulator-min-microvolt = <1800000>;
105 regulator-max-microvolt = <1800000>;
106 vin-supply = <&vcc_3v3>;
107 regulator-always-on;
108 };
109
110 vddio_boot: regulator-vddio-boot {
111 compatible = "regulator-fixed";
112 regulator-name = "VDDIO_BOOT";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <1800000>;
115 vin-supply = <&vcc_3v3>;
116 regulator-always-on;
117 };
118
119 sound {
120 compatible = "amlogic,gx-sound-card";
121 model = "LIBRETECH-AC";
122 audio-widgets = "Speaker", "9J5-3 LEFT",
123 "Speaker", "9J5-2 RIGHT";
124 audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
125 "9J5-2 RIGHT", "ACODEC LORN";
126 clocks = <&clkc CLKID_MPLL0>,
127 <&clkc CLKID_MPLL1>,
128 <&clkc CLKID_MPLL2>;
129
130 assigned-clocks = <&clkc CLKID_MPLL0>,
131 <&clkc CLKID_MPLL1>,
132 <&clkc CLKID_MPLL2>;
133 assigned-clock-parents = <0>, <0>, <0>;
134 assigned-clock-rates = <294912000>,
135 <270950400>,
136 <393216000>;
137
138 dai-link-0 {
139 sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
140 };
141
142 dai-link-1 {
143 sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
144 dai-format = "i2s";
145 mclk-fs = <256>;
146
147 codec-0 {
148 sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
149 };
150
151 codec-1 {
152 sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
153 };
154 };
155
156 dai-link-2 {
157 sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
158
159 codec-0 {
160 sound-dai = <&hdmi_tx>;
161 };
162 };
163
164 dai-link-3 {
165 sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
166
167 codec-0 {
168 sound-dai = <&acodec>;
169 };
170 };
171 };
172 };
173
174 &acodec {
175 AVDD-supply = <&vddio_ao18>;
176 status = "okay";
177 };
178
179 &aiu {
180 status = "okay";
181 };
182
183 &cec_AO {
184 status = "okay";
185 pinctrl-0 = <&ao_cec_pins>;
186 pinctrl-names = "default";
187 hdmi-phandle = <&hdmi_tx>;
188 };
189
190 &cvbs_vdac_port {
191 cvbs_vdac_out: endpoint {
192 remote-endpoint = <&cvbs_connector_in>;
193 };
194 };
195
196 ðmac {
197 status = "okay";
198 };
199
200 &internal_phy {
201 pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
202 pinctrl-names = "default";
203 };
204
205 &ir {
206 status = "okay";
207 pinctrl-0 = <&remote_input_ao_pins>;
208 pinctrl-names = "default";
209 };
210
211 &hdmi_tx {
212 status = "okay";
213 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
214 pinctrl-names = "default";
215 };
216
217 &hdmi_tx_tmds_port {
218 hdmi_tx_tmds_out: endpoint {
219 remote-endpoint = <&hdmi_connector_in>;
220 };
221 };
222
223 &gpio_ao {
224 gpio-line-names = "UART TX",
225 "UART RX",
226 "7J1 Header Pin31",
227 "", "", "", "",
228 "IR In",
229 "HDMI CEC",
230 "5V VCCK Regulator",
231 /* GPIO_TEST_N */
232 "";
233 };
234
235 &gpio {
236 gpio-line-names = /* Bank GPIOZ */
237 "", "", "", "", "", "", "",
238 "", "", "", "", "", "", "",
239 "Eth Link LED", "Eth Activity LED",
240 /* Bank GPIOH */
241 "HDMI HPD", "HDMI SDA", "HDMI SCL",
242 "", "7J1 Header Pin13",
243 "7J1 Header Pin15",
244 "7J1 Header Pin7",
245 "7J1 Header Pin12",
246 "7J1 Header Pin16",
247 "7J1 Header Pin18",
248 /* Bank BOOT */
249 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
250 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
251 "eMMC Clk", "eMMC Reset", "eMMC CMD",
252 "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
253 "", "SPI NOR Chip Select",
254 /* Bank CARD */
255 "", "", "", "", "", "", "",
256 /* Bank GPIODV */
257 "", "", "", "", "", "", "", "", "", "", "", "",
258 "", "", "", "", "", "", "", "", "", "", "", "",
259 "7J1 Header Pin27", "7J1 Header Pin28", "",
260 "7J1 Header Pin29",
261 "VCCK Regulator", "VDDEE Regulator",
262 /* Bank GPIOX */
263 "7J1 Header Pin22", "7J1 Header Pin26",
264 "7J1 Header Pin36", "7J1 Header Pin38",
265 "7J1 Header Pin40", "7J1 Header Pin37",
266 "7J1 Header Pin33", "7J1 Header Pin35",
267 "7J1 Header Pin19", "7J1 Header Pin21",
268 "7J1 Header Pin24", "7J1 Header Pin23",
269 "7J1 Header Pin8", "7J1 Header Pin10",
270 "", "", "7J1 Header Pin32", "", "",
271 /* Bank GPIOCLK */
272 "", "";
273 };
274
275 &saradc {
276 status = "okay";
277 vref-supply = <&vddio_boot>;
278 };
279
280 /* eMMC */
281 &sd_emmc_c {
282 status = "okay";
283 pinctrl-0 = <&emmc_pins>;
284 pinctrl-1 = <&emmc_clk_gate_pins>;
285 pinctrl-names = "default", "clk-gate";
286
287 bus-width = <8>;
288 cap-mmc-highspeed;
289 mmc-ddr-1_8v;
290 mmc-hs200-1_8v;
291 max-frequency = <200000000>;
292 disable-wp;
293
294 mmc-pwrseq = <&emmc_pwrseq>;
295 vmmc-supply = <&vcc_3v3>;
296 vqmmc-supply = <&vddio_boot>;
297 };
298
299 &spifc {
300 status = "okay";
301 pinctrl-0 = <&nor_pins>;
302 pinctrl-names = "default";
303
304 w25q32: flash@0 {
305 #address-cells = <1>;
306 #size-cells = <1>;
307 compatible = "jedec,spi-nor";
308 reg = <0>;
309 spi-max-frequency = <3000000>;
310 };
311 };
312
313 &uart_AO {
314 status = "okay";
315 pinctrl-0 = <&uart_ao_a_pins>;
316 pinctrl-names = "default";
317 };
318
319 &usb {
320 status = "okay";
321 dr_mode = "host";
322 };
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