1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright (c) 2022, Arm Limited. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited. All rights reserved.
5 *
6 */
7
8 /dts-v1/;
9
10 #include "corstone1000.dtsi"
11
12 / {
13 model = "ARM Corstone1000 FVP (Fixed Virtual Platform)";
14 compatible = "arm,corstone1000-fvp";
15
16 smsc: ethernet@4010000 {
17 compatible = "smsc,lan91c111";
18 reg = <0x40100000 0x10000>;
19 phy-mode = "mii";
20 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
21 reg-io-width = <2>;
22 };
23
24 vmmc_v3_3d: regulator-vmmc {
25 compatible = "regulator-fixed";
26 regulator-name = "vmmc_supply";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-always-on;
30 };
31
32 sdmmc0: mmc@40300000 {
33 compatible = "arm,pl18x", "arm,primecell";
34 reg = <0x40300000 0x1000>;
35 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
36 max-frequency = <12000000>;
37 vmmc-supply = <&vmmc_v3_3d>;
38 clocks = <&smbclk>, <&refclk100mhz>;
39 clock-names = "smclk", "apb_pclk";
40 };
41
42 sdmmc1: mmc@50000000 {
43 compatible = "arm,pl18x", "arm,primecell";
44 reg = <0x50000000 0x10000>;
45 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
46 max-frequency = <12000000>;
47 vmmc-supply = <&vmmc_v3_3d>;
48 clocks = <&smbclk>, <&refclk100mhz>;
49 clock-names = "smclk", "apb_pclk";
50 };
51 };
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