1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * WinLink E850-96 board device tree source
4 *
5 * Copyright (C) 2018 Samsung Electronics Co., Ltd.
6 * Copyright (C) 2021 Linaro Ltd.
7 *
8 * Device tree source file for WinLink's E850-96 board which is based on
9 * Samsung Exynos850 SoC.
10 */
11
12 /dts-v1/;
13
14 #include "exynos850.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18
19 / {
20 model = "WinLink E850-96 board";
21 compatible = "winlink,e850-96", "samsung,exynos850";
22
23 aliases {
24 mmc0 = &mmc_0;
25 serial0 = &serial_0;
26 };
27
28 chosen {
29 stdout-path = &serial_0;
30 };
31
32 connector {
33 compatible = "gpio-usb-b-connector", "usb-b-connector";
34 label = "micro-USB";
35 type = "micro";
36 vbus-supply = <®_usb_host_vbus>;
37 id-gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
38 pinctrl-names = "default";
39 pinctrl-0 = <µ_usb_det_pins>;
40
41 port {
42 usb_dr_connector: endpoint {
43 remote-endpoint = <&usb1_drd_sw>;
44 };
45 };
46 };
47
48 /*
49 * RAM: 4 GiB (eMCP):
50 * - 2 GiB at 0x80000000
51 * - 2 GiB at 0x880000000
52 *
53 * 0xbab00000..0xbfffffff: secure memory (85 MiB).
54 */
55 memory@80000000 {
56 device_type = "memory";
57 reg = <0x0 0x80000000 0x3ab00000>,
58 <0x0 0xc0000000 0x40000000>,
59 <0x8 0x80000000 0x80000000>;
60 };
61
62 gpio-keys {
63 compatible = "gpio-keys";
64 pinctrl-names = "default";
65 pinctrl-0 = <&key_voldown_pins &key_volup_pins>;
66
67 volume-down-key {
68 label = "Volume Down";
69 linux,code = <KEY_VOLUMEDOWN>;
70 gpios = <&gpa1 0 GPIO_ACTIVE_LOW>;
71 };
72
73 volume-up-key {
74 label = "Volume Up";
75 linux,code = <KEY_VOLUMEUP>;
76 gpios = <&gpa0 7 GPIO_ACTIVE_LOW>;
77 };
78 };
79
80 leds {
81 compatible = "gpio-leds";
82
83 /* HEART_BEAT_LED */
84 user_led1: led-1 {
85 label = "yellow:user1";
86 gpios = <&gpg2 2 GPIO_ACTIVE_HIGH>;
87 color = <LED_COLOR_ID_YELLOW>;
88 function = LED_FUNCTION_HEARTBEAT;
89 linux,default-trigger = "heartbeat";
90 };
91
92 /* eMMC_LED */
93 user_led2: led-2 {
94 label = "yellow:user2";
95 gpios = <&gpg2 3 GPIO_ACTIVE_HIGH>;
96 color = <LED_COLOR_ID_YELLOW>;
97 linux,default-trigger = "mmc0";
98 };
99
100 /* SD_LED */
101 user_led3: led-3 {
102 label = "white:user3";
103 gpios = <&gpg2 4 GPIO_ACTIVE_HIGH>;
104 color = <LED_COLOR_ID_WHITE>;
105 function = LED_FUNCTION_SD;
106 linux,default-trigger = "mmc2";
107 };
108
109 /* WIFI_LED */
110 wlan_active_led: led-4 {
111 label = "yellow:wlan";
112 gpios = <&gpg2 6 GPIO_ACTIVE_HIGH>;
113 color = <LED_COLOR_ID_YELLOW>;
114 function = LED_FUNCTION_WLAN;
115 linux,default-trigger = "phy0tx";
116 default-state = "off";
117 };
118
119 /* BLUETOOTH_LED */
120 bt_active_led: led-5 {
121 label = "blue:bt";
122 gpios = <&gpg2 7 GPIO_ACTIVE_HIGH>;
123 color = <LED_COLOR_ID_BLUE>;
124 function = LED_FUNCTION_BLUETOOTH;
125 linux,default-trigger = "hci0-power";
126 default-state = "off";
127 };
128 };
129
130 /* TODO: Remove this once PMIC is implemented */
131 reg_dummy: regulator-0 {
132 compatible = "regulator-fixed";
133 regulator-name = "dummy_reg";
134 };
135
136 reg_usb_host_vbus: regulator-1 {
137 compatible = "regulator-fixed";
138 regulator-name = "usb_host_vbus";
139 regulator-min-microvolt = <5000000>;
140 regulator-max-microvolt = <5000000>;
141 gpio = <&gpa3 5 GPIO_ACTIVE_LOW>;
142 };
143
144 reserved-memory {
145 #address-cells = <2>;
146 #size-cells = <1>;
147 ranges;
148
149 ramoops@f0000000 {
150 compatible = "ramoops";
151 reg = <0x0 0xf0000000 0x200000>;
152 record-size = <0x20000>;
153 console-size = <0x20000>;
154 ftrace-size = <0x100000>;
155 pmsg-size = <0x20000>;
156 };
157 };
158
159 /*
160 * RTC clock (XrtcXTI); external, must be 32.768 kHz.
161 *
162 * TODO: Remove this once RTC clock is implemented properly as part of
163 * PMIC driver.
164 */
165 rtcclk: clock-rtcclk {
166 compatible = "fixed-clock";
167 clock-output-names = "rtcclk";
168 #clock-cells = <0>;
169 clock-frequency = <32768>;
170 };
171 };
172
173 &cmu_hsi {
174 clocks = <&oscclk>, <&rtcclk>,
175 <&cmu_top CLK_DOUT_HSI_BUS>,
176 <&cmu_top CLK_DOUT_HSI_MMC_CARD>,
177 <&cmu_top CLK_DOUT_HSI_USB20DRD>;
178 clock-names = "oscclk", "rtcclk", "dout_hsi_bus",
179 "dout_hsi_mmc_card", "dout_hsi_usb20drd";
180 };
181
182 &mmc_0 {
183 status = "okay";
184 mmc-hs200-1_8v;
185 mmc-hs400-1_8v;
186 cap-mmc-highspeed;
187 non-removable;
188 mmc-hs400-enhanced-strobe;
189 card-detect-delay = <200>;
190 clock-frequency = <800000000>;
191 bus-width = <8>;
192 samsung,dw-mshc-ciu-div = <3>;
193 samsung,dw-mshc-sdr-timing = <0 4>;
194 samsung,dw-mshc-ddr-timing = <2 4>;
195 samsung,dw-mshc-hs400-timing = <0 2>;
196
197 pinctrl-names = "default";
198 pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins
199 &sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>;
200 };
201
202 &oscclk {
203 clock-frequency = <26000000>;
204 };
205
206 &pinctrl_alive {
207 key_voldown_pins: key-voldown-pins {
208 samsung,pins = "gpa1-0";
209 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
212 };
213
214 key_volup_pins: key-volup-pins {
215 samsung,pins = "gpa0-7";
216 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
218 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
219 };
220
221 micro_usb_det_pins: micro-usb-det-pins {
222 samsung,pins = "gpa0-0";
223 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
224 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
225 };
226 };
227
228 &rtc {
229 status = "okay";
230 clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>;
231 clock-names = "rtc", "rtc_src";
232 };
233
234 &serial_0 {
235 status = "okay";
236 pinctrl-names = "default";
237 pinctrl-0 = <&uart1_pins>;
238 };
239
240 &usbdrd {
241 status = "okay";
242 vdd10-supply = <®_dummy>;
243 vdd33-supply = <®_dummy>;
244 };
245
246 &usbdrd_dwc3 {
247 dr_mode = "otg";
248 usb-role-switch;
249 role-switch-default-mode = "host";
250
251 port {
252 usb1_drd_sw: endpoint {
253 remote-endpoint = <&usb_dr_connector>;
254 };
255 };
256 };
257
258 &usbdrd_phy {
259 status = "okay";
260 };
261
262 &usi_uart {
263 samsung,clkreq-on; /* needed for UART mode */
264 status = "okay";
265 };
266
267 &watchdog_cl0 {
268 status = "okay";
269 };
270
271 &watchdog_cl1 {
272 status = "okay";
273 };
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