1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung ExynosAutov9 SADK board device tree source
4 *
5 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
6 *
7 */
8
9 /dts-v1/;
10 #include "exynosautov9.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13
14 / {
15 model = "Samsung ExynosAuto v9 SADK board";
16 compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";
17
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 aliases {
22 serial0 = &serial_0;
23 };
24
25 chosen {
26 stdout-path = &serial_0;
27 };
28
29 memory@80000000 {
30 device_type = "memory";
31 reg = <0x0 0x80000000 0x0 0x77000000>,
32 <0x8 0x80000000 0x1 0x7ba00000>,
33 <0xa 0x00000000 0x2 0x00000000>;
34 };
35
36 gpio-keys {
37 compatible = "gpio-keys";
38 pinctrl-names = "default";
39 pinctrl-0 = <&key_wakeup &key_volup &key_voldown>;
40
41 key-wakeup {
42 label = "Wakeup";
43 linux,code = <KEY_WAKEUP>;
44 gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
45 wakeup-source;
46 };
47
48 key-volume-down {
49 label = "Volume Down";
50 linux,code = <KEY_VOLUMEDOWN>;
51 gpios = <&gpg2 0 GPIO_ACTIVE_LOW>;
52 };
53
54 key-volume-up {
55 label = "Volume Up";
56 linux,code = <KEY_VOLUMEUP>;
57 gpios = <&gpg1 5 GPIO_ACTIVE_LOW>;
58 };
59 };
60
61 ufs_0_fixed_vcc_reg: regulator-0 {
62 compatible = "regulator-fixed";
63 regulator-name = "ufs-vcc";
64 gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>;
65 regulator-boot-on;
66 enable-active-high;
67 };
68
69 ufs_1_fixed_vcc_reg: regulator-1 {
70 compatible = "regulator-fixed";
71 regulator-name = "ufs-vcc";
72 gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
73 regulator-boot-on;
74 enable-active-high;
75 };
76 };
77
78 &pinctrl_alive {
79 key_wakeup: key-wakeup-pins {
80 samsung,pins = "gpa0-0";
81 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
82 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
83 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
84 };
85 };
86
87 &pinctrl_peric1 {
88 key_voldown: key-voldown-pins {
89 samsung,pins = "gpg2-0";
90 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
92 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
93 };
94
95 key_volup: key-volup-pins {
96 samsung,pins = "gpg1-5";
97 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
98 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
99 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
100 };
101 };
102
103 &pwm {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pwm_tout3>;
106 status = "okay";
107 };
108
109 &serial_0 {
110 pinctrl-0 = <&uart0_bus_dual>;
111 status = "okay";
112 };
113
114 &ufs_0_phy {
115 status = "okay";
116 };
117
118 &ufs_1_phy {
119 status = "okay";
120 };
121
122 &ufs_0 {
123 status = "okay";
124 vcc-supply = <&ufs_0_fixed_vcc_reg>;
125 };
126
127 &ufs_1 {
128 status = "okay";
129 vcc-supply = <&ufs_1_fixed_vcc_reg>;
130 };
131
132 &usi_0 {
133 samsung,clkreq-on; /* needed for UART mode */
134 status = "okay";
135 };
136
137 &xtcxo {
138 clock-frequency = <26000000>;
139 };
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