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Linux/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts

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  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 /*
  3  * Device Tree file for Freescale LS1012A RDB Board.
  4  *
  5  * Copyright 2016 Freescale Semiconductor, Inc.
  6  *
  7  */
  8 /dts-v1/;
  9 
 10 #include <dt-bindings/interrupt-controller/irq.h>
 11 #include "fsl-ls1012a.dtsi"
 12 
 13 / {
 14         model = "LS1012A RDB Board";
 15         compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
 16 
 17         aliases {
 18                 serial0 = &duart0;
 19                 mmc0 = &esdhc0;
 20                 mmc1 = &esdhc1;
 21         };
 22 };
 23 
 24 &duart0 {
 25         status = "okay";
 26 };
 27 
 28 &esdhc0 {
 29         sd-uhs-sdr104;
 30         sd-uhs-sdr50;
 31         sd-uhs-sdr25;
 32         sd-uhs-sdr12;
 33         status = "okay";
 34 };
 35 
 36 &esdhc1 {
 37         mmc-hs200-1_8v;
 38         status = "okay";
 39 };
 40 
 41 &i2c0 {
 42         status = "okay";
 43 
 44         accelerometer@1e {
 45                 compatible = "nxp,fxos8700";
 46                 reg = <0x1e>;
 47                 interrupt-parent = <&gpio26>;
 48                 interrupts = <13 IRQ_TYPE_EDGE_RISING>;
 49                 interrupt-names = "INT1";
 50         };
 51 
 52         gyroscope@20 {
 53                 compatible = "nxp,fxas21002c";
 54                 reg = <0x20>;
 55         };
 56 
 57         gpio@24 {
 58                 compatible = "nxp,pcal9555a";
 59                 reg = <0x24>;
 60                 gpio-controller;
 61                 #gpio-cells = <2>;
 62         };
 63 
 64         gpio@25 {
 65                 compatible = "nxp,pcal9555a";
 66                 reg = <0x25>;
 67                 gpio-controller;
 68                 #gpio-cells = <2>;
 69         };
 70 
 71         gpio26: gpio@26 {
 72                 compatible = "nxp,pcal9555a";
 73                 reg = <0x26>;
 74                 interrupt-parent = <&gpio0>;
 75                 interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
 76                 interrupt-controller;
 77                 #interrupt-cells = <2>;
 78                 gpio-controller;
 79                 #gpio-cells = <2>;
 80         };
 81 
 82         current-sensor@40 {
 83                 compatible = "ti,ina220";
 84                 reg = <0x40>;
 85                 shunt-resistor = <2000>;
 86         };
 87 };
 88 
 89 &qspi {
 90         status = "okay";
 91 
 92         s25fs512s0: flash@0 {
 93                 compatible = "jedec,spi-nor";
 94                 #address-cells = <1>;
 95                 #size-cells = <1>;
 96                 spi-max-frequency = <50000000>;
 97                 m25p,fast-read;
 98                 reg = <0>;
 99                 spi-rx-bus-width = <2>;
100                 spi-tx-bus-width = <2>;
101         };
102 };
103 
104 &sata {
105         status = "okay";
106 };

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