1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device Tree fragment for LS1028A QDS board, serdes 69xx
4 *
5 * Copyright 2019-2021 NXP
6 *
7 * Requires a LS1028A QDS board with lane B rework.
8 * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
9 */
10
11 /dts-v1/;
12 /plugin/;
13
14 &mdio_slot1 {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 slot1_sgmii: ethernet-phy@2 {
19 /* AQR112 */
20 reg = <0x2>;
21 compatible = "ethernet-phy-ieee802.3-c45";
22 };
23 };
24
25 &enetc_port0 {
26 phy-handle = <&slot1_sgmii>;
27 phy-mode = "2500base-x";
28 status = "okay";
29 };
30
31 &mdio_slot2 {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 /* 4 ports on VSC8514 */
36 slot2_qsgmii0: ethernet-phy@8 {
37 reg = <0x8>;
38 };
39
40 slot2_qsgmii1: ethernet-phy@9 {
41 reg = <0x9>;
42 };
43
44 slot2_qsgmii2: ethernet-phy@a {
45 reg = <0xa>;
46 };
47
48 slot2_qsgmii3: ethernet-phy@b {
49 reg = <0xb>;
50 };
51 };
52
53 &mscc_felix_ports {
54 port@0 {
55 status = "okay";
56 phy-handle = <&slot2_qsgmii0>;
57 phy-mode = "qsgmii";
58 managed = "in-band-status";
59 };
60
61 port@1 {
62 status = "okay";
63 phy-handle = <&slot2_qsgmii1>;
64 phy-mode = "qsgmii";
65 managed = "in-band-status";
66 };
67
68 port@2 {
69 status = "okay";
70 phy-handle = <&slot2_qsgmii2>;
71 phy-mode = "qsgmii";
72 managed = "in-band-status";
73 };
74
75 port@3 {
76 status = "okay";
77 phy-handle = <&slot2_qsgmii3>;
78 phy-mode = "qsgmii";
79 managed = "in-band-status";
80 };
81 };
82
83 &mscc_felix {
84 status = "okay";
85 };
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