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TOMOYO Linux Cross Reference
Linux/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi

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  1 // SPDX-License-Identifier: GPL-2.0+
  2 /*
  3  * Copyright 2018-2020 Purism SPC
  4  */
  5 
  6 /dts-v1/;
  7 
  8 #include "dt-bindings/input/input.h"
  9 #include <dt-bindings/interrupt-controller/irq.h>
 10 #include <dt-bindings/leds/common.h>
 11 #include "dt-bindings/pwm/pwm.h"
 12 #include "dt-bindings/usb/pd.h"
 13 #include "imx8mq.dtsi"
 14 
 15 / {
 16         model = "Purism Librem 5";
 17         compatible = "purism,librem5", "fsl,imx8mq";
 18         chassis-type = "handset";
 19 
 20         backlight_dsi: backlight-dsi {
 21                 compatible = "led-backlight";
 22                 leds = <&led_backlight>;
 23                 brightness-levels = <255>;
 24                 default-brightness-level = <190>;
 25         };
 26 
 27         pmic_osc: clock-pmic {
 28                 compatible = "fixed-clock";
 29                 #clock-cells = <0>;
 30                 clock-frequency = <32768>;
 31                 clock-output-names = "pmic_osc";
 32         };
 33 
 34         chosen {
 35                 stdout-path = &uart1;
 36         };
 37 
 38         gpio-keys {
 39                 compatible = "gpio-keys";
 40                 pinctrl-names = "default";
 41                 pinctrl-0 = <&pinctrl_keys>;
 42 
 43                 key-vol-down {
 44                         label = "VOL_DOWN";
 45                         gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
 46                         linux,code = <KEY_VOLUMEDOWN>;
 47                         debounce-interval = <50>;
 48                 };
 49 
 50                 key-vol-up {
 51                         label = "VOL_UP";
 52                         gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
 53                         linux,code = <KEY_VOLUMEUP>;
 54                         debounce-interval = <50>;
 55                 };
 56         };
 57 
 58         led-controller {
 59                 compatible = "pwm-leds-multicolor";
 60 
 61                 multi-led {
 62                         color = <LED_COLOR_ID_RGB>;
 63                         function = LED_FUNCTION_STATUS;
 64                         max-brightness = <248>;
 65 
 66                         led-0 {
 67                                 color = <LED_COLOR_ID_BLUE>;
 68                                 pwms = <&pwm2 0 50000 0>;
 69                         };
 70 
 71                         led-1 {
 72                                 color = <LED_COLOR_ID_GREEN>;
 73                                 pwms = <&pwm4 0 50000 0>;
 74                         };
 75 
 76                         led-2 {
 77                                 color = <LED_COLOR_ID_RED>;
 78                                 pwms = <&pwm3 0 50000 0>;
 79                         };
 80                 };
 81         };
 82 
 83         reg_aud_1v8: regulator-audio-1v8 {
 84                 compatible = "regulator-fixed";
 85                 pinctrl-names = "default";
 86                 pinctrl-0 = <&pinctrl_audiopwr>;
 87                 regulator-name = "AUD_1V8";
 88                 regulator-min-microvolt = <1800000>;
 89                 regulator-max-microvolt = <1800000>;
 90                 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 91                 enable-active-high;
 92                 regulator-always-on;
 93         };
 94 
 95         reg_mic_2v4: regulator-mic-2v4 {
 96                 compatible = "regulator-fixed";
 97                 regulator-name = "MIC_2V4";
 98                 regulator-min-microvolt = <2400000>;
 99                 regulator-max-microvolt = <2400000>;
100                 vin-supply = <&reg_aud_1v8>;
101         };
102 
103         /*
104          * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
105          * since we can't have it twice in the 2 different regulator nodes.
106          */
107         reg_csi_1v8: regulator-csi-1v8 {
108                 compatible = "regulator-fixed";
109                 regulator-name = "CAMERA_VDDIO_1V8";
110                 regulator-min-microvolt = <1800000>;
111                 regulator-max-microvolt = <1800000>;
112                 vin-supply = <&reg_vdd_3v3>;
113                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
114                 enable-active-high;
115         };
116 
117         /* controlled by the CAMERA_POWER_KEY HKS */
118         reg_vcam_1v2: regulator-vcam-1v2 {
119                 compatible = "regulator-fixed";
120                 regulator-name = "CAMERA_VDDD_1V2";
121                 regulator-min-microvolt = <1200000>;
122                 regulator-max-microvolt = <1200000>;
123                 vin-supply = <&reg_vdd_1v8>;
124                 enable-active-high;
125         };
126 
127         reg_vcam_2v8: regulator-vcam-2v8 {
128                 compatible = "regulator-fixed";
129                 regulator-name = "CAMERA_VDDA_2V8";
130                 regulator-min-microvolt = <2800000>;
131                 regulator-max-microvolt = <2800000>;
132                 vin-supply = <&reg_vdd_3v3>;
133                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
134                 enable-active-high;
135         };
136 
137         reg_gnss: regulator-gnss {
138                 compatible = "regulator-fixed";
139                 pinctrl-names = "default";
140                 pinctrl-0 = <&pinctrl_gnsspwr>;
141                 regulator-name = "GNSS";
142                 regulator-min-microvolt = <3300000>;
143                 regulator-max-microvolt = <3300000>;
144                 gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
145                 enable-active-high;
146         };
147 
148         reg_hub: regulator-hub {
149                 compatible = "regulator-fixed";
150                 pinctrl-names = "default";
151                 pinctrl-0 = <&pinctrl_hub_pwr>;
152                 regulator-name = "HUB";
153                 regulator-min-microvolt = <3300000>;
154                 regulator-max-microvolt = <3300000>;
155                 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
156                 enable-active-high;
157         };
158 
159         reg_lcd_1v8: regulator-lcd-1v8 {
160                 compatible = "regulator-fixed";
161                 pinctrl-names = "default";
162                 pinctrl-0 = <&pinctrl_dsien>;
163                 regulator-name = "LCD_1V8";
164                 regulator-min-microvolt = <1800000>;
165                 regulator-max-microvolt = <1800000>;
166                 vin-supply = <&reg_vdd_1v8>;
167                 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
168                 enable-active-high;
169                 /* Otherwise i2c3 is not functional */
170                 regulator-always-on;
171         };
172 
173         reg_lcd_3v4: regulator-lcd-3v4 {
174                 compatible = "regulator-fixed";
175                 regulator-name = "LCD_3V4";
176                 pinctrl-names = "default";
177                 pinctrl-0 = <&pinctrl_dsibiasen>;
178                 vin-supply = <&reg_vsys_3v4>;
179                 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
180                 enable-active-high;
181         };
182 
183         reg_vdd_sen: regulator-vdd-sen {
184                 compatible = "regulator-fixed";
185                 regulator-name = "VDD_SEN";
186                 regulator-min-microvolt = <3300000>;
187                 regulator-max-microvolt = <3300000>;
188         };
189 
190         reg_vdd_1v8: regulator-vdd-1v8 {
191                 compatible = "regulator-fixed";
192                 regulator-name = "VDD_1V8";
193                 regulator-min-microvolt = <1800000>;
194                 regulator-max-microvolt = <1800000>;
195                 vin-supply = <&buck7_reg>;
196         };
197 
198         reg_vdd_3v3: regulator-vdd-3v3 {
199                 compatible = "regulator-fixed";
200                 regulator-name = "VDD_3V3";
201                 regulator-min-microvolt = <3300000>;
202                 regulator-max-microvolt = <3300000>;
203         };
204 
205         reg_vsys_3v4: regulator-vsys-3v4 {
206                 compatible = "regulator-fixed";
207                 regulator-name = "VSYS_3V4";
208                 regulator-min-microvolt = <3400000>;
209                 regulator-max-microvolt = <3400000>;
210                 regulator-always-on;
211         };
212 
213         reg_wifi_3v3: regulator-wifi-3v3 {
214                 compatible = "regulator-fixed";
215                 pinctrl-names = "default";
216                 pinctrl-0 = <&pinctrl_wifi_pwr>;
217                 regulator-name = "3V3_WIFI";
218                 regulator-min-microvolt = <3300000>;
219                 regulator-max-microvolt = <3300000>;
220                 gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
221                 enable-active-high;
222                 vin-supply = <&reg_vdd_3v3>;
223         };
224 
225         sound {
226                 compatible = "simple-audio-card";
227                 pinctrl-names = "default";
228                 pinctrl-0 = <&pinctrl_hp>;
229                 simple-audio-card,name = "Librem 5";
230                 simple-audio-card,format = "i2s";
231                 simple-audio-card,widgets =
232                         "Headphone", "Headphones",
233                         "Microphone", "Headset Mic",
234                         "Microphone", "Digital Mic",
235                         "Speaker", "Speaker";
236                 simple-audio-card,routing =
237                         "Headphones", "HPOUTL",
238                         "Headphones", "HPOUTR",
239                         "Speaker", "SPKOUTL",
240                         "Speaker", "SPKOUTR",
241                         "Headset Mic", "MICBIAS",
242                         "IN3R", "Headset Mic",
243                         "DMICDAT", "Digital Mic";
244                 simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
245 
246                 simple-audio-card,cpu {
247                         sound-dai = <&sai2>;
248                 };
249 
250                 simple-audio-card,codec {
251                         sound-dai = <&codec>;
252                         clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
253                         frame-master;
254                         bitclock-master;
255                 };
256         };
257 
258         sound-wwan {
259                 compatible = "simple-audio-card";
260                 simple-audio-card,name = "Modem";
261                 simple-audio-card,format = "i2s";
262 
263                 simple-audio-card,cpu {
264                         sound-dai = <&sai6>;
265                         frame-inversion;
266                 };
267 
268                 simple-audio-card,codec {
269                         sound-dai = <&bm818_codec>;
270                         frame-master;
271                         bitclock-master;
272                 };
273         };
274 
275         usdhc2_pwrseq: pwrseq {
276                 pinctrl-names = "default";
277                 pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
278                 compatible = "mmc-pwrseq-simple";
279                 reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
280                               <&gpio4 29 GPIO_ACTIVE_HIGH>;
281         };
282 
283         bm818_codec: sound-wwan-codec {
284                 compatible = "broadmobi,bm818", "option,gtm601";
285                 #sound-dai-cells = <0>;
286         };
287 
288         vibrator {
289                 compatible = "pwm-vibrator";
290                 pwms = <&pwm1 0 1000000000 0>;
291                 pwm-names = "enable";
292                 vcc-supply = <&reg_vdd_3v3>;
293         };
294 };
295 
296 &A53_0 {
297         cpu-supply = <&buck2_reg>;
298 };
299 
300 &A53_1 {
301         cpu-supply = <&buck2_reg>;
302 };
303 
304 &A53_2 {
305         cpu-supply = <&buck2_reg>;
306 };
307 
308 &A53_3 {
309         cpu-supply = <&buck2_reg>;
310 };
311 
312 &csi1 {
313         status = "okay";
314 };
315 
316 &ddrc {
317         operating-points-v2 = <&ddrc_opp_table>;
318         status = "okay";
319 
320         ddrc_opp_table: opp-table {
321                 compatible = "operating-points-v2";
322 
323                 opp-25000000 {
324                         opp-hz = /bits/ 64 <25000000>;
325                 };
326 
327                 opp-100000000 {
328                         opp-hz = /bits/ 64 <100000000>;
329                 };
330 
331                 opp-166000000 {
332                         opp-hz = /bits/ 64 <166935483>;
333                 };
334 
335                 opp-800000000 {
336                         opp-hz = /bits/ 64 <800000000>;
337                 };
338         };
339 };
340 
341 &dphy {
342         status = "okay";
343 };
344 
345 &ecspi1 {
346         pinctrl-names = "default";
347         pinctrl-0 = <&pinctrl_ecspi1>;
348         cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
349         #address-cells = <1>;
350         #size-cells = <0>;
351         status = "okay";
352 
353         nor_flash: flash@0 {
354                 compatible = "jedec,spi-nor";
355                 reg = <0>;
356                 spi-max-frequency = <1000000>;
357                 #address-cells = <1>;
358                 #size-cells = <1>;
359 
360                 partition@0 {
361                         label = "protected0";
362                         reg = <0x0 0x30000>;
363                         read-only;
364                 };
365 
366                 partition@30000 {
367                         label = "firmware";
368                         reg = <0x30000 0x1d0000>;
369                         read-only;
370                 };
371         };
372 };
373 
374 &gpio1 {
375         pinctrl-names = "default";
376         pinctrl-0 = <&pinctrl_pmic_5v>;
377 
378         pmic-5v-hog {
379                 gpio-hog;
380                 gpios = <1 GPIO_ACTIVE_HIGH>;
381                 input;
382                 line-name = "pmic-5v";
383         };
384 };
385 
386 &iomuxc {
387         pinctrl-names = "default";
388         pinctrl-0 = <&pinctrl_hog>;
389 
390         pinctrl_hog: hoggrp {
391                 fsl,pins = <
392                         /* CLKO2 for cameras on both CSI1 and CSI2 */
393                         MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
394                 >;
395         };
396 
397         pinctrl_audiopwr: audiopwrgrp {
398                 fsl,pins = <
399                         /* AUDIO_POWER_EN_3V3 */
400                         MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4       0x83
401                 >;
402         };
403 
404         pinctrl_bl: blgrp {
405                 fsl,pins = <
406                         /* BACKLINGE_EN */
407                         MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14        0x83
408                 >;
409         };
410 
411         pinctrl_bt: btgrp {
412                 fsl,pins = <
413                         /* BT_REG_ON */
414                         MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25       0x83
415                 >;
416         };
417 
418         pinctrl_camera_pwr: camerapwrgrp {
419                 fsl,pins = <
420                         /* CAMERA_PWR_EN_3V3 */
421                         MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0       0x83
422                 >;
423         };
424 
425         pinctrl_csi1: csi1grp {
426                 fsl,pins = <
427                         /* CSI1_NRST */
428                         MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25        0x83
429                 >;
430         };
431 
432         pinctrl_charger_in: chargeringrp {
433                 fsl,pins = <
434                         /* CHRG_INT */
435                         MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3       0x80
436                 >;
437         };
438 
439         pinctrl_dsibiasen: dsibiasengrp {
440                 fsl,pins = <
441                         /* DSI_BIAS_EN */
442                         MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20        0x83
443                 >;
444         };
445 
446         pinctrl_dsien: dsiengrp {
447                 fsl,pins = <
448                         /* DSI_EN_3V3 */
449                         MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5       0x83
450                 >;
451         };
452 
453         pinctrl_dsirst: dsirstgrp {
454                 fsl,pins = <
455                         /* DSI_RST */
456                         MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29        0x83
457                         /* DSI_TE */
458                         MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28        0x83
459                         /* TP_RST */
460                         MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24     0x83
461                 >;
462         };
463 
464         pinctrl_ecspi1: ecspigrp {
465                 fsl,pins = <
466                         MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI    0x83
467                         MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO    0x83
468                         MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9       0x19
469                         MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x83
470                 >;
471         };
472 
473         pinctrl_gauge: gaugegrp {
474                 fsl,pins = <
475                         /* BAT_LOW */
476                         MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20        0x80
477                 >;
478         };
479 
480         pinctrl_gnsspwr: gnsspwrgrp {
481                 fsl,pins = <
482                         /* GPS3V3_EN */
483                         MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12     0x83
484                 >;
485         };
486 
487         pinctrl_haptic: hapticgrp {
488                 fsl,pins = <
489                         /* MOTO */
490                         MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT     0x83
491                 >;
492         };
493 
494         pinctrl_hp: hpgrp {
495                 fsl,pins = <
496                         /* HEADPHONE_DET_1V8 */
497                         MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9      0x180
498                 >;
499         };
500 
501         pinctrl_hub_pwr: hubpwrgrp {
502                 fsl,pins = <
503                         /* HUB_PWR_3V3_EN */
504                         MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14      0x83
505                 >;
506         };
507 
508         pinctrl_i2c1: i2c1grp {
509                 fsl,pins = <
510                         MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL          0x40000026
511                         MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA          0x40000026
512                 >;
513         };
514 
515         pinctrl_i2c2: i2c2grp {
516                 fsl,pins = <
517                         MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL          0x40000026
518                         MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA          0x40000026
519                 >;
520         };
521 
522         pinctrl_i2c3: i2c3grp {
523                 fsl,pins = <
524                         MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL          0x40000026
525                         MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA          0x40000026
526                 >;
527         };
528 
529         pinctrl_i2c4: i2c4grp {
530                 fsl,pins = <
531                         MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL          0x40000026
532                         MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA          0x40000026
533                 >;
534         };
535 
536         pinctrl_keys: keysgrp {
537                 fsl,pins = <
538                         /* VOL- */
539                         MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17       0x01C0
540                         /* VOL+ */
541                         MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16        0x01C0
542                 >;
543         };
544 
545         pinctrl_led_b: ledbgrp {
546                 fsl,pins = <
547                         /* LED_B */
548                         MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT        0x06
549                 >;
550         };
551 
552         pinctrl_led_g: ledggrp {
553                 fsl,pins = <
554                         /* LED_G */
555                         MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT         0x06
556                 >;
557         };
558 
559         pinctrl_led_r: ledrgrp {
560                 fsl,pins = <
561                         /* LED_R */
562                         MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT          0x06
563                 >;
564         };
565 
566         pinctrl_mag: maggrp {
567                 fsl,pins = <
568                         /* INT_MAG */
569                         MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22       0x80
570                 >;
571         };
572 
573         pinctrl_pmic: pmicgrp {
574                 fsl,pins = <
575                         /* PMIC_NINT */
576                         MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7       0x80
577                 >;
578         };
579 
580         pinctrl_pmic_5v: pmic5vgrp {
581                 fsl,pins = <
582                         /* PMIC_5V */
583                         MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1       0x80
584                 >;
585         };
586 
587         pinctrl_prox: proxgrp {
588                 fsl,pins = <
589                         /* INT_LIGHT */
590                         MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7      0x80
591                 >;
592         };
593 
594         pinctrl_rtc: rtcgrp {
595                 fsl,pins = <
596                         /* RTC_INT */
597                         MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9       0x80
598                 >;
599         };
600 
601         pinctrl_sai2: sai2grp {
602                 fsl,pins = <
603                         MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0    0xd6
604                         MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC     0xd6
605                         MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK        0xd6
606                         MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0    0xd6
607                         MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK      0xd6
608                 >;
609         };
610 
611         pinctrl_sai6: sai6grp {
612                 fsl,pins = <
613                         MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0    0xd6
614                         MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC     0xd6
615                         MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
616                         MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0    0xd6
617                 >;
618         };
619 
620         pinctrl_tcpc: tcpcgrp {
621                 fsl,pins = <
622                         /* TCPC_INT */
623                         MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10      0x01C0
624                 >;
625         };
626 
627         pinctrl_touch: touchgrp {
628                 fsl,pins = <
629                         /* TP_INT */
630                         MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27        0x80
631                 >;
632         };
633 
634         pinctrl_typec: typecgrp {
635                 fsl,pins = <
636                         /* TYPEC_MUX_EN */
637                         MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11      0x83
638                 >;
639         };
640 
641         pinctrl_uart1: uart1grp {
642                 fsl,pins = <
643                         MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX     0x49
644                         MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX     0x49
645                 >;
646         };
647 
648         pinctrl_uart2: uart2grp {
649                 fsl,pins = <
650                         MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX     0x49
651                         MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX     0x49
652                 >;
653         };
654 
655         pinctrl_uart3: uart3grp {
656                 fsl,pins = <
657                         MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX     0x49
658                         MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX     0x49
659                 >;
660         };
661 
662         pinctrl_uart4: uart4grp {
663                 fsl,pins = <
664                         MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX           0x49
665                         MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX           0x49
666                         MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B        0x49
667                         MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B         0x49
668                 >;
669         };
670 
671         pinctrl_usdhc1: usdhc1grp {
672                 fsl,pins = <
673                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x83
674                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xc3
675                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xc3
676                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xc3
677                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xc3
678                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xc3
679                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xc3
680                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xc3
681                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xc3
682                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xc3
683                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x83
684                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
685                 >;
686         };
687 
688         pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
689                 fsl,pins = <
690                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x8d
691                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xcd
692                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xcd
693                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xcd
694                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xcd
695                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xcd
696                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xcd
697                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xcd
698                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xcd
699                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xcd
700                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x8d
701                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
702                 >;
703         };
704 
705         pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
706                 fsl,pins = <
707                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x9f
708                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xdf
709                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xdf
710                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xdf
711                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xdf
712                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xdf
713                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xdf
714                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xdf
715                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xdf
716                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xdf
717                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x9f
718                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
719                 >;
720         };
721 
722         pinctrl_usdhc2: usdhc2grp {
723                 fsl,pins = <
724                         MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12        0x80
725                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x83
726                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xc3
727                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xc3
728                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xc3
729                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xc3
730                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xc3
731                         MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
732                 >;
733         };
734 
735         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
736                 fsl,pins = <
737                         MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12        0x80
738                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x8d
739                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xcd
740                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xcd
741                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xcd
742                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xcd
743                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xcd
744                         MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
745                 >;
746         };
747 
748         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
749                 fsl,pins = <
750                         MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12        0x80
751                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x9f
752                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xcf
753                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xcf
754                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xcf
755                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xcf
756                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xcf
757                         MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
758                 >;
759         };
760 
761         pinctrl_wifi_disable: wifidisablegrp {
762                 fsl,pins = <
763                         /* WIFI_REG_ON */
764                         MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29        0x83
765                 >;
766         };
767 
768         pinctrl_wifi_pwr: wifipwrgrp {
769                 fsl,pins = <
770                         /* WIFI3V3_EN */
771                         MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10     0x83
772                 >;
773         };
774 
775         pinctrl_wdog: wdoggrp {
776                 fsl,pins = <
777                         /* nWDOG */
778                         MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B    0x1f
779                 >;
780         };
781 };
782 
783 &i2c1 {
784         clock-frequency = <384000>;
785         pinctrl-names = "default";
786         pinctrl-0 = <&pinctrl_i2c1>;
787         status = "okay";
788 
789         typec_pd: usb-pd@3f {
790                 compatible = "ti,tps6598x";
791                 reg = <0x3f>;
792                 pinctrl-names = "default";
793                 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
794                 interrupt-parent = <&gpio1>;
795                 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
796                 interrupt-names = "irq";
797                 extcon = <&usb3_phy0>;
798                 wakeup-source;
799 
800                 connector {
801                         compatible = "usb-c-connector";
802                         label = "USB-C";
803                         data-role = "dual";
804 
805                         ports {
806                                 #address-cells = <1>;
807                                 #size-cells = <0>;
808 
809                                 port@0 {
810                                         reg = <0>;
811 
812                                         usb_con_hs: endpoint {
813                                                 remote-endpoint = <&typec_hs>;
814                                         };
815                                 };
816 
817                                 port@1 {
818                                         reg = <1>;
819 
820                                         usb_con_ss: endpoint {
821                                                 remote-endpoint = <&typec_ss>;
822                                         };
823                                 };
824                         };
825                 };
826         };
827 
828         pmic: pmic@4b {
829                 compatible = "rohm,bd71837";
830                 reg = <0x4b>;
831                 pinctrl-names = "default";
832                 pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
833                 clocks = <&pmic_osc>;
834                 #clock-cells = <0>;
835                 clock-names = "osc";
836                 clock-output-names = "pmic_clk";
837                 interrupt-parent = <&gpio1>;
838                 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
839                 rohm,reset-snvs-powered;
840 
841                 regulators {
842                         buck1_reg: BUCK1 {
843                                 regulator-name = "buck1";
844                                 regulator-min-microvolt = <700000>;
845                                 regulator-max-microvolt = <1300000>;
846                                 regulator-boot-on;
847                                 regulator-ramp-delay = <1250>;
848                                 rohm,dvs-run-voltage = <880000>;
849                                 rohm,dvs-idle-voltage = <820000>;
850                                 rohm,dvs-suspend-voltage = <810000>;
851                                 regulator-always-on;
852                         };
853 
854                         buck2_reg: BUCK2 {
855                                 regulator-name = "buck2";
856                                 regulator-min-microvolt = <700000>;
857                                 regulator-max-microvolt = <1300000>;
858                                 regulator-boot-on;
859                                 regulator-ramp-delay = <1250>;
860                                 rohm,dvs-run-voltage = <950000>;
861                                 rohm,dvs-idle-voltage = <850000>;
862                                 regulator-always-on;
863                         };
864 
865                         buck3_reg: BUCK3 {
866                                 regulator-name = "buck3";
867                                 regulator-min-microvolt = <700000>;
868                                 regulator-max-microvolt = <1300000>;
869                                 regulator-boot-on;
870                                 rohm,dvs-run-voltage = <850000>;
871                         };
872 
873                         buck4_reg: BUCK4 {
874                                 regulator-name = "buck4";
875                                 regulator-min-microvolt = <700000>;
876                                 regulator-max-microvolt = <1300000>;
877                                 rohm,dvs-run-voltage = <930000>;
878                         };
879 
880                         buck5_reg: BUCK5 {
881                                 regulator-name = "buck5";
882                                 regulator-min-microvolt = <700000>;
883                                 regulator-max-microvolt = <1350000>;
884                                 regulator-boot-on;
885                                 regulator-always-on;
886                         };
887 
888                         buck6_reg: BUCK6 {
889                                 regulator-name = "buck6";
890                                 regulator-min-microvolt = <3000000>;
891                                 regulator-max-microvolt = <3300000>;
892                                 regulator-boot-on;
893                                 regulator-always-on;
894                         };
895 
896                         buck7_reg: BUCK7 {
897                                 regulator-name = "buck7";
898                                 regulator-min-microvolt = <1605000>;
899                                 regulator-max-microvolt = <1995000>;
900                                 regulator-boot-on;
901                                 regulator-always-on;
902                         };
903 
904                         buck8_reg: BUCK8 {
905                                 regulator-name = "buck8";
906                                 regulator-min-microvolt = <800000>;
907                                 regulator-max-microvolt = <1400000>;
908                                 regulator-boot-on;
909                                 regulator-always-on;
910                         };
911 
912                         ldo1_reg: LDO1 {
913                                 regulator-name = "ldo1";
914                                 regulator-min-microvolt = <3000000>;
915                                 regulator-max-microvolt = <3300000>;
916                                 regulator-boot-on;
917                                 /* leave on for snvs power button */
918                                 regulator-always-on;
919                         };
920 
921                         ldo2_reg: LDO2 {
922                                 regulator-name = "ldo2";
923                                 regulator-min-microvolt = <900000>;
924                                 regulator-max-microvolt = <900000>;
925                                 regulator-boot-on;
926                                 /* leave on for snvs power button */
927                                 regulator-always-on;
928                         };
929 
930                         ldo3_reg: LDO3 {
931                                 regulator-name = "ldo3";
932                                 regulator-min-microvolt = <1800000>;
933                                 regulator-max-microvolt = <3300000>;
934                                 regulator-boot-on;
935                                 regulator-always-on;
936                         };
937 
938                         ldo4_reg: LDO4 {
939                                 regulator-name = "ldo4";
940                                 regulator-min-microvolt = <900000>;
941                                 regulator-max-microvolt = <1800000>;
942                                 regulator-boot-on;
943                                 regulator-always-on;
944                         };
945 
946                         ldo5_reg: LDO5 {
947                                 /* VDD_PHY_0V9 - MIPI and HDMI domains */
948                                 regulator-name = "ldo5";
949                                 regulator-min-microvolt = <1800000>;
950                                 regulator-max-microvolt = <3300000>;
951                                 regulator-always-on;
952                         };
953 
954                         ldo6_reg: LDO6 {
955                                 /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
956                                 regulator-name = "ldo6";
957                                 regulator-min-microvolt = <900000>;
958                                 regulator-max-microvolt = <1800000>;
959                                 regulator-boot-on;
960                                 regulator-always-on;
961                         };
962 
963                         ldo7_reg: LDO7 {
964                                 /* VDD_PHY_3V3 - USB domain */
965                                 regulator-name = "ldo7";
966                                 regulator-min-microvolt = <1800000>;
967                                 regulator-max-microvolt = <3300000>;
968                                 regulator-boot-on;
969                                 regulator-always-on;
970                         };
971                 };
972         };
973 
974         rtc@68 {
975                 compatible = "microcrystal,rv4162";
976                 reg = <0x68>;
977                 pinctrl-names = "default";
978                 pinctrl-0 = <&pinctrl_rtc>;
979                 interrupt-parent = <&gpio1>;
980                 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
981         };
982 };
983 
984 &i2c2 {
985         clock-frequency = <384000>;
986         pinctrl-names = "default";
987         pinctrl-0 = <&pinctrl_i2c2>;
988         status = "okay";
989 
990         magnetometer: magnetometer@1e   {
991                 compatible = "st,lsm9ds1-magn";
992                 reg = <0x1e>;
993                 pinctrl-names = "default";
994                 pinctrl-0 = <&pinctrl_mag>;
995                 interrupt-parent = <&gpio3>;
996                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
997                 vdd-supply = <&reg_vdd_sen>;
998                 vddio-supply = <&reg_vdd_1v8>;
999         };
1000 
1001         regulator@3e {
1002                 compatible = "ti,tps65132";
1003                 reg = <0x3e>;
1004 
1005                 reg_lcd_avdd: outp {
1006                         regulator-name = "LCD_AVDD";
1007                         vin-supply = <&reg_lcd_3v4>;
1008                 };
1009 
1010                 reg_lcd_avee: outn {
1011                         regulator-name = "LCD_AVEE";
1012                         vin-supply = <&reg_lcd_3v4>;
1013                 };
1014         };
1015 
1016         proximity: prox@60 {
1017                 compatible = "vishay,vcnl4040";
1018                 reg = <0x60>;
1019                 pinctrl-names = "default";
1020                 pinctrl-0 = <&pinctrl_prox>;
1021                 interrupt-parent = <&gpio3>;
1022                 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
1023         };
1024 
1025         accel_gyro: accel-gyro@6a       {
1026                 compatible = "st,lsm9ds1-imu";
1027                 reg = <0x6a>;
1028                 vdd-supply = <&reg_vdd_sen>;
1029                 vddio-supply = <&reg_vdd_1v8>;
1030         };
1031 };
1032 
1033 &i2c3 {
1034         clock-frequency = <384000>;
1035         pinctrl-names = "default";
1036         pinctrl-0 = <&pinctrl_i2c3>;
1037         status = "okay";
1038 
1039         codec: audio-codec@1a {
1040                 compatible = "wlf,wm8962";
1041                 reg = <0x1a>;
1042                 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
1043                 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1044                 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1045                 assigned-clock-rates = <24576000>;
1046                 #sound-dai-cells = <0>;
1047                 mic-cfg = <0x200>;
1048                 DCVDD-supply = <&reg_aud_1v8>;
1049                 DBVDD-supply = <&reg_aud_1v8>;
1050                 AVDD-supply = <&reg_aud_1v8>;
1051                 CPVDD-supply = <&reg_aud_1v8>;
1052                 MICVDD-supply = <&reg_mic_2v4>;
1053                 PLLVDD-supply = <&reg_aud_1v8>;
1054                 SPKVDD1-supply = <&reg_vsys_3v4>;
1055                 SPKVDD2-supply = <&reg_vsys_3v4>;
1056                 gpio-cfg = <
1057                         0x0000 /* n/c */
1058                         0x0001 /* gpio2, 1: default */
1059                         0x0013 /* gpio3, 2: dmicclk */
1060                         0x0000 /* n/c, 3: default */
1061                         0x8014 /* gpio5, 4: dmic_dat */
1062                         0x0000 /* gpio6, 5: default */
1063                 >;
1064         };
1065 
1066         camera_front: camera@20 {
1067                 compatible = "hynix,hi846";
1068                 reg = <0x20>;
1069                 pinctrl-names = "default";
1070                 pinctrl-0 = <&pinctrl_csi1>;
1071                 clocks = <&clk IMX8MQ_CLK_CLKO2>;
1072                 assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1073                 assigned-clock-rates = <25000000>;
1074                 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1075                 vdda-supply = <&reg_vcam_2v8>;
1076                 vddd-supply = <&reg_vcam_1v2>;
1077                 vddio-supply = <&reg_csi_1v8>;
1078                 rotation = <90>;
1079                 orientation = <0>;
1080 
1081                 port {
1082                         camera1_ep: endpoint {
1083                                 data-lanes = <1 2>;
1084                                 link-frequencies = /bits/ 64
1085                                         <80000000 200000000 300000000>;
1086                                 remote-endpoint = <&mipi1_sensor_ep>;
1087                         };
1088                 };
1089         };
1090 
1091         backlight@36 {
1092                 compatible = "ti,lm36922";
1093                 reg = <0x36>;
1094                 pinctrl-names = "default";
1095                 pinctrl-0 = <&pinctrl_bl>;
1096                 #address-cells = <1>;
1097                 #size-cells = <0>;
1098                 enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1099                 vled-supply = <&reg_vsys_3v4>;
1100                 ti,ovp-microvolt = <25000000>;
1101 
1102                 led_backlight: led@0 {
1103                         reg = <0>;
1104                         label = ":backlight";
1105                         linux,default-trigger = "backlight";
1106                         led-max-microamp = <20000>;
1107                 };
1108         };
1109 
1110         touchscreen@38 {
1111                 compatible = "edt,edt-ft5506";
1112                 reg = <0x38>;
1113                 pinctrl-names = "default";
1114                 pinctrl-0 = <&pinctrl_touch>;
1115                 interrupt-parent = <&gpio1>;
1116                 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1117                 touchscreen-size-x = <720>;
1118                 touchscreen-size-y = <1440>;
1119                 vcc-supply = <&reg_lcd_1v8>;
1120         };
1121 };
1122 
1123 &i2c4 {
1124         clock-frequency = <384000>;
1125         pinctrl-names = "default";
1126         pinctrl-0 = <&pinctrl_i2c4>;
1127         status = "okay";
1128 
1129         vcm@c {
1130                 compatible = "dongwoon,dw9714";
1131                 reg = <0x0c>;
1132                 vcc-supply = <&reg_csi_1v8>;
1133         };
1134 
1135         bat: fuel-gauge@36 {
1136                 compatible = "maxim,max17055";
1137                 reg = <0x36>;
1138                 interrupt-parent = <&gpio3>;
1139                 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1140                 pinctrl-names = "default";
1141                 pinctrl-0 = <&pinctrl_gauge>;
1142                 power-supplies = <&bq25895>;
1143                 maxim,over-heat-temp = <700>;
1144                 maxim,over-volt = <4500>;
1145                 maxim,rsns-microohm = <5000>;
1146         };
1147 
1148         bq25895: charger@6a {
1149                 compatible = "ti,bq25895", "ti,bq25890";
1150                 reg = <0x6a>;
1151                 pinctrl-names = "default";
1152                 pinctrl-0 = <&pinctrl_charger_in>;
1153                 interrupt-parent = <&gpio3>;
1154                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1155                 ti,battery-regulation-voltage = <4208000>; /* uV */
1156                 ti,termination-current = <128000>;  /* uA */
1157                 ti,precharge-current = <128000>; /* uA */
1158                 ti,minimum-sys-voltage = <3700000>; /* uV */
1159                 ti,boost-voltage = <5000000>; /* uV */
1160                 ti,boost-max-current = <1500000>; /* uA */
1161                 monitored-battery = <&bat>;
1162                 power-supplies = <&typec_pd>;
1163         };
1164 };
1165 
1166 &lcdif {
1167         status = "okay";
1168 };
1169 
1170 &mipi_csi1 {
1171         assigned-clock-rates = <266000000>, <200000000>, <66000000>;
1172         status = "okay";
1173 
1174         ports {
1175                 port@0 {
1176                         reg = <0>;
1177 
1178                         mipi1_sensor_ep: endpoint {
1179                                 remote-endpoint = <&camera1_ep>;
1180                                 data-lanes = <1 2>;
1181                         };
1182                 };
1183         };
1184 };
1185 
1186 &mipi_dsi {
1187         #address-cells = <1>;
1188         #size-cells = <0>;
1189         status = "okay";
1190 
1191         lcd_panel: panel@0 {
1192                 compatible = "mantix,mlaf057we51-x";
1193                 reg = <0>;
1194                 pinctrl-names = "default";
1195                 pinctrl-0 = <&pinctrl_dsirst>;
1196                 avdd-supply = <&reg_lcd_avdd>;
1197                 avee-supply = <&reg_lcd_avee>;
1198                 vddi-supply = <&reg_lcd_1v8>;
1199                 backlight = <&backlight_dsi>;
1200                 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1201                 mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1202 
1203                 port {
1204                         panel_in: endpoint {
1205                                 remote-endpoint = <&mipi_dsi_out>;
1206                         };
1207                 };
1208         };
1209 
1210         ports {
1211                 port@1 {
1212                         reg = <1>;
1213 
1214                         mipi_dsi_out: endpoint {
1215                                 remote-endpoint = <&panel_in>;
1216                         };
1217                 };
1218         };
1219 };
1220 
1221 &pgc_gpu {
1222         power-supply = <&buck3_reg>;
1223 };
1224 
1225 &pgc_mipi {
1226         power-supply = <&ldo5_reg>;
1227 };
1228 
1229 &pgc_vpu {
1230         power-supply = <&buck4_reg>;
1231 };
1232 
1233 &pwm1 {
1234         pinctrl-names = "default";
1235         pinctrl-0 = <&pinctrl_haptic>;
1236         status = "okay";
1237 };
1238 
1239 &pwm2 {
1240         pinctrl-names = "default";
1241         pinctrl-0 = <&pinctrl_led_b>;
1242         status = "okay";
1243 };
1244 
1245 &pwm3 {
1246         pinctrl-names = "default";
1247         pinctrl-0 = <&pinctrl_led_r>;
1248         status = "okay";
1249 };
1250 
1251 &pwm4 {
1252         pinctrl-names = "default";
1253         pinctrl-0 = <&pinctrl_led_g>;
1254         status = "okay";
1255 };
1256 
1257 &sai2 {
1258         pinctrl-names = "default";
1259         pinctrl-0 = <&pinctrl_sai2>;
1260         assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1261         assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1262         assigned-clock-rates = <24576000>;
1263         status = "okay";
1264 };
1265 
1266 &sai6 {
1267         pinctrl-names = "default";
1268         pinctrl-0 = <&pinctrl_sai6>;
1269         assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1270         assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1271         assigned-clock-rates = <24576000>;
1272         fsl,sai-synchronous-rx;
1273         status = "okay";
1274 };
1275 
1276 &snvs_pwrkey {
1277         status = "okay";
1278 };
1279 
1280 &snvs_rtc {
1281         status = "disabled";
1282 };
1283 
1284 &uart1 { /* console */
1285         pinctrl-names = "default";
1286         pinctrl-0 = <&pinctrl_uart1>;
1287         status = "okay";
1288 };
1289 
1290 &uart2 { /* TPS - GPS - DEBUG */
1291         pinctrl-names = "default";
1292         pinctrl-0 = <&pinctrl_uart2>;
1293         status = "okay";
1294 
1295         gnss {
1296                 compatible = "globaltop,pa6h";
1297                 vcc-supply = <&reg_gnss>;
1298                 current-speed = <9600>;
1299         };
1300 };
1301 
1302 &uart3 { /* SMC */
1303         pinctrl-names = "default";
1304         pinctrl-0 = <&pinctrl_uart3>;
1305         status = "okay";
1306 };
1307 
1308 &uart4 { /* BT */
1309         pinctrl-names = "default";
1310         pinctrl-0 = <&pinctrl_uart4>;
1311         uart-has-rtscts;
1312         status = "okay";
1313 };
1314 
1315 &usb3_phy0 {
1316         status = "okay";
1317 };
1318 
1319 &usb3_phy1 {
1320         vbus-supply = <&reg_hub>;
1321         status = "okay";
1322 };
1323 
1324 &usb_dwc3_0 {
1325         #address-cells = <1>;
1326         #size-cells = <0>;
1327         dr_mode = "otg";
1328         usb-role-switch;
1329         status = "okay";
1330 
1331         port@0 {
1332                 reg = <0>;
1333 
1334                 typec_hs: endpoint {
1335                         remote-endpoint = <&usb_con_hs>;
1336                 };
1337         };
1338 
1339         port@1 {
1340                 reg = <1>;
1341 
1342                 typec_ss: endpoint {
1343                         remote-endpoint = <&usb_con_ss>;
1344                 };
1345         };
1346 };
1347 
1348 &usb_dwc3_1 {
1349         dr_mode = "host";
1350         status = "okay";
1351         #address-cells = <1>;
1352         #size-cells = <0>;
1353 
1354         /* Microchip USB2642 */
1355         hub@1 {
1356                 compatible = "usb424,2640";
1357                 reg = <1>;
1358                 #address-cells = <1>;
1359                 #size-cells = <0>;
1360 
1361                 mass-storage@1 {
1362                         compatible = "usb424,4041";
1363                         reg = <1>;
1364                 };
1365         };
1366 };
1367 
1368 &usdhc1 {
1369         assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1370         assigned-clock-rates = <400000000>;
1371         pinctrl-names = "default", "state_100mhz", "state_200mhz";
1372         pinctrl-0 = <&pinctrl_usdhc1>;
1373         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1374         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1375         bus-width = <8>;
1376         vmmc-supply = <&reg_vdd_3v3>;
1377         vqmmc-supply = <&reg_vdd_1v8>;
1378         non-removable;
1379         status = "okay";
1380 };
1381 
1382 &usdhc2 {
1383         assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1384         assigned-clock-rates = <200000000>;
1385         pinctrl-names = "default", "state_100mhz", "state_200mhz";
1386         pinctrl-0 = <&pinctrl_usdhc2>;
1387         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1388         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1389         bus-width = <4>;
1390         vmmc-supply = <&reg_wifi_3v3>;
1391         mmc-pwrseq = <&usdhc2_pwrseq>;
1392         post-power-on-delay-ms = <20>;
1393         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1394         max-frequency = <100000000>;
1395         disable-wp;
1396         cap-sdio-irq;
1397         keep-power-in-suspend;
1398         wakeup-source;
1399         status = "okay";
1400 };
1401 
1402 &wdog1 {
1403         pinctrl-names = "default";
1404         pinctrl-0 = <&pinctrl_wdog>;
1405         fsl,ext-reset-output;
1406         status = "okay";
1407 };
1408 
1409 &a53_opp_table {
1410         opp-1000000000 {
1411                 opp-microvolt = <850000>;
1412         };
1413 
1414         opp-1500000000 {
1415                 opp-microvolt = <950000>;
1416         };
1417 };

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