1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2019 Zodiac Inflight Innovations
4 */
5
6 /dts-v1/;
7
8 #include "imx8mq-zii-ultra.dtsi"
9
10 / {
11 model = "ZII Ultra RMB3 Board";
12 compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq";
13
14 sound1 {
15 compatible = "simple-audio-card";
16 simple-audio-card,name = "front";
17 simple-audio-card,format = "i2s";
18 simple-audio-card,bitclock-master = <&sound1_codec>;
19 simple-audio-card,frame-master = <&sound1_codec>;
20 simple-audio-card,widgets =
21 "Headphone", "Headphone Jack Front";
22 simple-audio-card,routing =
23 "Headphone Jack Front", "HPA1 HPLEFT",
24 "Headphone Jack Front", "HPA1 HPRIGHT",
25 "HPA1 LEFTIN", "HPL",
26 "HPA1 RIGHTIN", "HPR";
27 simple-audio-card,aux-devs = <&hpa1>;
28
29 sound1_cpu: simple-audio-card,cpu {
30 sound-dai = <&sai2>;
31 };
32
33 sound1_codec: simple-audio-card,codec {
34 sound-dai = <&codec1>;
35 clocks = <&cs2000>;
36 };
37 };
38
39 sound2 {
40 compatible = "simple-audio-card";
41 simple-audio-card,name = "periph";
42 simple-audio-card,format = "i2s";
43 simple-audio-card,bitclock-master = <&sound2_codec>;
44 simple-audio-card,frame-master = <&sound2_codec>;
45 simple-audio-card,widgets =
46 "Headphone", "Headphone Jack Back";
47 simple-audio-card,routing =
48 "Headphone Jack Back", "HPA1 HPLEFT",
49 "Headphone Jack Back", "HPA1 HPRIGHT",
50 "HPA1 LEFTIN", "HPL",
51 "HPA1 RIGHTIN", "HPR";
52 simple-audio-card,aux-devs = <&hpa2>;
53
54 sound2_cpu: simple-audio-card,cpu {
55 sound-dai = <&sai3>;
56 };
57
58 sound2_codec: simple-audio-card,codec {
59 sound-dai = <&codec2>;
60 clocks = <&cs2000>;
61 };
62 };
63 };
64
65 &ecspi1 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_ecspi1>;
68 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
69 status = "okay";
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 nor_flash: flash@0 {
74 compatible = "st,n25q128a13", "jedec,spi-nor";
75 spi-max-frequency = <20000000>;
76 reg = <0>;
77 };
78 };
79
80 &hpa2 {
81 sound-name-prefix = "HPA1";
82 };
83
84 &i2c1 {
85 codec2: codec@18 {
86 compatible = "ti,tlv320dac3100";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_codec2>;
89 reg = <0x18>;
90 #sound-dai-cells = <0>;
91 HPVDD-supply = <®_gen_3p3>;
92 SPRVDD-supply = <®_gen_3p3>;
93 SPLVDD-supply = <®_gen_3p3>;
94 AVDD-supply = <®_gen_3p3>;
95 IOVDD-supply = <®_gen_3p3>;
96 DVDD-supply = <&vgen4_reg>;
97 reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
98 };
99 };
100
101 &i2c2 {
102 temp-sense@48 {
103 compatible = "national,lm75";
104 reg = <0x48>;
105 };
106 };
107
108 &i2c4 {
109 touchscreen@20 {
110 compatible = "syna,rmi4-i2c";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_ts>;
113 reg = <0x20>;
114 interrupt-parent = <&gpio1>;
115 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
116
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 rmi4-f01@1 {
121 reg = <0x1>;
122 syna,nosleep-mode = <2>;
123 };
124
125 rmi4-f11@11 {
126 reg = <0x11>;
127 touchscreen-inverted-x;
128 touchscreen-swapped-x-y;
129 syna,sensor-type = <1>;
130 syna,delta-x-threshold = <5>;
131 syna,delta-y-threshold = <10>;
132 };
133
134 rmi4-f12@12 {
135 reg = <0x12>;
136 touchscreen-inverted-x;
137 touchscreen-swapped-x-y;
138 syna,sensor-type = <1>;
139 };
140 };
141
142 touchscreen@2a {
143 compatible = "eeti,exc3000";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_ts>;
146 reg = <0x2a>;
147 interrupt-parent = <&gpio1>;
148 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
149 touchscreen-inverted-x;
150 touchscreen-swapped-x-y;
151 status = "disabled";
152 };
153 };
154
155 &sai3 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_sai3>;
158 status = "okay";
159 };
160
161 &usbhub {
162 swap-dx-lanes = <0>;
163 };
164
165 &iomuxc {
166 pinctrl_codec2: dac2grp {
167 fsl,pins = <
168 MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x41
169 >;
170 };
171
172 pinctrl_ecspi1: ecspi1grp {
173 fsl,pins = <
174 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
175 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
176 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
177 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
178 >;
179 };
180
181 pinctrl_sai3: sai3grp {
182 fsl,pins = <
183 MX8MQ_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
184 MX8MQ_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
185 MX8MQ_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
186 >;
187 };
188 };
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