1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (C) 2023 Marvell International Ltd.
4 *
5 * Device tree for the AC5X RD Type 7 Com Express carrier board,
6 * Utilizing the CN913x COM Express CPU module board.
7 * This specific carrier board in this mode of operation (external)
8 * only maintains a PCIe link with the CPU module,
9 * which does not require any special DTS definitions.
10 *
11 * AC5X RD works here in external mode (switch selectable at the back of the
12 * board), and connect via an external cable a kit
13 * which would allow it to use an external CN9131 CPU COM Express module,
14 * mounted on top of an interposer kit.
15 *
16 * So in this case, once the switch is set to external mode as explained above,
17 * the AC5X RD becomes part of the carrier solution.
18 *
19 * When the board boots in the external CPU mode, the internal CPU is disabled,
20 * and only the switch portion of the SOC acts as a PCIe end-point, Hence there
21 * is no need to describe this internal (disabled CPU) in the device tree.
22 *
23 * There is no CPU booting in this mode on the carrier, only on the
24 * CN9131 COM Express CPU module.
25 * What runs the Linux is the CN9131 on the COM Express CPU module,
26 * And it accesses the switch end-point on the AC5X RD portion of the carrier
27 * via PCIe.
28 */
29
30 #include "cn9131-db-comexpress.dtsi"
31 #include "ac5x-rd-carrier.dtsi"
32
33 / {
34 model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board with CN9131 CPU module";
35 compatible = "marvell,cn9131-ac5x-carrier", "marvell,rd-ac5x-carrier",
36 "marvell,cn9131-cpu-module", "marvell,cn9131",
37 "marvell,armada-ap807-quad", "marvell,armada-ap807";
38
39 memory@0 {
40 device_type = "memory";
41 reg = <0x0 0x0 0x2 0x00000000>;
42 };
43
44 };
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