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Linux/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi

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  1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2 /*
  3  * Copyright 2019 Google LLC
  4  */
  5 
  6 #include "mt8183-kukui.dtsi"
  7 #include "mt8183-kukui-audio-max98357a.dtsi"
  8 
  9 / {
 10         ppvarn_lcd: ppvarn-lcd {
 11                 compatible = "regulator-fixed";
 12                 regulator-name = "ppvarn_lcd";
 13                 pinctrl-names = "default";
 14                 pinctrl-0 = <&ppvarn_lcd_en>;
 15 
 16                 enable-active-high;
 17 
 18                 gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
 19         };
 20 
 21         ppvarp_lcd: ppvarp-lcd {
 22                 compatible = "regulator-fixed";
 23                 regulator-name = "ppvarp_lcd";
 24                 pinctrl-names = "default";
 25                 pinctrl-0 = <&ppvarp_lcd_en>;
 26 
 27                 enable-active-high;
 28 
 29                 gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
 30         };
 31 
 32         pp1800_lcd: pp1800-lcd {
 33                 compatible = "regulator-fixed";
 34                 regulator-name = "pp1800_lcd";
 35                 pinctrl-names = "default";
 36                 pinctrl-0 = <&pp1800_lcd_en>;
 37 
 38                 enable-active-high;
 39 
 40                 gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
 41         };
 42 };
 43 
 44 &bluetooth {
 45         firmware-name = "nvm_00440302_i2s_eu.bin";
 46 };
 47 
 48 &i2c0 {
 49         status = "okay";
 50 
 51         touchscreen4: touchscreen@5d {
 52                 compatible = "hid-over-i2c";
 53                 reg = <0x5d>;
 54                 pinctrl-names = "default";
 55                 pinctrl-0 = <&open_touch>;
 56 
 57                 interrupts-extended = <&pio 155 IRQ_TYPE_EDGE_FALLING>;
 58 
 59                 post-power-on-delay-ms = <10>;
 60                 hid-descr-addr = <0x0001>;
 61         };
 62 };
 63 
 64 &mt6358_vcama2_reg {
 65         regulator-min-microvolt = <2800000>;
 66         regulator-max-microvolt = <2800000>;
 67 };
 68 
 69 &i2c2 {
 70         pinctrl-names = "default";
 71         pinctrl-0 = <&i2c2_pins>;
 72         status = "okay";
 73         clock-frequency = <400000>;
 74         vbus-supply = <&mt6358_vcamio_reg>;
 75 
 76         eeprom@58 {
 77                 compatible = "atmel,24c32";
 78                 reg = <0x58>;
 79                 pagesize = <32>;
 80                 vcc-supply = <&mt6358_vcama2_reg>;
 81         };
 82 };
 83 
 84 &i2c4 {
 85         pinctrl-names = "default";
 86         pinctrl-0 = <&i2c4_pins>;
 87         status = "okay";
 88         clock-frequency = <400000>;
 89         vbus-supply = <&mt6358_vcn18_reg>;
 90 
 91         eeprom@54 {
 92                 compatible = "atmel,24c32";
 93                 reg = <0x54>;
 94                 pagesize = <32>;
 95                 vcc-supply = <&mt6358_vcn18_reg>;
 96         };
 97 };
 98 
 99 &pio {
100         /* 192 lines */
101         gpio-line-names =
102                 "SPI_AP_EC_CS_L",
103                 "SPI_AP_EC_MOSI",
104                 "SPI_AP_EC_CLK",
105                 "I2S3_DO",
106                 "USB_PD_INT_ODL",
107                 "",
108                 "",
109                 "",
110                 "",
111                 "IT6505_HPD_L",
112                 "I2S3_TDM_D3",
113                 "SOC_I2C6_1V8_SCL",
114                 "SOC_I2C6_1V8_SDA",
115                 "DPI_D0",
116                 "DPI_D1",
117                 "DPI_D2",
118                 "DPI_D3",
119                 "DPI_D4",
120                 "DPI_D5",
121                 "DPI_D6",
122                 "DPI_D7",
123                 "DPI_D8",
124                 "DPI_D9",
125                 "DPI_D10",
126                 "DPI_D11",
127                 "DPI_HSYNC",
128                 "DPI_VSYNC",
129                 "DPI_DE",
130                 "DPI_CK",
131                 "AP_MSDC1_CLK",
132                 "AP_MSDC1_DAT3",
133                 "AP_MSDC1_CMD",
134                 "AP_MSDC1_DAT0",
135                 "AP_MSDC1_DAT2",
136                 "AP_MSDC1_DAT1",
137                 "",
138                 "",
139                 "",
140                 "",
141                 "",
142                 "",
143                 "OTG_EN",
144                 "DRVBUS",
145                 "DISP_PWM",
146                 "DSI_TE",
147                 "LCM_RST_1V8",
148                 "AP_CTS_WIFI_RTS",
149                 "AP_RTS_WIFI_CTS",
150                 "SOC_I2C5_1V8_SCL",
151                 "SOC_I2C5_1V8_SDA",
152                 "SOC_I2C3_1V8_SCL",
153                 "SOC_I2C3_1V8_SDA",
154                 "",
155                 "",
156                 "",
157                 "",
158                 "",
159                 "",
160                 "",
161                 "",
162                 "",
163                 "",
164                 "",
165                 "",
166                 "",
167                 "",
168                 "",
169                 "",
170                 "",
171                 "",
172                 "",
173                 "",
174                 "",
175                 "",
176                 "",
177                 "",
178                 "",
179                 "",
180                 "",
181                 "",
182                 "",
183                 "SOC_I2C1_1V8_SDA",
184                 "SOC_I2C0_1V8_SDA",
185                 "SOC_I2C0_1V8_SCL",
186                 "SOC_I2C1_1V8_SCL",
187                 "AP_SPI_H1_MISO",
188                 "AP_SPI_H1_CS_L",
189                 "AP_SPI_H1_MOSI",
190                 "AP_SPI_H1_CLK",
191                 "I2S5_BCK",
192                 "I2S5_LRCK",
193                 "I2S5_DO",
194                 "BOOTBLOCK_EN_L",
195                 "MT8183_KPCOL0",
196                 "SPI_AP_EC_MISO",
197                 "UART_DBG_TX_AP_RX",
198                 "UART_AP_TX_DBG_RX",
199                 "I2S2_MCK",
200                 "I2S2_BCK",
201                 "CLK_5M_WCAM",
202                 "CLK_2M_UCAM",
203                 "I2S2_LRCK",
204                 "I2S2_DI",
205                 "SOC_I2C2_1V8_SCL",
206                 "SOC_I2C2_1V8_SDA",
207                 "SOC_I2C4_1V8_SCL",
208                 "SOC_I2C4_1V8_SDA",
209                 "",
210                 "SCL8",
211                 "SDA8",
212                 "FCAM_PWDN_L",
213                 "",
214                 "",
215                 "",
216                 "",
217                 "",
218                 "",
219                 "",
220                 "",
221                 "",
222                 "",
223                 "",
224                 "",
225                 "",
226                 "",
227                 "",
228                 "",
229                 "",
230                 "",
231                 "",
232                 "",
233                 "",
234                 "",
235                 "",
236                 "",
237                 "",
238                 "I2S_PMIC",
239                 "I2S_PMIC",
240                 "I2S_PMIC",
241                 "I2S_PMIC",
242                 "I2S_PMIC",
243                 "I2S_PMIC",
244                 "I2S_PMIC",
245                 "I2S_PMIC",
246                 "",
247                 "",
248                 "",
249                 "",
250                 "",
251                 "",
252                 /*
253                  * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
254                  * call it BIOS_FLASH_WP_R_L.
255                  */
256                 "AP_FLASH_WP_L",
257                 "EC_AP_INT_ODL",
258                 "IT6505_INT_ODL",
259                 "H1_INT_OD_L",
260                 "",
261                 "",
262                 "",
263                 "",
264                 "",
265                 "",
266                 "",
267                 "AP_SPI_FLASH_MISO",
268                 "AP_SPI_FLASH_CS_L",
269                 "AP_SPI_FLASH_MOSI",
270                 "AP_SPI_FLASH_CLK",
271                 "DA7219_IRQ",
272                 "",
273                 "",
274                 "",
275                 "",
276                 "",
277                 "",
278                 "",
279                 "",
280                 "",
281                 "",
282                 "",
283                 "",
284                 "",
285                 "",
286                 "",
287                 "",
288                 "",
289                 "",
290                 "",
291                 "",
292                 "",
293                 "",
294                 "",
295                 "",
296                 "",
297                 "";
298 
299         ppvarp_lcd_en: ppvarp-lcd-en {
300                 pins1 {
301                         pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
302                         output-low;
303                 };
304         };
305 
306         ppvarn_lcd_en: ppvarn-lcd-en {
307                 pins1 {
308                         pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
309                         output-low;
310                 };
311         };
312 
313         pp1800_lcd_en: pp1800-lcd-en {
314                 pins1 {
315                         pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
316                         output-low;
317                 };
318         };
319 
320         open_touch: open_touch {
321                 irq_pin {
322                         pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
323                         input-enable;
324                         bias-pull-up;
325                 };
326 
327                 rst_pin {
328                         pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
329 
330                         /*
331                          * The pen driver doesn't currently support  driving
332                          * this reset line.  By specifying output-high here
333                          * we're relying on the fact that this pin has a default
334                          * pulldown at boot (which makes sure the pen was in
335                          * reset if it was powered) and then we set it high here
336                          * to take it out of reset.  Better would be if the pen
337                          * driver could control this and we could remove
338                          * "output-high" here.
339                          */
340                         output-high;
341                 };
342         };
343 };
344 
345 &cros_ec {
346         cbas {
347                 compatible = "google,cros-cbas";
348         };
349 
350         keyboard-controller {
351                 compatible = "google,cros-ec-keyb-switches";
352         };
353 };
354 
355 &qca_wifi {
356         qcom,ath10k-calibration-variant = "LE_Krane";
357 };
358 
359 &sound {
360         compatible = "mediatek,mt8183_mt6358_ts3a227_max98357";
361 };

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