1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6
7 #include "tegra194-p2888.dtsi"
8
9 / {
10 model = "NVIDIA Jetson AGX Xavier Developer Kit";
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
12
13 bus@0 {
14 aconnect@2900000 {
15 status = "okay";
16
17 ahub@2900800 {
18 status = "okay";
19
20 i2s@2901000 {
21 status = "okay";
22
23 ports {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 port@0 {
28 reg = <0>;
29
30 i2s1_cif_ep: endpoint {
31 remote-endpoint = <&xbar_i2s1_ep>;
32 };
33 };
34
35 i2s1_port: port@1 {
36 reg = <1>;
37
38 i2s1_dap_ep: endpoint {
39 dai-format = "i2s";
40 remote-endpoint = <&rt5658_ep>;
41 };
42 };
43 };
44 };
45
46 i2s@2901100 {
47 status = "okay";
48
49 ports {
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 port@0 {
54 reg = <0>;
55
56 i2s2_cif_ep: endpoint {
57 remote-endpoint = <&xbar_i2s2_ep>;
58 };
59 };
60
61 i2s2_port: port@1 {
62 reg = <1>;
63
64 i2s2_dap_ep: endpoint {
65 dai-format = "i2s";
66 /* Place holder for external Codec */
67 };
68 };
69 };
70 };
71
72 i2s@2901300 {
73 status = "okay";
74
75 ports {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 port@0 {
80 reg = <0>;
81
82 i2s4_cif_ep: endpoint {
83 remote-endpoint = <&xbar_i2s4_ep>;
84 };
85 };
86
87 i2s4_port: port@1 {
88 reg = <1>;
89
90 i2s4_dap_ep: endpoint {
91 dai-format = "i2s";
92 /* Place holder for external Codec */
93 };
94 };
95 };
96 };
97
98 i2s@2901500 {
99 status = "okay";
100
101 ports {
102 #address-cells = <1>;
103 #size-cells = <0>;
104
105 port@0 {
106 reg = <0>;
107
108 i2s6_cif_ep: endpoint {
109 remote-endpoint = <&xbar_i2s6_ep>;
110 };
111 };
112
113 i2s6_port: port@1 {
114 reg = <1>;
115
116 i2s6_dap_ep: endpoint {
117 dai-format = "i2s";
118 /* Place holder for external Codec */
119 };
120 };
121 };
122 };
123
124 sfc@2902000 {
125 status = "okay";
126
127 ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 port@0 {
132 reg = <0>;
133
134 sfc1_cif_in_ep: endpoint {
135 remote-endpoint = <&xbar_sfc1_in_ep>;
136 };
137 };
138
139 sfc1_out_port: port@1 {
140 reg = <1>;
141
142 sfc1_cif_out_ep: endpoint {
143 remote-endpoint = <&xbar_sfc1_out_ep>;
144 };
145 };
146 };
147 };
148
149 sfc@2902200 {
150 status = "okay";
151
152 ports {
153 #address-cells = <1>;
154 #size-cells = <0>;
155
156 port@0 {
157 reg = <0>;
158
159 sfc2_cif_in_ep: endpoint {
160 remote-endpoint = <&xbar_sfc2_in_ep>;
161 };
162 };
163
164 sfc2_out_port: port@1 {
165 reg = <1>;
166
167 sfc2_cif_out_ep: endpoint {
168 remote-endpoint = <&xbar_sfc2_out_ep>;
169 };
170 };
171 };
172 };
173
174 sfc@2902400 {
175 status = "okay";
176
177 ports {
178 #address-cells = <1>;
179 #size-cells = <0>;
180
181 port@0 {
182 reg = <0>;
183
184 sfc3_cif_in_ep: endpoint {
185 remote-endpoint = <&xbar_sfc3_in_ep>;
186 };
187 };
188
189 sfc3_out_port: port@1 {
190 reg = <1>;
191
192 sfc3_cif_out_ep: endpoint {
193 remote-endpoint = <&xbar_sfc3_out_ep>;
194 };
195 };
196 };
197 };
198
199 sfc@2902600 {
200 status = "okay";
201
202 ports {
203 #address-cells = <1>;
204 #size-cells = <0>;
205
206 port@0 {
207 reg = <0>;
208
209 sfc4_cif_in_ep: endpoint {
210 remote-endpoint = <&xbar_sfc4_in_ep>;
211 };
212 };
213
214 sfc4_out_port: port@1 {
215 reg = <1>;
216
217 sfc4_cif_out_ep: endpoint {
218 remote-endpoint = <&xbar_sfc4_out_ep>;
219 };
220 };
221 };
222 };
223
224 amx@2903000 {
225 status = "okay";
226
227 ports {
228 #address-cells = <1>;
229 #size-cells = <0>;
230
231 port@0 {
232 reg = <0>;
233
234 amx1_in1_ep: endpoint {
235 remote-endpoint = <&xbar_amx1_in1_ep>;
236 };
237 };
238
239 port@1 {
240 reg = <1>;
241
242 amx1_in2_ep: endpoint {
243 remote-endpoint = <&xbar_amx1_in2_ep>;
244 };
245 };
246
247 port@2 {
248 reg = <2>;
249
250 amx1_in3_ep: endpoint {
251 remote-endpoint = <&xbar_amx1_in3_ep>;
252 };
253 };
254
255 port@3 {
256 reg = <3>;
257
258 amx1_in4_ep: endpoint {
259 remote-endpoint = <&xbar_amx1_in4_ep>;
260 };
261 };
262
263 amx1_out_port: port@4 {
264 reg = <4>;
265
266 amx1_out_ep: endpoint {
267 remote-endpoint = <&xbar_amx1_out_ep>;
268 };
269 };
270 };
271 };
272
273 amx@2903100 {
274 status = "okay";
275
276 ports {
277 #address-cells = <1>;
278 #size-cells = <0>;
279
280 port@0 {
281 reg = <0>;
282
283 amx2_in1_ep: endpoint {
284 remote-endpoint = <&xbar_amx2_in1_ep>;
285 };
286 };
287
288 port@1 {
289 reg = <1>;
290
291 amx2_in2_ep: endpoint {
292 remote-endpoint = <&xbar_amx2_in2_ep>;
293 };
294 };
295
296 amx2_in3_port: port@2 {
297 reg = <2>;
298
299 amx2_in3_ep: endpoint {
300 remote-endpoint = <&xbar_amx2_in3_ep>;
301 };
302 };
303
304 amx2_in4_port: port@3 {
305 reg = <3>;
306
307 amx2_in4_ep: endpoint {
308 remote-endpoint = <&xbar_amx2_in4_ep>;
309 };
310 };
311
312 amx2_out_port: port@4 {
313 reg = <4>;
314
315 amx2_out_ep: endpoint {
316 remote-endpoint = <&xbar_amx2_out_ep>;
317 };
318 };
319 };
320 };
321
322 amx@2903200 {
323 status = "okay";
324
325 ports {
326 #address-cells = <1>;
327 #size-cells = <0>;
328
329 port@0 {
330 reg = <0>;
331
332 amx3_in1_ep: endpoint {
333 remote-endpoint = <&xbar_amx3_in1_ep>;
334 };
335 };
336
337 port@1 {
338 reg = <1>;
339
340 amx3_in2_ep: endpoint {
341 remote-endpoint = <&xbar_amx3_in2_ep>;
342 };
343 };
344
345 port@2 {
346 reg = <2>;
347
348 amx3_in3_ep: endpoint {
349 remote-endpoint = <&xbar_amx3_in3_ep>;
350 };
351 };
352
353 port@3 {
354 reg = <3>;
355
356 amx3_in4_ep: endpoint {
357 remote-endpoint = <&xbar_amx3_in4_ep>;
358 };
359 };
360
361 amx3_out_port: port@4 {
362 reg = <4>;
363
364 amx3_out_ep: endpoint {
365 remote-endpoint = <&xbar_amx3_out_ep>;
366 };
367 };
368 };
369 };
370
371 amx@2903300 {
372 status = "okay";
373
374 ports {
375 #address-cells = <1>;
376 #size-cells = <0>;
377
378 port@0 {
379 reg = <0>;
380
381 amx4_in1_ep: endpoint {
382 remote-endpoint = <&xbar_amx4_in1_ep>;
383 };
384 };
385
386 port@1 {
387 reg = <1>;
388
389 amx4_in2_ep: endpoint {
390 remote-endpoint = <&xbar_amx4_in2_ep>;
391 };
392 };
393
394 port@2 {
395 reg = <2>;
396
397 amx4_in3_ep: endpoint {
398 remote-endpoint = <&xbar_amx4_in3_ep>;
399 };
400 };
401
402 port@3 {
403 reg = <3>;
404
405 amx4_in4_ep: endpoint {
406 remote-endpoint = <&xbar_amx4_in4_ep>;
407 };
408 };
409
410 amx4_out_port: port@4 {
411 reg = <4>;
412
413 amx4_out_ep: endpoint {
414 remote-endpoint = <&xbar_amx4_out_ep>;
415 };
416 };
417 };
418 };
419
420 adx@2903800 {
421 status = "okay";
422
423 ports {
424 #address-cells = <1>;
425 #size-cells = <0>;
426
427 port@0 {
428 reg = <0>;
429
430 adx1_in_ep: endpoint {
431 remote-endpoint = <&xbar_adx1_in_ep>;
432 };
433 };
434
435 adx1_out1_port: port@1 {
436 reg = <1>;
437
438 adx1_out1_ep: endpoint {
439 remote-endpoint = <&xbar_adx1_out1_ep>;
440 };
441 };
442
443 adx1_out2_port: port@2 {
444 reg = <2>;
445
446 adx1_out2_ep: endpoint {
447 remote-endpoint = <&xbar_adx1_out2_ep>;
448 };
449 };
450
451 adx1_out3_port: port@3 {
452 reg = <3>;
453
454 adx1_out3_ep: endpoint {
455 remote-endpoint = <&xbar_adx1_out3_ep>;
456 };
457 };
458
459 adx1_out4_port: port@4 {
460 reg = <4>;
461
462 adx1_out4_ep: endpoint {
463 remote-endpoint = <&xbar_adx1_out4_ep>;
464 };
465 };
466 };
467 };
468
469 adx@2903900 {
470 status = "okay";
471
472 ports {
473 #address-cells = <1>;
474 #size-cells = <0>;
475
476 port@0 {
477 reg = <0>;
478
479 adx2_in_ep: endpoint {
480 remote-endpoint = <&xbar_adx2_in_ep>;
481 };
482 };
483
484 adx2_out1_port: port@1 {
485 reg = <1>;
486
487 adx2_out1_ep: endpoint {
488 remote-endpoint = <&xbar_adx2_out1_ep>;
489 };
490 };
491
492 adx2_out2_port: port@2 {
493 reg = <2>;
494
495 adx2_out2_ep: endpoint {
496 remote-endpoint = <&xbar_adx2_out2_ep>;
497 };
498 };
499
500 adx2_out3_port: port@3 {
501 reg = <3>;
502
503 adx2_out3_ep: endpoint {
504 remote-endpoint = <&xbar_adx2_out3_ep>;
505 };
506 };
507
508 adx2_out4_port: port@4 {
509 reg = <4>;
510
511 adx2_out4_ep: endpoint {
512 remote-endpoint = <&xbar_adx2_out4_ep>;
513 };
514 };
515 };
516 };
517
518 adx@2903a00 {
519 status = "okay";
520
521 ports {
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 port@0 {
526 reg = <0>;
527
528 adx3_in_ep: endpoint {
529 remote-endpoint = <&xbar_adx3_in_ep>;
530 };
531 };
532
533 adx3_out1_port: port@1 {
534 reg = <1>;
535
536 adx3_out1_ep: endpoint {
537 remote-endpoint = <&xbar_adx3_out1_ep>;
538 };
539 };
540
541 adx3_out2_port: port@2 {
542 reg = <2>;
543
544 adx3_out2_ep: endpoint {
545 remote-endpoint = <&xbar_adx3_out2_ep>;
546 };
547 };
548
549 adx3_out3_port: port@3 {
550 reg = <3>;
551
552 adx3_out3_ep: endpoint {
553 remote-endpoint = <&xbar_adx3_out3_ep>;
554 };
555 };
556
557 adx3_out4_port: port@4 {
558 reg = <4>;
559
560 adx3_out4_ep: endpoint {
561 remote-endpoint = <&xbar_adx3_out4_ep>;
562 };
563 };
564 };
565 };
566
567 adx@2903b00 {
568 status = "okay";
569
570 ports {
571 #address-cells = <1>;
572 #size-cells = <0>;
573
574 port@0 {
575 reg = <0>;
576
577 adx4_in_ep: endpoint {
578 remote-endpoint = <&xbar_adx4_in_ep>;
579 };
580 };
581
582 adx4_out1_port: port@1 {
583 reg = <1>;
584
585 adx4_out1_ep: endpoint {
586 remote-endpoint = <&xbar_adx4_out1_ep>;
587 };
588 };
589
590 adx4_out2_port: port@2 {
591 reg = <2>;
592
593 adx4_out2_ep: endpoint {
594 remote-endpoint = <&xbar_adx4_out2_ep>;
595 };
596 };
597
598 adx4_out3_port: port@3 {
599 reg = <3>;
600
601 adx4_out3_ep: endpoint {
602 remote-endpoint = <&xbar_adx4_out3_ep>;
603 };
604 };
605
606 adx4_out4_port: port@4 {
607 reg = <4>;
608
609 adx4_out4_ep: endpoint {
610 remote-endpoint = <&xbar_adx4_out4_ep>;
611 };
612 };
613 };
614 };
615
616 dmic@2904200 {
617 status = "okay";
618
619 ports {
620 #address-cells = <1>;
621 #size-cells = <0>;
622
623 port@0 {
624 reg = <0>;
625
626 dmic3_cif_ep: endpoint {
627 remote-endpoint = <&xbar_dmic3_ep>;
628 };
629 };
630
631 dmic3_port: port@1 {
632 reg = <1>;
633
634 dmic3_dap_ep: endpoint {
635 /* Place holder for external Codec */
636 };
637 };
638 };
639 };
640
641 processing-engine@2908000 {
642 status = "okay";
643
644 ports {
645 #address-cells = <1>;
646 #size-cells = <0>;
647
648 port@0 {
649 reg = <0x0>;
650
651 ope1_cif_in_ep: endpoint {
652 remote-endpoint = <&xbar_ope1_in_ep>;
653 };
654 };
655
656 ope1_out_port: port@1 {
657 reg = <0x1>;
658
659 ope1_cif_out_ep: endpoint {
660 remote-endpoint = <&xbar_ope1_out_ep>;
661 };
662 };
663 };
664 };
665
666 mvc@290a000 {
667 status = "okay";
668
669 ports {
670 #address-cells = <1>;
671 #size-cells = <0>;
672
673 port@0 {
674 reg = <0>;
675
676 mvc1_cif_in_ep: endpoint {
677 remote-endpoint = <&xbar_mvc1_in_ep>;
678 };
679 };
680
681 mvc1_out_port: port@1 {
682 reg = <1>;
683
684 mvc1_cif_out_ep: endpoint {
685 remote-endpoint = <&xbar_mvc1_out_ep>;
686 };
687 };
688 };
689 };
690
691 mvc@290a200 {
692 status = "okay";
693
694 ports {
695 #address-cells = <1>;
696 #size-cells = <0>;
697
698 port@0 {
699 reg = <0>;
700
701 mvc2_cif_in_ep: endpoint {
702 remote-endpoint = <&xbar_mvc2_in_ep>;
703 };
704 };
705
706 mvc2_out_port: port@1 {
707 reg = <1>;
708
709 mvc2_cif_out_ep: endpoint {
710 remote-endpoint = <&xbar_mvc2_out_ep>;
711 };
712 };
713 };
714 };
715
716 amixer@290bb00 {
717 status = "okay";
718
719 ports {
720 #address-cells = <1>;
721 #size-cells = <0>;
722
723 port@0 {
724 reg = <0x0>;
725
726 mixer_in1_ep: endpoint {
727 remote-endpoint = <&xbar_mixer_in1_ep>;
728 };
729 };
730
731 port@1 {
732 reg = <0x1>;
733
734 mixer_in2_ep: endpoint {
735 remote-endpoint = <&xbar_mixer_in2_ep>;
736 };
737 };
738
739 port@2 {
740 reg = <0x2>;
741
742 mixer_in3_ep: endpoint {
743 remote-endpoint = <&xbar_mixer_in3_ep>;
744 };
745 };
746
747 port@3 {
748 reg = <0x3>;
749
750 mixer_in4_ep: endpoint {
751 remote-endpoint = <&xbar_mixer_in4_ep>;
752 };
753 };
754
755 port@4 {
756 reg = <0x4>;
757
758 mixer_in5_ep: endpoint {
759 remote-endpoint = <&xbar_mixer_in5_ep>;
760 };
761 };
762
763 port@5 {
764 reg = <0x5>;
765
766 mixer_in6_ep: endpoint {
767 remote-endpoint = <&xbar_mixer_in6_ep>;
768 };
769 };
770
771 port@6 {
772 reg = <0x6>;
773
774 mixer_in7_ep: endpoint {
775 remote-endpoint = <&xbar_mixer_in7_ep>;
776 };
777 };
778
779 port@7 {
780 reg = <0x7>;
781
782 mixer_in8_ep: endpoint {
783 remote-endpoint = <&xbar_mixer_in8_ep>;
784 };
785 };
786
787 port@8 {
788 reg = <0x8>;
789
790 mixer_in9_ep: endpoint {
791 remote-endpoint = <&xbar_mixer_in9_ep>;
792 };
793 };
794
795 port@9 {
796 reg = <0x9>;
797
798 mixer_in10_ep: endpoint {
799 remote-endpoint = <&xbar_mixer_in10_ep>;
800 };
801 };
802
803 mixer_out1_port: port@a {
804 reg = <0xa>;
805
806 mixer_out1_ep: endpoint {
807 remote-endpoint = <&xbar_mixer_out1_ep>;
808 };
809 };
810
811 mixer_out2_port: port@b {
812 reg = <0xb>;
813
814 mixer_out2_ep: endpoint {
815 remote-endpoint = <&xbar_mixer_out2_ep>;
816 };
817 };
818
819 mixer_out3_port: port@c {
820 reg = <0xc>;
821
822 mixer_out3_ep: endpoint {
823 remote-endpoint = <&xbar_mixer_out3_ep>;
824 };
825 };
826
827 mixer_out4_port: port@d {
828 reg = <0xd>;
829
830 mixer_out4_ep: endpoint {
831 remote-endpoint = <&xbar_mixer_out4_ep>;
832 };
833 };
834
835 mixer_out5_port: port@e {
836 reg = <0xe>;
837
838 mixer_out5_ep: endpoint {
839 remote-endpoint = <&xbar_mixer_out5_ep>;
840 };
841 };
842 };
843 };
844
845 admaif@290f000 {
846 status = "okay";
847
848 ports {
849 #address-cells = <1>;
850 #size-cells = <0>;
851
852 admaif0_port: port@0 {
853 reg = <0x0>;
854
855 admaif0_ep: endpoint {
856 remote-endpoint = <&xbar_admaif0_ep>;
857 };
858 };
859
860 admaif1_port: port@1 {
861 reg = <0x1>;
862
863 admaif1_ep: endpoint {
864 remote-endpoint = <&xbar_admaif1_ep>;
865 };
866 };
867
868 admaif2_port: port@2 {
869 reg = <0x2>;
870
871 admaif2_ep: endpoint {
872 remote-endpoint = <&xbar_admaif2_ep>;
873 };
874 };
875
876 admaif3_port: port@3 {
877 reg = <0x3>;
878
879 admaif3_ep: endpoint {
880 remote-endpoint = <&xbar_admaif3_ep>;
881 };
882 };
883
884 admaif4_port: port@4 {
885 reg = <0x4>;
886
887 admaif4_ep: endpoint {
888 remote-endpoint = <&xbar_admaif4_ep>;
889 };
890 };
891
892 admaif5_port: port@5 {
893 reg = <0x5>;
894
895 admaif5_ep: endpoint {
896 remote-endpoint = <&xbar_admaif5_ep>;
897 };
898 };
899
900 admaif6_port: port@6 {
901 reg = <0x6>;
902
903 admaif6_ep: endpoint {
904 remote-endpoint = <&xbar_admaif6_ep>;
905 };
906 };
907
908 admaif7_port: port@7 {
909 reg = <0x7>;
910
911 admaif7_ep: endpoint {
912 remote-endpoint = <&xbar_admaif7_ep>;
913 };
914 };
915
916 admaif8_port: port@8 {
917 reg = <0x8>;
918
919 admaif8_ep: endpoint {
920 remote-endpoint = <&xbar_admaif8_ep>;
921 };
922 };
923
924 admaif9_port: port@9 {
925 reg = <0x9>;
926
927 admaif9_ep: endpoint {
928 remote-endpoint = <&xbar_admaif9_ep>;
929 };
930 };
931
932 admaif10_port: port@a {
933 reg = <0xa>;
934
935 admaif10_ep: endpoint {
936 remote-endpoint = <&xbar_admaif10_ep>;
937 };
938 };
939
940 admaif11_port: port@b {
941 reg = <0xb>;
942
943 admaif11_ep: endpoint {
944 remote-endpoint = <&xbar_admaif11_ep>;
945 };
946 };
947
948 admaif12_port: port@c {
949 reg = <0xc>;
950
951 admaif12_ep: endpoint {
952 remote-endpoint = <&xbar_admaif12_ep>;
953 };
954 };
955
956 admaif13_port: port@d {
957 reg = <0xd>;
958
959 admaif13_ep: endpoint {
960 remote-endpoint = <&xbar_admaif13_ep>;
961 };
962 };
963
964 admaif14_port: port@e {
965 reg = <0xe>;
966
967 admaif14_ep: endpoint {
968 remote-endpoint = <&xbar_admaif14_ep>;
969 };
970 };
971
972 admaif15_port: port@f {
973 reg = <0xf>;
974
975 admaif15_ep: endpoint {
976 remote-endpoint = <&xbar_admaif15_ep>;
977 };
978 };
979
980 admaif16_port: port@10 {
981 reg = <0x10>;
982
983 admaif16_ep: endpoint {
984 remote-endpoint = <&xbar_admaif16_ep>;
985 };
986 };
987
988 admaif17_port: port@11 {
989 reg = <0x11>;
990
991 admaif17_ep: endpoint {
992 remote-endpoint = <&xbar_admaif17_ep>;
993 };
994 };
995
996 admaif18_port: port@12 {
997 reg = <0x12>;
998
999 admaif18_ep: endpoint {
1000 remote-endpoint = <&xbar_admaif18_ep>;
1001 };
1002 };
1003
1004 admaif19_port: port@13 {
1005 reg = <0x13>;
1006
1007 admaif19_ep: endpoint {
1008 remote-endpoint = <&xbar_admaif19_ep>;
1009 };
1010 };
1011 };
1012 };
1013
1014 asrc@2910000 {
1015 status = "okay";
1016
1017 ports {
1018 #address-cells = <1>;
1019 #size-cells = <0>;
1020
1021 port@0 {
1022 reg = <0x0>;
1023
1024 asrc_in1_ep: endpoint {
1025 remote-endpoint = <&xbar_asrc_in1_ep>;
1026 };
1027 };
1028
1029 port@1 {
1030 reg = <0x1>;
1031
1032 asrc_in2_ep: endpoint {
1033 remote-endpoint = <&xbar_asrc_in2_ep>;
1034 };
1035 };
1036
1037 port@2 {
1038 reg = <0x2>;
1039
1040 asrc_in3_ep: endpoint {
1041 remote-endpoint = <&xbar_asrc_in3_ep>;
1042 };
1043 };
1044
1045 port@3 {
1046 reg = <0x3>;
1047
1048 asrc_in4_ep: endpoint {
1049 remote-endpoint = <&xbar_asrc_in4_ep>;
1050 };
1051 };
1052
1053 port@4 {
1054 reg = <0x4>;
1055
1056 asrc_in5_ep: endpoint {
1057 remote-endpoint = <&xbar_asrc_in5_ep>;
1058 };
1059 };
1060
1061 port@5 {
1062 reg = <0x5>;
1063
1064 asrc_in6_ep: endpoint {
1065 remote-endpoint = <&xbar_asrc_in6_ep>;
1066 };
1067 };
1068
1069 port@6 {
1070 reg = <0x6>;
1071
1072 asrc_in7_ep: endpoint {
1073 remote-endpoint = <&xbar_asrc_in7_ep>;
1074 };
1075 };
1076
1077 asrc_out1_port: port@7 {
1078 reg = <0x7>;
1079
1080 asrc_out1_ep: endpoint {
1081 remote-endpoint = <&xbar_asrc_out1_ep>;
1082 };
1083 };
1084
1085 asrc_out2_port: port@8 {
1086 reg = <0x8>;
1087
1088 asrc_out2_ep: endpoint {
1089 remote-endpoint = <&xbar_asrc_out2_ep>;
1090 };
1091 };
1092
1093 asrc_out3_port: port@9 {
1094 reg = <0x9>;
1095
1096 asrc_out3_ep: endpoint {
1097 remote-endpoint = <&xbar_asrc_out3_ep>;
1098 };
1099 };
1100
1101 asrc_out4_port: port@a {
1102 reg = <0xa>;
1103
1104 asrc_out4_ep: endpoint {
1105 remote-endpoint = <&xbar_asrc_out4_ep>;
1106 };
1107 };
1108
1109 asrc_out5_port: port@b {
1110 reg = <0xb>;
1111
1112 asrc_out5_ep: endpoint {
1113 remote-endpoint = <&xbar_asrc_out5_ep>;
1114 };
1115 };
1116
1117 asrc_out6_port: port@c {
1118 reg = <0xc>;
1119
1120 asrc_out6_ep: endpoint {
1121 remote-endpoint = <&xbar_asrc_out6_ep>;
1122 };
1123 };
1124 };
1125 };
1126
1127 ports {
1128 #address-cells = <1>;
1129 #size-cells = <0>;
1130
1131 port@0 {
1132 reg = <0x0>;
1133
1134 xbar_admaif0_ep: endpoint {
1135 remote-endpoint = <&admaif0_ep>;
1136 };
1137 };
1138
1139 port@1 {
1140 reg = <0x1>;
1141
1142 xbar_admaif1_ep: endpoint {
1143 remote-endpoint = <&admaif1_ep>;
1144 };
1145 };
1146
1147 port@2 {
1148 reg = <0x2>;
1149
1150 xbar_admaif2_ep: endpoint {
1151 remote-endpoint = <&admaif2_ep>;
1152 };
1153 };
1154
1155 port@3 {
1156 reg = <0x3>;
1157
1158 xbar_admaif3_ep: endpoint {
1159 remote-endpoint = <&admaif3_ep>;
1160 };
1161 };
1162
1163 port@4 {
1164 reg = <0x4>;
1165
1166 xbar_admaif4_ep: endpoint {
1167 remote-endpoint = <&admaif4_ep>;
1168 };
1169 };
1170
1171 port@5 {
1172 reg = <0x5>;
1173
1174 xbar_admaif5_ep: endpoint {
1175 remote-endpoint = <&admaif5_ep>;
1176 };
1177 };
1178
1179 port@6 {
1180 reg = <0x6>;
1181
1182 xbar_admaif6_ep: endpoint {
1183 remote-endpoint = <&admaif6_ep>;
1184 };
1185 };
1186
1187 port@7 {
1188 reg = <0x7>;
1189
1190 xbar_admaif7_ep: endpoint {
1191 remote-endpoint = <&admaif7_ep>;
1192 };
1193 };
1194
1195 port@8 {
1196 reg = <0x8>;
1197
1198 xbar_admaif8_ep: endpoint {
1199 remote-endpoint = <&admaif8_ep>;
1200 };
1201 };
1202
1203 port@9 {
1204 reg = <0x9>;
1205
1206 xbar_admaif9_ep: endpoint {
1207 remote-endpoint = <&admaif9_ep>;
1208 };
1209 };
1210
1211 port@a {
1212 reg = <0xa>;
1213
1214 xbar_admaif10_ep: endpoint {
1215 remote-endpoint = <&admaif10_ep>;
1216 };
1217 };
1218
1219 port@b {
1220 reg = <0xb>;
1221
1222 xbar_admaif11_ep: endpoint {
1223 remote-endpoint = <&admaif11_ep>;
1224 };
1225 };
1226
1227 port@c {
1228 reg = <0xc>;
1229
1230 xbar_admaif12_ep: endpoint {
1231 remote-endpoint = <&admaif12_ep>;
1232 };
1233 };
1234
1235 port@d {
1236 reg = <0xd>;
1237
1238 xbar_admaif13_ep: endpoint {
1239 remote-endpoint = <&admaif13_ep>;
1240 };
1241 };
1242
1243 port@e {
1244 reg = <0xe>;
1245
1246 xbar_admaif14_ep: endpoint {
1247 remote-endpoint = <&admaif14_ep>;
1248 };
1249 };
1250
1251 port@f {
1252 reg = <0xf>;
1253
1254 xbar_admaif15_ep: endpoint {
1255 remote-endpoint = <&admaif15_ep>;
1256 };
1257 };
1258
1259 port@10 {
1260 reg = <0x10>;
1261
1262 xbar_admaif16_ep: endpoint {
1263 remote-endpoint = <&admaif16_ep>;
1264 };
1265 };
1266
1267 port@11 {
1268 reg = <0x11>;
1269
1270 xbar_admaif17_ep: endpoint {
1271 remote-endpoint = <&admaif17_ep>;
1272 };
1273 };
1274
1275 port@12 {
1276 reg = <0x12>;
1277
1278 xbar_admaif18_ep: endpoint {
1279 remote-endpoint = <&admaif18_ep>;
1280 };
1281 };
1282
1283 port@13 {
1284 reg = <0x13>;
1285
1286 xbar_admaif19_ep: endpoint {
1287 remote-endpoint = <&admaif19_ep>;
1288 };
1289 };
1290
1291 xbar_i2s1_port: port@14 {
1292 reg = <0x14>;
1293
1294 xbar_i2s1_ep: endpoint {
1295 remote-endpoint = <&i2s1_cif_ep>;
1296 };
1297 };
1298
1299 xbar_i2s2_port: port@15 {
1300 reg = <0x15>;
1301
1302 xbar_i2s2_ep: endpoint {
1303 remote-endpoint = <&i2s2_cif_ep>;
1304 };
1305 };
1306
1307 xbar_i2s4_port: port@17 {
1308 reg = <0x17>;
1309
1310 xbar_i2s4_ep: endpoint {
1311 remote-endpoint = <&i2s4_cif_ep>;
1312 };
1313 };
1314
1315 xbar_i2s6_port: port@19 {
1316 reg = <0x19>;
1317
1318 xbar_i2s6_ep: endpoint {
1319 remote-endpoint = <&i2s6_cif_ep>;
1320 };
1321 };
1322
1323 xbar_dmic3_port: port@1c {
1324 reg = <0x1c>;
1325
1326 xbar_dmic3_ep: endpoint {
1327 remote-endpoint = <&dmic3_cif_ep>;
1328 };
1329 };
1330
1331 xbar_sfc1_in_port: port@20 {
1332 reg = <0x20>;
1333
1334 xbar_sfc1_in_ep: endpoint {
1335 remote-endpoint = <&sfc1_cif_in_ep>;
1336 };
1337 };
1338
1339 port@21 {
1340 reg = <0x21>;
1341
1342 xbar_sfc1_out_ep: endpoint {
1343 remote-endpoint = <&sfc1_cif_out_ep>;
1344 };
1345 };
1346
1347 xbar_sfc2_in_port: port@22 {
1348 reg = <0x22>;
1349
1350 xbar_sfc2_in_ep: endpoint {
1351 remote-endpoint = <&sfc2_cif_in_ep>;
1352 };
1353 };
1354
1355 port@23 {
1356 reg = <0x23>;
1357
1358 xbar_sfc2_out_ep: endpoint {
1359 remote-endpoint = <&sfc2_cif_out_ep>;
1360 };
1361 };
1362
1363 xbar_sfc3_in_port: port@24 {
1364 reg = <0x24>;
1365
1366 xbar_sfc3_in_ep: endpoint {
1367 remote-endpoint = <&sfc3_cif_in_ep>;
1368 };
1369 };
1370
1371 port@25 {
1372 reg = <0x25>;
1373
1374 xbar_sfc3_out_ep: endpoint {
1375 remote-endpoint = <&sfc3_cif_out_ep>;
1376 };
1377 };
1378
1379 xbar_sfc4_in_port: port@26 {
1380 reg = <0x26>;
1381
1382 xbar_sfc4_in_ep: endpoint {
1383 remote-endpoint = <&sfc4_cif_in_ep>;
1384 };
1385 };
1386
1387 port@27 {
1388 reg = <0x27>;
1389
1390 xbar_sfc4_out_ep: endpoint {
1391 remote-endpoint = <&sfc4_cif_out_ep>;
1392 };
1393 };
1394
1395 xbar_mvc1_in_port: port@28 {
1396 reg = <0x28>;
1397
1398 xbar_mvc1_in_ep: endpoint {
1399 remote-endpoint = <&mvc1_cif_in_ep>;
1400 };
1401 };
1402
1403 port@29 {
1404 reg = <0x29>;
1405
1406 xbar_mvc1_out_ep: endpoint {
1407 remote-endpoint = <&mvc1_cif_out_ep>;
1408 };
1409 };
1410
1411 xbar_mvc2_in_port: port@2a {
1412 reg = <0x2a>;
1413
1414 xbar_mvc2_in_ep: endpoint {
1415 remote-endpoint = <&mvc2_cif_in_ep>;
1416 };
1417 };
1418
1419 port@2b {
1420 reg = <0x2b>;
1421
1422 xbar_mvc2_out_ep: endpoint {
1423 remote-endpoint = <&mvc2_cif_out_ep>;
1424 };
1425 };
1426
1427 xbar_amx1_in1_port: port@2c {
1428 reg = <0x2c>;
1429
1430 xbar_amx1_in1_ep: endpoint {
1431 remote-endpoint = <&amx1_in1_ep>;
1432 };
1433 };
1434
1435 xbar_amx1_in2_port: port@2d {
1436 reg = <0x2d>;
1437
1438 xbar_amx1_in2_ep: endpoint {
1439 remote-endpoint = <&amx1_in2_ep>;
1440 };
1441 };
1442
1443 xbar_amx1_in3_port: port@2e {
1444 reg = <0x2e>;
1445
1446 xbar_amx1_in3_ep: endpoint {
1447 remote-endpoint = <&amx1_in3_ep>;
1448 };
1449 };
1450
1451 xbar_amx1_in4_port: port@2f {
1452 reg = <0x2f>;
1453
1454 xbar_amx1_in4_ep: endpoint {
1455 remote-endpoint = <&amx1_in4_ep>;
1456 };
1457 };
1458
1459 port@30 {
1460 reg = <0x30>;
1461
1462 xbar_amx1_out_ep: endpoint {
1463 remote-endpoint = <&amx1_out_ep>;
1464 };
1465 };
1466
1467 xbar_amx2_in1_port: port@31 {
1468 reg = <0x31>;
1469
1470 xbar_amx2_in1_ep: endpoint {
1471 remote-endpoint = <&amx2_in1_ep>;
1472 };
1473 };
1474
1475 xbar_amx2_in2_port: port@32 {
1476 reg = <0x32>;
1477
1478 xbar_amx2_in2_ep: endpoint {
1479 remote-endpoint = <&amx2_in2_ep>;
1480 };
1481 };
1482
1483 xbar_amx2_in3_port: port@33 {
1484 reg = <0x33>;
1485
1486 xbar_amx2_in3_ep: endpoint {
1487 remote-endpoint = <&amx2_in3_ep>;
1488 };
1489 };
1490
1491 xbar_amx2_in4_port: port@34 {
1492 reg = <0x34>;
1493
1494 xbar_amx2_in4_ep: endpoint {
1495 remote-endpoint = <&amx2_in4_ep>;
1496 };
1497 };
1498
1499 port@35 {
1500 reg = <0x35>;
1501
1502 xbar_amx2_out_ep: endpoint {
1503 remote-endpoint = <&amx2_out_ep>;
1504 };
1505 };
1506
1507 xbar_amx3_in1_port: port@36 {
1508 reg = <0x36>;
1509
1510 xbar_amx3_in1_ep: endpoint {
1511 remote-endpoint = <&amx3_in1_ep>;
1512 };
1513 };
1514
1515 xbar_amx3_in2_port: port@37 {
1516 reg = <0x37>;
1517
1518 xbar_amx3_in2_ep: endpoint {
1519 remote-endpoint = <&amx3_in2_ep>;
1520 };
1521 };
1522
1523 xbar_amx3_in3_port: port@38 {
1524 reg = <0x38>;
1525
1526 xbar_amx3_in3_ep: endpoint {
1527 remote-endpoint = <&amx3_in3_ep>;
1528 };
1529 };
1530
1531 xbar_amx3_in4_port: port@39 {
1532 reg = <0x39>;
1533
1534 xbar_amx3_in4_ep: endpoint {
1535 remote-endpoint = <&amx3_in4_ep>;
1536 };
1537 };
1538
1539 port@3a {
1540 reg = <0x3a>;
1541
1542 xbar_amx3_out_ep: endpoint {
1543 remote-endpoint = <&amx3_out_ep>;
1544 };
1545 };
1546
1547 xbar_amx4_in1_port: port@3b {
1548 reg = <0x3b>;
1549
1550 xbar_amx4_in1_ep: endpoint {
1551 remote-endpoint = <&amx4_in1_ep>;
1552 };
1553 };
1554
1555 xbar_amx4_in2_port: port@3c {
1556 reg = <0x3c>;
1557
1558 xbar_amx4_in2_ep: endpoint {
1559 remote-endpoint = <&amx4_in2_ep>;
1560 };
1561 };
1562
1563 xbar_amx4_in3_port: port@3d {
1564 reg = <0x3d>;
1565
1566 xbar_amx4_in3_ep: endpoint {
1567 remote-endpoint = <&amx4_in3_ep>;
1568 };
1569 };
1570
1571 xbar_amx4_in4_port: port@3e {
1572 reg = <0x3e>;
1573
1574 xbar_amx4_in4_ep: endpoint {
1575 remote-endpoint = <&amx4_in4_ep>;
1576 };
1577 };
1578
1579 port@3f {
1580 reg = <0x3f>;
1581
1582 xbar_amx4_out_ep: endpoint {
1583 remote-endpoint = <&amx4_out_ep>;
1584 };
1585 };
1586
1587 xbar_adx1_in_port: port@40 {
1588 reg = <0x40>;
1589
1590 xbar_adx1_in_ep: endpoint {
1591 remote-endpoint = <&adx1_in_ep>;
1592 };
1593 };
1594
1595 port@41 {
1596 reg = <0x41>;
1597
1598 xbar_adx1_out1_ep: endpoint {
1599 remote-endpoint = <&adx1_out1_ep>;
1600 };
1601 };
1602
1603 port@42 {
1604 reg = <0x42>;
1605
1606 xbar_adx1_out2_ep: endpoint {
1607 remote-endpoint = <&adx1_out2_ep>;
1608 };
1609 };
1610
1611 port@43 {
1612 reg = <0x43>;
1613
1614 xbar_adx1_out3_ep: endpoint {
1615 remote-endpoint = <&adx1_out3_ep>;
1616 };
1617 };
1618
1619 port@44 {
1620 reg = <0x44>;
1621
1622 xbar_adx1_out4_ep: endpoint {
1623 remote-endpoint = <&adx1_out4_ep>;
1624 };
1625 };
1626
1627 xbar_adx2_in_port: port@45 {
1628 reg = <0x45>;
1629
1630 xbar_adx2_in_ep: endpoint {
1631 remote-endpoint = <&adx2_in_ep>;
1632 };
1633 };
1634
1635 port@46 {
1636 reg = <0x46>;
1637
1638 xbar_adx2_out1_ep: endpoint {
1639 remote-endpoint = <&adx2_out1_ep>;
1640 };
1641 };
1642
1643 port@47 {
1644 reg = <0x47>;
1645
1646 xbar_adx2_out2_ep: endpoint {
1647 remote-endpoint = <&adx2_out2_ep>;
1648 };
1649 };
1650
1651 port@48 {
1652 reg = <0x48>;
1653
1654 xbar_adx2_out3_ep: endpoint {
1655 remote-endpoint = <&adx2_out3_ep>;
1656 };
1657 };
1658
1659 port@49 {
1660 reg = <0x49>;
1661
1662 xbar_adx2_out4_ep: endpoint {
1663 remote-endpoint = <&adx2_out4_ep>;
1664 };
1665 };
1666
1667 xbar_adx3_in_port: port@4a {
1668 reg = <0x4a>;
1669
1670 xbar_adx3_in_ep: endpoint {
1671 remote-endpoint = <&adx3_in_ep>;
1672 };
1673 };
1674
1675 port@4b {
1676 reg = <0x4b>;
1677
1678 xbar_adx3_out1_ep: endpoint {
1679 remote-endpoint = <&adx3_out1_ep>;
1680 };
1681 };
1682
1683 port@4c {
1684 reg = <0x4c>;
1685
1686 xbar_adx3_out2_ep: endpoint {
1687 remote-endpoint = <&adx3_out2_ep>;
1688 };
1689 };
1690
1691 port@4d {
1692 reg = <0x4d>;
1693
1694 xbar_adx3_out3_ep: endpoint {
1695 remote-endpoint = <&adx3_out3_ep>;
1696 };
1697 };
1698
1699 port@4e {
1700 reg = <0x4e>;
1701
1702 xbar_adx3_out4_ep: endpoint {
1703 remote-endpoint = <&adx3_out4_ep>;
1704 };
1705 };
1706
1707 xbar_adx4_in_port: port@4f {
1708 reg = <0x4f>;
1709
1710 xbar_adx4_in_ep: endpoint {
1711 remote-endpoint = <&adx4_in_ep>;
1712 };
1713 };
1714
1715 port@50 {
1716 reg = <0x50>;
1717
1718 xbar_adx4_out1_ep: endpoint {
1719 remote-endpoint = <&adx4_out1_ep>;
1720 };
1721 };
1722
1723 port@51 {
1724 reg = <0x51>;
1725
1726 xbar_adx4_out2_ep: endpoint {
1727 remote-endpoint = <&adx4_out2_ep>;
1728 };
1729 };
1730
1731 port@52 {
1732 reg = <0x52>;
1733
1734 xbar_adx4_out3_ep: endpoint {
1735 remote-endpoint = <&adx4_out3_ep>;
1736 };
1737 };
1738
1739 port@53 {
1740 reg = <0x53>;
1741
1742 xbar_adx4_out4_ep: endpoint {
1743 remote-endpoint = <&adx4_out4_ep>;
1744 };
1745 };
1746
1747 xbar_mixer_in1_port: port@54 {
1748 reg = <0x54>;
1749
1750 xbar_mixer_in1_ep: endpoint {
1751 remote-endpoint = <&mixer_in1_ep>;
1752 };
1753 };
1754
1755 xbar_mixer_in2_port: port@55 {
1756 reg = <0x55>;
1757
1758 xbar_mixer_in2_ep: endpoint {
1759 remote-endpoint = <&mixer_in2_ep>;
1760 };
1761 };
1762
1763 xbar_mixer_in3_port: port@56 {
1764 reg = <0x56>;
1765
1766 xbar_mixer_in3_ep: endpoint {
1767 remote-endpoint = <&mixer_in3_ep>;
1768 };
1769 };
1770
1771 xbar_mixer_in4_port: port@57 {
1772 reg = <0x57>;
1773
1774 xbar_mixer_in4_ep: endpoint {
1775 remote-endpoint = <&mixer_in4_ep>;
1776 };
1777 };
1778
1779 xbar_mixer_in5_port: port@58 {
1780 reg = <0x58>;
1781
1782 xbar_mixer_in5_ep: endpoint {
1783 remote-endpoint = <&mixer_in5_ep>;
1784 };
1785 };
1786
1787 xbar_mixer_in6_port: port@59 {
1788 reg = <0x59>;
1789
1790 xbar_mixer_in6_ep: endpoint {
1791 remote-endpoint = <&mixer_in6_ep>;
1792 };
1793 };
1794
1795 xbar_mixer_in7_port: port@5a {
1796 reg = <0x5a>;
1797
1798 xbar_mixer_in7_ep: endpoint {
1799 remote-endpoint = <&mixer_in7_ep>;
1800 };
1801 };
1802
1803 xbar_mixer_in8_port: port@5b {
1804 reg = <0x5b>;
1805
1806 xbar_mixer_in8_ep: endpoint {
1807 remote-endpoint = <&mixer_in8_ep>;
1808 };
1809 };
1810
1811 xbar_mixer_in9_port: port@5c {
1812 reg = <0x5c>;
1813
1814 xbar_mixer_in9_ep: endpoint {
1815 remote-endpoint = <&mixer_in9_ep>;
1816 };
1817 };
1818
1819 xbar_mixer_in10_port: port@5d {
1820 reg = <0x5d>;
1821
1822 xbar_mixer_in10_ep: endpoint {
1823 remote-endpoint = <&mixer_in10_ep>;
1824 };
1825 };
1826
1827 port@5e {
1828 reg = <0x5e>;
1829
1830 xbar_mixer_out1_ep: endpoint {
1831 remote-endpoint = <&mixer_out1_ep>;
1832 };
1833 };
1834
1835 port@5f {
1836 reg = <0x5f>;
1837
1838 xbar_mixer_out2_ep: endpoint {
1839 remote-endpoint = <&mixer_out2_ep>;
1840 };
1841 };
1842
1843 port@60 {
1844 reg = <0x60>;
1845
1846 xbar_mixer_out3_ep: endpoint {
1847 remote-endpoint = <&mixer_out3_ep>;
1848 };
1849 };
1850
1851 port@61 {
1852 reg = <0x61>;
1853
1854 xbar_mixer_out4_ep: endpoint {
1855 remote-endpoint = <&mixer_out4_ep>;
1856 };
1857 };
1858
1859 port@62 {
1860 reg = <0x62>;
1861
1862 xbar_mixer_out5_ep: endpoint {
1863 remote-endpoint = <&mixer_out5_ep>;
1864 };
1865 };
1866
1867 xbar_asrc_in1_port: port@63 {
1868 reg = <0x63>;
1869
1870 xbar_asrc_in1_ep: endpoint {
1871 remote-endpoint = <&asrc_in1_ep>;
1872 };
1873 };
1874
1875 port@64 {
1876 reg = <0x64>;
1877
1878 xbar_asrc_out1_ep: endpoint {
1879 remote-endpoint = <&asrc_out1_ep>;
1880 };
1881 };
1882
1883 xbar_asrc_in2_port: port@65 {
1884 reg = <0x65>;
1885
1886 xbar_asrc_in2_ep: endpoint {
1887 remote-endpoint = <&asrc_in2_ep>;
1888 };
1889 };
1890
1891 port@66 {
1892 reg = <0x66>;
1893
1894 xbar_asrc_out2_ep: endpoint {
1895 remote-endpoint = <&asrc_out2_ep>;
1896 };
1897 };
1898
1899 xbar_asrc_in3_port: port@67 {
1900 reg = <0x67>;
1901
1902 xbar_asrc_in3_ep: endpoint {
1903 remote-endpoint = <&asrc_in3_ep>;
1904 };
1905 };
1906
1907 port@68 {
1908 reg = <0x68>;
1909
1910 xbar_asrc_out3_ep: endpoint {
1911 remote-endpoint = <&asrc_out3_ep>;
1912 };
1913 };
1914
1915 xbar_asrc_in4_port: port@69 {
1916 reg = <0x69>;
1917
1918 xbar_asrc_in4_ep: endpoint {
1919 remote-endpoint = <&asrc_in4_ep>;
1920 };
1921 };
1922
1923 port@6a {
1924 reg = <0x6a>;
1925
1926 xbar_asrc_out4_ep: endpoint {
1927 remote-endpoint = <&asrc_out4_ep>;
1928 };
1929 };
1930
1931 xbar_asrc_in5_port: port@6b {
1932 reg = <0x6b>;
1933
1934 xbar_asrc_in5_ep: endpoint {
1935 remote-endpoint = <&asrc_in5_ep>;
1936 };
1937 };
1938
1939 port@6c {
1940 reg = <0x6c>;
1941
1942 xbar_asrc_out5_ep: endpoint {
1943 remote-endpoint = <&asrc_out5_ep>;
1944 };
1945 };
1946
1947 xbar_asrc_in6_port: port@6d {
1948 reg = <0x6d>;
1949
1950 xbar_asrc_in6_ep: endpoint {
1951 remote-endpoint = <&asrc_in6_ep>;
1952 };
1953 };
1954
1955 port@6e {
1956 reg = <0x6e>;
1957
1958 xbar_asrc_out6_ep: endpoint {
1959 remote-endpoint = <&asrc_out6_ep>;
1960 };
1961 };
1962
1963 xbar_asrc_in7_port: port@6f {
1964 reg = <0x6f>;
1965
1966 xbar_asrc_in7_ep: endpoint {
1967 remote-endpoint = <&asrc_in7_ep>;
1968 };
1969 };
1970
1971 xbar_ope1_in_port: port@70 {
1972 reg = <0x70>;
1973
1974 xbar_ope1_in_ep: endpoint {
1975 remote-endpoint = <&ope1_cif_in_ep>;
1976 };
1977 };
1978
1979 port@71 {
1980 reg = <0x71>;
1981
1982 xbar_ope1_out_ep: endpoint {
1983 remote-endpoint = <&ope1_cif_out_ep>;
1984 };
1985 };
1986 };
1987 };
1988
1989 dma-controller@2930000 {
1990 status = "okay";
1991 };
1992
1993 interrupt-controller@2a40000 {
1994 status = "okay";
1995 };
1996 };
1997
1998 i2c@3160000 {
1999 eeprom@56 {
2000 compatible = "atmel,24c02";
2001 reg = <0x56>;
2002
2003 label = "system";
2004 vcc-supply = <&vdd_1v8ls>;
2005 address-width = <8>;
2006 pagesize = <8>;
2007 size = <256>;
2008 read-only;
2009 };
2010 };
2011
2012 ddc: i2c@31c0000 {
2013 status = "okay";
2014 };
2015
2016 /* SDMMC1 (SD/MMC) */
2017 mmc@3400000 {
2018 status = "okay";
2019 };
2020
2021 hda@3510000 {
2022 nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
2023 status = "okay";
2024 };
2025
2026 padctl@3520000 {
2027 status = "okay";
2028
2029 pads {
2030 usb2 {
2031 lanes {
2032 usb2-0 {
2033 status = "okay";
2034 };
2035
2036 usb2-1 {
2037 status = "okay";
2038 };
2039
2040 usb2-3 {
2041 status = "okay";
2042 };
2043 };
2044 };
2045
2046 usb3 {
2047 lanes {
2048 usb3-0 {
2049 status = "okay";
2050 };
2051
2052 usb3-2 {
2053 status = "okay";
2054 };
2055
2056 usb3-3 {
2057 status = "okay";
2058 };
2059 };
2060 };
2061 };
2062
2063 ports {
2064 usb2-0 {
2065 mode = "otg";
2066 usb-role-switch;
2067 status = "okay";
2068
2069 port {
2070 hs_typec_p0: endpoint {
2071 remote-endpoint = <&hs_ucsi_ccg_p0>;
2072 };
2073 };
2074 };
2075
2076 usb2-1 {
2077 mode = "host";
2078 status = "okay";
2079 };
2080
2081 usb2-3 {
2082 mode = "host";
2083 status = "okay";
2084 };
2085
2086 usb3-0 {
2087 nvidia,usb2-companion = <1>;
2088 status = "okay";
2089 };
2090
2091 usb3-2 {
2092 nvidia,usb2-companion = <0>;
2093 status = "okay";
2094 };
2095
2096 usb3-3 {
2097 nvidia,usb2-companion = <3>;
2098 maximum-speed = "super-speed";
2099 status = "okay";
2100 };
2101 };
2102 };
2103
2104 usb@3550000 {
2105 status = "okay";
2106
2107 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2108 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
2109 phy-names = "usb2-0", "usb3-0";
2110 };
2111
2112 usb@3610000 {
2113 status = "okay";
2114
2115 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2116 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2117 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
2118 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
2119 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>,
2120 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
2121 phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
2122 };
2123
2124 i2c@c240000 {
2125 typec@8 {
2126 compatible = "cypress,cypd4226";
2127 reg = <0x08>;
2128 interrupt-parent = <&gpio_aon>;
2129 interrupts = <TEGRA194_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>;
2130 firmware-name = "nvidia,jetson-agx-xavier";
2131 status = "okay";
2132
2133 #address-cells = <1>;
2134 #size-cells = <0>;
2135
2136 ccg_typec_con0: connector@0 {
2137 compatible = "usb-c-connector";
2138 reg = <0>;
2139 label = "USB-C";
2140 data-role = "dual";
2141
2142 ports {
2143 #address-cells = <1>;
2144 #size-cells = <0>;
2145
2146 port@0 {
2147 reg = <0>;
2148
2149 hs_ucsi_ccg_p0: endpoint {
2150 remote-endpoint = <&hs_typec_p0>;
2151 };
2152 };
2153 };
2154 };
2155 };
2156 };
2157
2158 i2c@c250000 {
2159 status = "okay";
2160
2161 rt5658: audio-codec@1a {
2162 status = "okay";
2163
2164 compatible = "realtek,rt5658";
2165 reg = <0x1a>;
2166 interrupt-parent = <&gpio>;
2167 interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;
2168 clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
2169 clock-names = "mclk";
2170 realtek,jd-src = <2>;
2171 sound-name-prefix = "CVB-RT";
2172
2173 port {
2174 rt5658_ep: endpoint {
2175 remote-endpoint = <&i2s1_dap_ep>;
2176 mclk-fs = <256>;
2177 };
2178 };
2179 };
2180 };
2181
2182 pwm@c340000 {
2183 status = "okay";
2184 };
2185
2186 host1x@13e00000 {
2187 display-hub@15200000 {
2188 status = "okay";
2189 };
2190
2191 dpaux@155c0000 {
2192 status = "okay";
2193 };
2194
2195 dpaux@155d0000 {
2196 status = "okay";
2197 };
2198
2199 dpaux@155e0000 {
2200 status = "okay";
2201 };
2202
2203 /* DP0 */
2204 sor@15b00000 {
2205 status = "okay";
2206
2207 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2208 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2209
2210 nvidia,dpaux = <&dpaux0>;
2211 };
2212
2213 /* DP1 */
2214 sor@15b40000 {
2215 status = "okay";
2216
2217 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2218 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2219
2220 nvidia,dpaux = <&dpaux1>;
2221 };
2222
2223 /* HDMI */
2224 sor@15b80000 {
2225 status = "okay";
2226
2227 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2228 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2229 hdmi-supply = <&vdd_hdmi>;
2230
2231 nvidia,ddc-i2c-bus = <&ddc>;
2232 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2)
2233 GPIO_ACTIVE_LOW>;
2234 };
2235 };
2236
2237 pcie@14100000 {
2238 status = "okay";
2239
2240 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2241
2242 phys = <&p2u_hsio_0>;
2243 phy-names = "p2u-0";
2244 };
2245
2246 pcie@14140000 {
2247 status = "okay";
2248
2249 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2250
2251 phys = <&p2u_hsio_7>;
2252 phy-names = "p2u-0";
2253 };
2254
2255 pcie@14180000 {
2256 status = "okay";
2257
2258 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2259
2260 phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
2261 <&p2u_hsio_5>;
2262 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
2263 };
2264
2265 pcie@141a0000 {
2266 status = "okay";
2267
2268 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2269 vpcie3v3-supply = <&vdd_3v3_pcie>;
2270 vpcie12v-supply = <&vdd_12v_pcie>;
2271
2272 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2273 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2274 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2275
2276 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2277 "p2u-5", "p2u-6", "p2u-7";
2278 };
2279
2280 pcie-ep@141a0000 {
2281 status = "disabled";
2282
2283 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2284
2285 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
2286
2287 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
2288 GPIO_ACTIVE_HIGH>;
2289
2290 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2291 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2292 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2293
2294 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2295 "p2u-5", "p2u-6", "p2u-7";
2296 };
2297 };
2298
2299 gpio-keys {
2300 compatible = "gpio-keys";
2301
2302 key-force-recovery {
2303 label = "Force Recovery";
2304 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
2305 GPIO_ACTIVE_LOW>;
2306 linux,input-type = <EV_KEY>;
2307 linux,code = <KEY_SLEEP>;
2308 debounce-interval = <10>;
2309 };
2310
2311 key-power {
2312 label = "Power";
2313 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
2314 GPIO_ACTIVE_LOW>;
2315 linux,input-type = <EV_KEY>;
2316 linux,code = <KEY_POWER>;
2317 debounce-interval = <10>;
2318 wakeup-event-action = <EV_ACT_ASSERTED>;
2319 wakeup-source;
2320 };
2321 };
2322
2323 fan: pwm-fan {
2324 compatible = "pwm-fan";
2325 pwms = <&pwm4 0 45334>;
2326
2327 cooling-levels = <0 64 128 255>;
2328 #cooling-cells = <2>;
2329 };
2330
2331 sound {
2332 compatible = "nvidia,tegra186-audio-graph-card";
2333 status = "okay";
2334
2335 dais = /* ADMAIF (FE) Ports */
2336 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2337 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2338 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2339 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2340 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2341 /* XBAR Ports */
2342 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
2343 <&xbar_i2s6_port>, <&xbar_dmic3_port>,
2344 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2345 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2346 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2347 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2348 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2349 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2350 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2351 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2352 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2353 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2354 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2355 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2356 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2357 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2358 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2359 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2360 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2361 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2362 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2363 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2364 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2365 <&xbar_asrc_in7_port>,
2366 <&xbar_ope1_in_port>,
2367 /* HW accelerators */
2368 <&sfc1_out_port>, <&sfc2_out_port>,
2369 <&sfc3_out_port>, <&sfc4_out_port>,
2370 <&mvc1_out_port>, <&mvc2_out_port>,
2371 <&amx1_out_port>, <&amx2_out_port>,
2372 <&amx3_out_port>, <&amx4_out_port>,
2373 <&adx1_out1_port>, <&adx1_out2_port>,
2374 <&adx1_out3_port>, <&adx1_out4_port>,
2375 <&adx2_out1_port>, <&adx2_out2_port>,
2376 <&adx2_out3_port>, <&adx2_out4_port>,
2377 <&adx3_out1_port>, <&adx3_out2_port>,
2378 <&adx3_out3_port>, <&adx3_out4_port>,
2379 <&adx4_out1_port>, <&adx4_out2_port>,
2380 <&adx4_out3_port>, <&adx4_out4_port>,
2381 <&mixer_out1_port>, <&mixer_out2_port>, <&mixer_out3_port>,
2382 <&mixer_out4_port>, <&mixer_out5_port>,
2383 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2384 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2385 <&ope1_out_port>,
2386 /* BE I/O Ports */
2387 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
2388 <&dmic3_port>;
2389
2390 label = "NVIDIA Jetson AGX Xavier APE";
2391
2392 widgets =
2393 "Microphone", "CVB-RT MIC Jack",
2394 "Microphone", "CVB-RT MIC",
2395 "Headphone", "CVB-RT HP Jack",
2396 "Speaker", "CVB-RT SPK";
2397
2398 routing =
2399 /* I2S1 <-> RT5658 */
2400 "CVB-RT AIF1 Playback", "I2S1 DAP-Playback",
2401 "I2S1 DAP-Capture", "CVB-RT AIF1 Capture",
2402 /* RT5658 Codec controls */
2403 "CVB-RT HP Jack", "CVB-RT HPO L Playback",
2404 "CVB-RT HP Jack", "CVB-RT HPO R Playback",
2405 "CVB-RT IN1P", "CVB-RT MIC Jack",
2406 "CVB-RT IN2P", "CVB-RT MIC Jack",
2407 "CVB-RT SPK", "CVB-RT SPO Playback",
2408 "CVB-RT DMIC L1", "CVB-RT MIC",
2409 "CVB-RT DMIC L2", "CVB-RT MIC",
2410 "CVB-RT DMIC R1", "CVB-RT MIC",
2411 "CVB-RT DMIC R2", "CVB-RT MIC";
2412 };
2413
2414 thermal-zones {
2415 cpu-thermal {
2416 polling-delay = <0>;
2417 polling-delay-passive = <500>;
2418 status = "okay";
2419
2420 trips {
2421 cpu_trip_critical: critical {
2422 temperature = <96500>;
2423 hysteresis = <0>;
2424 type = "critical";
2425 };
2426
2427 cpu_trip_hot: hot {
2428 temperature = <70000>;
2429 hysteresis = <2000>;
2430 type = "hot";
2431 };
2432
2433 cpu_trip_active: active {
2434 temperature = <50000>;
2435 hysteresis = <2000>;
2436 type = "active";
2437 };
2438
2439 cpu_trip_passive: passive {
2440 temperature = <30000>;
2441 hysteresis = <2000>;
2442 type = "passive";
2443 };
2444 };
2445
2446 cooling-maps {
2447 cpu-critical {
2448 cooling-device = <&fan 3 3>;
2449 trip = <&cpu_trip_critical>;
2450 };
2451
2452 cpu-hot {
2453 cooling-device = <&fan 2 2>;
2454 trip = <&cpu_trip_hot>;
2455 };
2456
2457 cpu-active {
2458 cooling-device = <&fan 1 1>;
2459 trip = <&cpu_trip_active>;
2460 };
2461
2462 cpu-passive {
2463 cooling-device = <&fan 0 0>;
2464 trip = <&cpu_trip_passive>;
2465 };
2466 };
2467 };
2468
2469 gpu-thermal {
2470 polling-delay = <0>;
2471 polling-delay-passive = <500>;
2472 status = "okay";
2473
2474 trips {
2475 gpu_alert0: critical {
2476 temperature = <99000>;
2477 hysteresis = <0>;
2478 type = "critical";
2479 };
2480 };
2481 };
2482
2483 aux-thermal {
2484 polling-delay = <0>;
2485 polling-delay-passive = <500>;
2486 status = "okay";
2487
2488 trips {
2489 aux_alert0: critical {
2490 temperature = <90000>;
2491 hysteresis = <0>;
2492 type = "critical";
2493 };
2494 };
2495 };
2496 };
2497 };
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