1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2024 Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "sm8550.dtsi"
11 #include "pm8010.dtsi"
12 #include "pm8550.dtsi"
13 #include "pm8550b.dtsi"
14 #define PMK8550VE_SID 5
15 #include "pm8550ve.dtsi"
16 #include "pm8550vs.dtsi"
17 #include "pmk8550.dtsi"
18 #include "pmr735d_a.dtsi"
19
20 / {
21 model = "Qualcomm Technologies, Inc. SM8550 HDK";
22 compatible = "qcom,sm8550-hdk", "qcom,sm8550";
23 chassis-type = "embedded";
24
25 aliases {
26 serial0 = &uart7;
27 serial1 = &uart14;
28 };
29
30 wcd938x: audio-codec {
31 compatible = "qcom,wcd9385-codec";
32
33 pinctrl-names = "default";
34 pinctrl-0 = <&wcd_default>;
35
36 qcom,micbias1-microvolt = <1800000>;
37 qcom,micbias2-microvolt = <1800000>;
38 qcom,micbias3-microvolt = <1800000>;
39 qcom,micbias4-microvolt = <1800000>;
40 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
41 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
42 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
43 qcom,rx-device = <&wcd_rx>;
44 qcom,tx-device = <&wcd_tx>;
45
46 reset-gpios = <&tlmm 108 GPIO_ACTIVE_LOW>;
47
48 vdd-buck-supply = <&vreg_l15b_1p8>;
49 vdd-rxtx-supply = <&vreg_l15b_1p8>;
50 vdd-io-supply = <&vreg_l15b_1p8>;
51 vdd-mic-bias-supply = <&vreg_bob1>;
52
53 #sound-dai-cells = <1>;
54 };
55
56 chosen {
57 stdout-path = "serial0:115200n8";
58 };
59
60 hdmi-out {
61 compatible = "hdmi-connector";
62 type = "a";
63
64 port {
65 hdmi_connector_out: endpoint {
66 remote-endpoint = <<9611_out>;
67 };
68 };
69 };
70
71 gpio-keys {
72 compatible = "gpio-keys";
73
74 pinctrl-0 = <&volume_up_n>;
75 pinctrl-names = "default";
76
77 key-volume-up {
78 label = "Volume Up";
79 linux,code = <KEY_VOLUMEUP>;
80 gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
81 debounce-interval = <15>;
82 linux,can-disable;
83 wakeup-source;
84 };
85 };
86
87 leds {
88 compatible = "gpio-leds";
89
90 led-0 {
91 function = LED_FUNCTION_BLUETOOTH;
92 color = <LED_COLOR_ID_BLUE>;
93 gpios = <&tlmm 159 GPIO_ACTIVE_HIGH>;
94 linux,default-trigger = "bluetooth-power";
95 default-state = "off";
96 };
97
98 led-1 {
99 function = LED_FUNCTION_INDICATOR;
100 color = <LED_COLOR_ID_GREEN>;
101 gpios = <&tlmm 160 GPIO_ACTIVE_HIGH>;
102 default-state = "off";
103 panic-indicator;
104 };
105
106 led-2 {
107 function = LED_FUNCTION_WLAN;
108 color = <LED_COLOR_ID_ORANGE>;
109 gpios = <&tlmm 162 GPIO_ACTIVE_HIGH>;
110 linux,default-trigger = "phy0tx";
111 default-state = "off";
112 };
113 };
114
115 pmic-glink {
116 compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
117 #address-cells = <1>;
118 #size-cells = <0>;
119 orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
120
121 connector@0 {
122 compatible = "usb-c-connector";
123 reg = <0>;
124 power-role = "dual";
125 data-role = "dual";
126
127 ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 port@0 {
132 reg = <0>;
133
134 pmic_glink_hs_in: endpoint {
135 remote-endpoint = <&usb_1_dwc3_hs>;
136 };
137 };
138
139 port@1 {
140 reg = <1>;
141
142 pmic_glink_ss_in: endpoint {
143 remote-endpoint = <&usb_dp_qmpphy_out>;
144 };
145 };
146
147 port@2 {
148 reg = <2>;
149
150 pmic_glink_sbu: endpoint {
151 remote-endpoint = <&fsa4480_sbu_mux>;
152 };
153 };
154 };
155 };
156 };
157
158 lt9611_1v2: regulator-lt9611-1v2 {
159 compatible = "regulator-fixed";
160
161 regulator-name = "LT9611_1V2";
162 regulator-min-microvolt = <1200000>;
163 regulator-max-microvolt = <1200000>;
164
165 vin-supply = <&vph_pwr>;
166 gpio = <&tlmm 152 GPIO_ACTIVE_HIGH>;
167
168 enable-active-high;
169 };
170
171 lt9611_3v3: regulator-lt9611-3v3 {
172 compatible = "regulator-fixed";
173
174 regulator-name = "LT9611_3V3";
175 regulator-min-microvolt = <3300000>;
176 regulator-max-microvolt = <3300000>;
177
178 vin-supply = <&vreg_bob_3v3>;
179 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>;
180
181 enable-active-high;
182 };
183
184 vph_pwr: regulator-vph-pwr {
185 compatible = "regulator-fixed";
186
187 regulator-name = "vph_pwr";
188 regulator-min-microvolt = <3700000>;
189 regulator-max-microvolt = <3700000>;
190 regulator-always-on;
191 regulator-boot-on;
192 };
193
194 vreg_bob_3v3: regulator-vreg-bob-3v3 {
195 compatible = "regulator-fixed";
196
197 regulator-name = "VREG_BOB_3P3";
198 regulator-min-microvolt = <3300000>;
199 regulator-max-microvolt = <3300000>;
200
201 vin-supply = <&vph_pwr>;
202 };
203
204 sound {
205 compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
206 model = "SM8550-HDK";
207 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
208 "SpkrRight IN", "WSA_SPK2 OUT",
209 "IN1_HPHL", "HPHL_OUT",
210 "IN2_HPHR", "HPHR_OUT",
211 "AMIC1", "MIC BIAS1",
212 "AMIC2", "MIC BIAS2",
213 "AMIC5", "MIC BIAS4",
214 "TX SWR_INPUT0", "ADC1_OUTPUT",
215 "TX SWR_INPUT1", "ADC2_OUTPUT",
216 "TX SWR_INPUT1", "ADC4_OUTPUT";
217
218 wcd-playback-dai-link {
219 link-name = "WCD Playback";
220
221 cpu {
222 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
223 };
224
225 codec {
226 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
227 };
228
229 platform {
230 sound-dai = <&q6apm>;
231 };
232 };
233
234 wcd-capture-dai-link {
235 link-name = "WCD Capture";
236
237 cpu {
238 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
239 };
240
241 codec {
242 sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>;
243 };
244
245 platform {
246 sound-dai = <&q6apm>;
247 };
248 };
249
250 wsa-dai-link {
251 link-name = "WSA Playback";
252
253 cpu {
254 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
255 };
256
257 codec {
258 sound-dai = <&north_spkr>, <&south_spkr>, <&swr0 0>, <&lpass_wsamacro 0>;
259 };
260
261 platform {
262 sound-dai = <&q6apm>;
263 };
264 };
265
266 va-dai-link {
267 link-name = "VA Capture";
268
269 cpu {
270 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
271 };
272
273 codec {
274 sound-dai = <&lpass_vamacro 0>;
275 };
276
277 platform {
278 sound-dai = <&q6apm>;
279 };
280 };
281 };
282 };
283
284 &apps_rsc {
285 regulators-0 {
286 compatible = "qcom,pm8550-rpmh-regulators";
287
288 vdd-bob1-supply = <&vph_pwr>;
289 vdd-bob2-supply = <&vph_pwr>;
290 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>;
291 vdd-l2-l13-l14-supply = <&vreg_bob1>;
292 vdd-l3-supply = <&vreg_s4g_1p25>;
293 vdd-l5-l16-supply = <&vreg_bob1>;
294 vdd-l6-l7-supply = <&vreg_bob1>;
295 vdd-l8-l9-supply = <&vreg_bob1>;
296 vdd-l11-supply = <&vreg_s4g_1p25>;
297 vdd-l12-supply = <&vreg_s6g_1p86>;
298 vdd-l15-supply = <&vreg_s6g_1p86>;
299 vdd-l17-supply = <&vreg_bob2>;
300
301 qcom,pmic-id = "b";
302
303 vreg_bob1: bob1 {
304 regulator-name = "vreg_bob1";
305 regulator-min-microvolt = <3296000>;
306 regulator-max-microvolt = <3960000>;
307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
308 };
309
310 vreg_bob2: bob2 {
311 regulator-name = "vreg_bob2";
312 regulator-min-microvolt = <2720000>;
313 regulator-max-microvolt = <3960000>;
314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
315 };
316
317 vreg_l1b_1p8: ldo1 {
318 regulator-name = "vreg_l1b_1p8";
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
322 regulator-allow-set-load;
323 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
324 RPMH_REGULATOR_MODE_HPM>;
325 };
326
327 vreg_l2b_3p0: ldo2 {
328 regulator-name = "vreg_l2b_3p0";
329 regulator-min-microvolt = <3008000>;
330 regulator-max-microvolt = <3008000>;
331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 regulator-allow-set-load;
333 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
334 RPMH_REGULATOR_MODE_HPM>;
335 };
336
337 vreg_l5b_3p1: ldo5 {
338 regulator-name = "vreg_l5b_3p1";
339 regulator-min-microvolt = <3104000>;
340 regulator-max-microvolt = <3104000>;
341 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
342 regulator-allow-set-load;
343 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
344 RPMH_REGULATOR_MODE_HPM>;
345 };
346
347 vreg_l6b_1p8: ldo6 {
348 regulator-name = "vreg_l6b_1p8";
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <3008000>;
351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
352 regulator-allow-set-load;
353 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
354 RPMH_REGULATOR_MODE_HPM>;
355 };
356
357 vreg_l7b_1p8: ldo7 {
358 regulator-name = "vreg_l7b_1p8";
359 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <3008000>;
361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
362 regulator-allow-set-load;
363 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
364 RPMH_REGULATOR_MODE_HPM>;
365 };
366
367 vreg_l8b_1p8: ldo8 {
368 regulator-name = "vreg_l8b_1p8";
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <3008000>;
371 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
372 regulator-allow-set-load;
373 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
374 RPMH_REGULATOR_MODE_HPM>;
375 };
376
377 vreg_l9b_2p9: ldo9 {
378 regulator-name = "vreg_l9b_2p9";
379 regulator-min-microvolt = <2960000>;
380 regulator-max-microvolt = <3008000>;
381 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
382 regulator-allow-set-load;
383 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
384 RPMH_REGULATOR_MODE_HPM>;
385 };
386
387 vreg_l11b_1p2: ldo11 {
388 regulator-name = "vreg_l11b_1p2";
389 regulator-min-microvolt = <1200000>;
390 regulator-max-microvolt = <1504000>;
391 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
392 regulator-allow-set-load;
393 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
394 RPMH_REGULATOR_MODE_HPM>;
395 };
396
397 vreg_l12b_1p8: ldo12 {
398 regulator-name = "vreg_l12b_1p8";
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <1800000>;
401 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
402 regulator-allow-set-load;
403 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
404 RPMH_REGULATOR_MODE_HPM>;
405 };
406
407 vreg_l13b_3p0: ldo13 {
408 regulator-name = "vreg_l13b_3p0";
409 regulator-min-microvolt = <3000000>;
410 regulator-max-microvolt = <3000000>;
411 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
412 regulator-allow-set-load;
413 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
414 RPMH_REGULATOR_MODE_HPM>;
415 };
416
417 vreg_l14b_3p2: ldo14 {
418 regulator-name = "vreg_l14b_3p2";
419 regulator-min-microvolt = <3200000>;
420 regulator-max-microvolt = <3200000>;
421 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
422 regulator-allow-set-load;
423 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
424 RPMH_REGULATOR_MODE_HPM>;
425 };
426
427 vreg_l15b_1p8: ldo15 {
428 regulator-name = "vreg_l15b_1p8";
429 regulator-min-microvolt = <1800000>;
430 regulator-max-microvolt = <1800000>;
431 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
432 regulator-allow-set-load;
433 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
434 RPMH_REGULATOR_MODE_HPM>;
435 };
436
437 vreg_l16b_2p8: ldo16 {
438 regulator-name = "vreg_l16b_2p8";
439 regulator-min-microvolt = <2800000>;
440 regulator-max-microvolt = <2800000>;
441 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
442 regulator-allow-set-load;
443 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
444 RPMH_REGULATOR_MODE_HPM>;
445 };
446
447 vreg_l17b_2p5: ldo17 {
448 regulator-name = "vreg_l17b_2p5";
449 regulator-min-microvolt = <2504000>;
450 regulator-max-microvolt = <2504000>;
451 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
452 regulator-allow-set-load;
453 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
454 RPMH_REGULATOR_MODE_HPM>;
455 };
456 };
457
458 regulators-1 {
459 compatible = "qcom,pm8550vs-rpmh-regulators";
460
461 vdd-l1-supply = <&vreg_s4g_1p25>;
462 vdd-l2-supply = <&vreg_s4e_0p95>;
463 vdd-l3-supply = <&vreg_s4e_0p95>;
464
465 qcom,pmic-id = "c";
466
467 vreg_l3c_0p9: ldo3 {
468 regulator-name = "vreg_l3c_0p9";
469 regulator-min-microvolt = <880000>;
470 regulator-max-microvolt = <912000>;
471 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
472 regulator-allow-set-load;
473 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
474 RPMH_REGULATOR_MODE_HPM>;
475 };
476 };
477
478 regulators-2 {
479 compatible = "qcom,pm8550vs-rpmh-regulators";
480
481 vdd-l1-supply = <&vreg_s4e_0p95>;
482 vdd-l2-supply = <&vreg_s4e_0p95>;
483 vdd-l3-supply = <&vreg_s4e_0p95>;
484
485 qcom,pmic-id = "d";
486
487 vreg_l1d_0p88: ldo1 {
488 regulator-name = "vreg_l1d_0p88";
489 regulator-min-microvolt = <880000>;
490 regulator-max-microvolt = <920000>;
491 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
492 regulator-allow-set-load;
493 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
494 RPMH_REGULATOR_MODE_HPM>;
495 };
496
497 /* ldo2 supplies SM8550 VDD_LPI_MX */
498 };
499
500 regulators-3 {
501 compatible = "qcom,pm8550vs-rpmh-regulators";
502
503 vdd-l1-supply = <&vreg_s4e_0p95>;
504 vdd-l2-supply = <&vreg_s4e_0p95>;
505 vdd-l3-supply = <&vreg_s4g_1p25>;
506 vdd-s4-supply = <&vph_pwr>;
507 vdd-s5-supply = <&vph_pwr>;
508
509 qcom,pmic-id = "e";
510
511 vreg_s4e_0p95: smps4 {
512 regulator-name = "vreg_s4e_0p95";
513 regulator-min-microvolt = <904000>;
514 regulator-max-microvolt = <984000>;
515 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
516 };
517
518 vreg_s5e_1p08: smps5 {
519 regulator-name = "vreg_s5e_1p08";
520 regulator-min-microvolt = <1080000>;
521 regulator-max-microvolt = <1120000>;
522 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
523 };
524
525 vreg_l1e_0p88: ldo1 {
526 regulator-name = "vreg_l1e_0p88";
527 regulator-min-microvolt = <880000>;
528 regulator-max-microvolt = <880000>;
529 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
530 regulator-allow-set-load;
531 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
532 RPMH_REGULATOR_MODE_HPM>;
533 };
534
535 vreg_l2e_0p9: ldo2 {
536 regulator-name = "vreg_l2e_0p9";
537 regulator-min-microvolt = <904000>;
538 regulator-max-microvolt = <970000>;
539 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
540 regulator-allow-set-load;
541 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
542 RPMH_REGULATOR_MODE_HPM>;
543 };
544
545 vreg_l3e_1p2: ldo3 {
546 regulator-name = "vreg_l3e_1p2";
547 regulator-min-microvolt = <1200000>;
548 regulator-max-microvolt = <1200000>;
549 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
550 regulator-allow-set-load;
551 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
552 RPMH_REGULATOR_MODE_HPM>;
553 };
554 };
555
556 regulators-4 {
557 compatible = "qcom,pm8550ve-rpmh-regulators";
558
559 vdd-l1-supply = <&vreg_s4e_0p95>;
560 vdd-l2-supply = <&vreg_s4e_0p95>;
561 vdd-l3-supply = <&vreg_s4e_0p95>;
562 vdd-s4-supply = <&vph_pwr>;
563
564 qcom,pmic-id = "f";
565
566 vreg_s4f_0p5: smps4 {
567 regulator-name = "vreg_s4f_0p5";
568 regulator-min-microvolt = <500000>;
569 regulator-max-microvolt = <700000>;
570 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
571 };
572
573 vreg_l1f_0p9: ldo1 {
574 regulator-name = "vreg_l1f_0p9";
575 regulator-min-microvolt = <912000>;
576 regulator-max-microvolt = <912000>;
577 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
578 regulator-allow-set-load;
579 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
580 RPMH_REGULATOR_MODE_HPM>;
581 };
582
583 vreg_l2f_0p88: ldo2 {
584 regulator-name = "vreg_l2f_0p88";
585 regulator-min-microvolt = <880000>;
586 regulator-max-microvolt = <912000>;
587 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
588 regulator-allow-set-load;
589 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
590 RPMH_REGULATOR_MODE_HPM>;
591 };
592
593 vreg_l3f_0p88: ldo3 {
594 regulator-name = "vreg_l3f_0p88";
595 regulator-min-microvolt = <880000>;
596 regulator-max-microvolt = <912000>;
597 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
598 regulator-allow-set-load;
599 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
600 RPMH_REGULATOR_MODE_HPM>;
601 };
602 };
603
604 regulators-5 {
605 compatible = "qcom,pm8550vs-rpmh-regulators";
606
607 vdd-l1-supply = <&vreg_s4g_1p25>;
608 vdd-l2-supply = <&vreg_s4g_1p25>;
609 vdd-l3-supply = <&vreg_s4g_1p25>;
610 vdd-s1-supply = <&vph_pwr>;
611 vdd-s2-supply = <&vph_pwr>;
612 vdd-s3-supply = <&vph_pwr>;
613 vdd-s4-supply = <&vph_pwr>;
614 vdd-s5-supply = <&vph_pwr>;
615 vdd-s6-supply = <&vph_pwr>;
616
617 qcom,pmic-id = "g";
618
619 vreg_s1g_1p25: smps1 {
620 regulator-name = "vreg_s1g_1p25";
621 regulator-min-microvolt = <1200000>;
622 regulator-max-microvolt = <1300000>;
623 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
624 };
625
626 vreg_s2g_0p85: smps2 {
627 regulator-name = "vreg_s2g_0p85";
628 regulator-min-microvolt = <800000>;
629 regulator-max-microvolt = <1000000>;
630 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
631 };
632
633 vreg_s3g_0p8: smps3 {
634 regulator-name = "vreg_s3g_0p8";
635 regulator-min-microvolt = <300000>;
636 regulator-max-microvolt = <1004000>;
637 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
638 };
639
640 vreg_s4g_1p25: smps4 {
641 regulator-name = "vreg_s4g_1p25";
642 regulator-min-microvolt = <1200000>;
643 regulator-max-microvolt = <1352000>;
644 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
645 };
646
647 vreg_s5g_0p85: smps5 {
648 regulator-name = "vreg_s5g_0p85";
649 regulator-min-microvolt = <500000>;
650 regulator-max-microvolt = <1004000>;
651 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
652 };
653
654 vreg_s6g_1p86: smps6 {
655 regulator-name = "vreg_s6g_1p86";
656 regulator-min-microvolt = <1800000>;
657 regulator-max-microvolt = <2000000>;
658 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
659 };
660
661 vreg_l1g_1p2: ldo1 {
662 regulator-name = "vreg_l1g_1p2";
663 regulator-min-microvolt = <1200000>;
664 regulator-max-microvolt = <1200000>;
665 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
666 regulator-allow-set-load;
667 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
668 RPMH_REGULATOR_MODE_HPM>;
669 };
670
671 vreg_l3g_1p2: ldo3 {
672 regulator-name = "vreg_l3g_1p2";
673 regulator-min-microvolt = <1200000>;
674 regulator-max-microvolt = <1200000>;
675 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
676 regulator-allow-set-load;
677 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
678 RPMH_REGULATOR_MODE_HPM>;
679 };
680 };
681
682 regulators-6 {
683 compatible = "qcom,pm8010-rpmh-regulators";
684
685 vdd-l1-l2-supply = <&vreg_s4g_1p25>;
686 vdd-l3-l4-supply = <&vreg_bob2>;
687 vdd-l5-supply = <&vreg_s6g_1p86>;
688 vdd-l6-supply = <&vreg_s6g_1p86>;
689 vdd-l7-supply = <&vreg_bob1>;
690
691 qcom,pmic-id = "m";
692
693 vreg_l1m_1p056: ldo1 {
694 regulator-name = "vreg_l1m_1p056";
695 regulator-min-microvolt = <1056000>;
696 regulator-max-microvolt = <1056000>;
697 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
698 regulator-allow-set-load;
699 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
700 RPMH_REGULATOR_MODE_HPM>;
701 };
702
703 vreg_l2m_1p056: ldo2 {
704 regulator-name = "vreg_l2m_1p056";
705 regulator-min-microvolt = <1056000>;
706 regulator-max-microvolt = <1056000>;
707 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
708 regulator-allow-set-load;
709 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
710 RPMH_REGULATOR_MODE_HPM>;
711 };
712
713 vreg_l3m_2p8: ldo3 {
714 regulator-name = "vreg_l3m_2p8";
715 regulator-min-microvolt = <2800000>;
716 regulator-max-microvolt = <2800000>;
717 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
718 };
719
720 vreg_l4m_2p8: ldo4 {
721 regulator-name = "vreg_l4m_2p8";
722 regulator-min-microvolt = <2800000>;
723 regulator-max-microvolt = <2800000>;
724 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
725 };
726
727 vreg_l5m_1p8: ldo5 {
728 regulator-name = "vreg_l5m_1p8";
729 regulator-min-microvolt = <1800000>;
730 regulator-max-microvolt = <1800000>;
731 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
732 };
733
734 vreg_l6m_1p8: ldo6 {
735 regulator-name = "vreg_l6m_1p8";
736 regulator-min-microvolt = <1800000>;
737 regulator-max-microvolt = <1800000>;
738 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
739 };
740
741 vreg_l7m_2p9: ldo7 {
742 regulator-name = "vreg_l7m_2p9";
743 regulator-min-microvolt = <2800000>;
744 regulator-max-microvolt = <2904000>;
745 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
746 };
747 };
748
749 regulators-7 {
750 compatible = "qcom,pm8010-rpmh-regulators";
751
752 vdd-l1-l2-supply = <&vreg_s4g_1p25>;
753 vdd-l3-l4-supply = <&vreg_bob2>;
754 vdd-l5-supply = <&vreg_s6g_1p86>;
755 vdd-l6-supply = <&vreg_bob1>;
756 vdd-l7-supply = <&vreg_bob1>;
757
758 qcom,pmic-id = "n";
759
760 vreg_l1n_1p1: ldo1 {
761 regulator-name = "vreg_l1n_1p1";
762 regulator-min-microvolt = <1104000>;
763 regulator-max-microvolt = <1200000>;
764 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
765 regulator-allow-set-load;
766 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
767 RPMH_REGULATOR_MODE_HPM>;
768 };
769
770 vreg_l2n_1p1: ldo2 {
771 regulator-name = "vreg_l2n_1p1";
772 regulator-min-microvolt = <1104000>;
773 regulator-max-microvolt = <1200000>;
774 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
775 regulator-allow-set-load;
776 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
777 RPMH_REGULATOR_MODE_HPM>;
778 };
779
780 vreg_l3n_2p8: ldo3 {
781 regulator-name = "vreg_l3n_2p8";
782 regulator-min-microvolt = <2800000>;
783 regulator-max-microvolt = <3000000>;
784 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
785 };
786
787 vreg_l4n_2p8: ldo4 {
788 regulator-name = "vreg_l4n_2p8";
789 regulator-min-microvolt = <2800000>;
790 regulator-max-microvolt = <3300000>;
791 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
792 };
793
794 vreg_l5n_1p8: ldo5 {
795 regulator-name = "vreg_l5n_1p8";
796 regulator-min-microvolt = <1800000>;
797 regulator-max-microvolt = <1800000>;
798 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
799 };
800
801 vreg_l6n_3p3: ldo6 {
802 regulator-name = "vreg_l6n_3p3";
803 regulator-min-microvolt = <2800000>;
804 regulator-max-microvolt = <3304000>;
805 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
806 };
807
808 vreg_l7n_2p96: ldo7 {
809 regulator-name = "vreg_l7n_2p96";
810 regulator-min-microvolt = <2800000>;
811 regulator-max-microvolt = <2960000>;
812 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
813 };
814 };
815 };
816
817 &i2c0 {
818 clock-frequency = <400000>;
819 status = "okay";
820
821 lt9611_codec: hdmi-bridge@2b {
822 compatible = "lontium,lt9611uxc";
823 reg = <0x2b>;
824
825 interrupts-extended = <&tlmm 8 IRQ_TYPE_EDGE_FALLING>;
826
827 reset-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
828
829 vdd-supply = <<9611_1v2>;
830 vcc-supply = <<9611_3v3>;
831
832 pinctrl-0 = <<9611_irq_pin>, <<9611_rst_pin>;
833 pinctrl-names = "default";
834
835 ports {
836 #address-cells = <1>;
837 #size-cells = <0>;
838
839 port@0 {
840 reg = <0>;
841
842 lt9611_a: endpoint {
843 remote-endpoint = <&mdss_dsi0_out>;
844 };
845 };
846
847 port@2 {
848 reg = <2>;
849
850 lt9611_out: endpoint {
851 remote-endpoint = <&hdmi_connector_out>;
852 };
853 };
854 };
855 };
856 };
857
858 &i2c_hub_2 {
859 status = "okay";
860
861 typec-mux@42 {
862 compatible = "fcs,fsa4480";
863 reg = <0x42>;
864
865 vcc-supply = <&vreg_bob1>;
866
867 mode-switch;
868 orientation-switch;
869
870 port {
871 fsa4480_sbu_mux: endpoint {
872 remote-endpoint = <&pmic_glink_sbu>;
873 };
874 };
875 };
876 };
877
878 &i2c_master_hub_0 {
879 status = "okay";
880 };
881
882 &ipa {
883 qcom,gsi-loader = "self";
884 memory-region = <&ipa_fw_mem>;
885 firmware-name = "qcom/sm8550/ipa_fws.mbn";
886 status = "okay";
887 };
888
889 &gpi_dma1 {
890 status = "okay";
891 };
892
893 &gpu {
894 status = "okay";
895
896 zap-shader {
897 firmware-name = "qcom/sm8550/a740_zap.mbn";
898 };
899 };
900
901 &lpass_tlmm {
902 spkr_1_sd_n_active: spkr-1-sd-n-active-state {
903 pins = "gpio17";
904 function = "gpio";
905 drive-strength = <16>;
906 bias-disable;
907 output-low;
908 };
909
910 spkr_2_sd_n_active: spkr-2-sd-n-active-state {
911 pins = "gpio18";
912 function = "gpio";
913 drive-strength = <16>;
914 bias-disable;
915 output-low;
916 };
917 };
918
919 &mdss {
920 status = "okay";
921 };
922
923 &mdss_dsi0 {
924 vdda-supply = <&vreg_l3e_1p2>;
925 status = "okay";
926 };
927
928 &mdss_dsi0_out {
929 remote-endpoint = <<9611_a>;
930 data-lanes = <0 1 2 3>;
931 };
932
933 &mdss_dsi0_phy {
934 vdds-supply = <&vreg_l1e_0p88>;
935 status = "okay";
936 };
937
938 &mdss_dp0 {
939 status = "okay";
940 };
941
942 &mdss_dp0_out {
943 data-lanes = <0 1>;
944 };
945
946 &pcie0 {
947 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
948 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
949
950 pinctrl-0 = <&pcie0_default_state>;
951 pinctrl-names = "default";
952
953 status = "okay";
954 };
955
956 &pcie0_phy {
957 vdda-phy-supply = <&vreg_l1e_0p88>;
958 vdda-pll-supply = <&vreg_l3e_1p2>;
959
960 status = "okay";
961 };
962
963 &pcie1 {
964 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
965 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
966
967 pinctrl-0 = <&pcie1_default_state>;
968 pinctrl-names = "default";
969
970 status = "okay";
971 };
972
973 &pcie1_phy {
974 vdda-phy-supply = <&vreg_l3c_0p9>;
975 vdda-pll-supply = <&vreg_l3e_1p2>;
976 vdda-qref-supply = <&vreg_l1e_0p88>;
977
978 status = "okay";
979 };
980
981 &pm8550_gpios {
982 sdc2_card_det_n: sdc2-card-det-state {
983 pins = "gpio12";
984 function = "normal";
985 input-enable;
986 output-disable;
987 bias-pull-up;
988 power-source = <1>; /* 1.8 V */
989 };
990
991 volume_up_n: volume-up-n-state {
992 pins = "gpio6";
993 function = "normal";
994 power-source = <1>;
995 bias-pull-up;
996 input-enable;
997 };
998 };
999
1000 /* The RGB signals are routed to 3 separate LEDs on the HDK8550 */
1001 &pm8550_pwm {
1002 #address-cells = <1>;
1003 #size-cells = <0>;
1004
1005 status = "okay";
1006
1007 led@1 {
1008 reg = <1>;
1009 function = LED_FUNCTION_STATUS;
1010 color = <LED_COLOR_ID_RED>;
1011 default-state = "off";
1012 };
1013
1014 led@2 {
1015 reg = <2>;
1016 function = LED_FUNCTION_STATUS;
1017 color = <LED_COLOR_ID_GREEN>;
1018 default-state = "off";
1019 };
1020
1021 led@3 {
1022 reg = <3>;
1023 function = LED_FUNCTION_STATUS;
1024 color = <LED_COLOR_ID_BLUE>;
1025 default-state = "off";
1026 };
1027 };
1028
1029 &pm8550b_eusb2_repeater {
1030 vdd18-supply = <&vreg_l15b_1p8>;
1031 vdd3-supply = <&vreg_l5b_3p1>;
1032 };
1033
1034 &pon_pwrkey {
1035 status = "okay";
1036 };
1037
1038 &pon_resin {
1039 linux,code = <KEY_VOLUMEDOWN>;
1040
1041 status = "okay";
1042 };
1043
1044 &qupv3_id_0 {
1045 status = "okay";
1046 };
1047
1048 &qupv3_id_1 {
1049 status = "okay";
1050 };
1051
1052 &remoteproc_adsp {
1053 firmware-name = "qcom/sm8550/adsp.mbn",
1054 "qcom/sm8550/adsp_dtb.mbn";
1055 status = "okay";
1056 };
1057
1058 &remoteproc_cdsp {
1059 firmware-name = "qcom/sm8550/cdsp.mbn",
1060 "qcom/sm8550/cdsp_dtb.mbn";
1061 status = "okay";
1062 };
1063
1064 &remoteproc_mpss {
1065 firmware-name = "qcom/sm8550/modem.mbn",
1066 "qcom/sm8550/modem_dtb.mbn";
1067 status = "okay";
1068 };
1069
1070 &sdhc_2 {
1071 cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_HIGH>;
1072
1073 pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>;
1074 pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>;
1075 pinctrl-names = "default", "sleep";
1076
1077 vmmc-supply = <&vreg_l9b_2p9>;
1078 vqmmc-supply = <&vreg_l8b_1p8>;
1079
1080 bus-width = <4>;
1081 no-sdio;
1082 no-mmc;
1083
1084 status = "okay";
1085 };
1086
1087 &sleep_clk {
1088 clock-frequency = <32000>;
1089 };
1090
1091 &swr0 {
1092 status = "okay";
1093
1094 /* WSA8845, Speaker North */
1095 north_spkr: speaker@0,0 {
1096 compatible = "sdw20217020400";
1097 reg = <0 0>;
1098
1099 pinctrl-0 = <&spkr_1_sd_n_active>;
1100 pinctrl-names = "default";
1101
1102 powerdown-gpios = <&lpass_tlmm 17 GPIO_ACTIVE_LOW>;
1103
1104 vdd-1p8-supply = <&vreg_l15b_1p8>;
1105 vdd-io-supply = <&vreg_l15b_1p8>;
1106
1107 #sound-dai-cells = <0>;
1108 sound-name-prefix = "SpkrLeft";
1109 qcom,port-mapping = <1 2 3 7 10 13>;
1110 };
1111
1112 /* WSA8845, Speaker South */
1113 south_spkr: speaker@0,1 {
1114 compatible = "sdw20217020400";
1115 reg = <0 1>;
1116
1117 pinctrl-0 = <&spkr_2_sd_n_active>;
1118 pinctrl-names = "default";
1119
1120 powerdown-gpios = <&lpass_tlmm 18 GPIO_ACTIVE_LOW>;
1121
1122 vdd-1p8-supply = <&vreg_l15b_1p8>;
1123 vdd-io-supply = <&vreg_l15b_1p8>;
1124
1125 #sound-dai-cells = <0>;
1126 sound-name-prefix = "SpkrRight";
1127 qcom,port-mapping = <4 5 6 7 11 13>;
1128 };
1129 };
1130
1131 &swr1 {
1132 status = "okay";
1133
1134 /* WCD9385 RX */
1135 wcd_rx: codec@0,4 {
1136 compatible = "sdw20217010d00";
1137 reg = <0 4>;
1138
1139 /*
1140 * WCD9385 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R)
1141 * WCD9385 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH)
1142 * WCD9385 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R)
1143 * WCD9385 RX Port 4 (LO) <=> SWR1 Port 4 (LO)
1144 * WCD9385 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R)
1145 */
1146 qcom,rx-port-mapping = <1 2 3 4 5>;
1147 };
1148 };
1149
1150 &swr2 {
1151 status = "okay";
1152
1153 /* WCD9385 TX */
1154 wcd_tx: codec@0,3 {
1155 compatible = "sdw20217010d00";
1156 reg = <0 3>;
1157
1158 /*
1159 * WCD9385 TX Port 1 (ADC1,2) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1160 * WCD9385 TX Port 2 (ADC3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1161 * WCD9385 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)
1162 * WCD9385 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)
1163 */
1164 qcom,tx-port-mapping = <2 2 3 4>;
1165 };
1166 };
1167
1168 &tlmm {
1169 /* Reserved I/Os for NFC */
1170 gpio-reserved-ranges = <32 8>;
1171
1172 bt_default: bt-default-state {
1173 bt-en-pins {
1174 pins = "gpio81";
1175 function = "gpio";
1176 drive-strength = <16>;
1177 bias-disable;
1178 };
1179
1180 sw-ctrl-pins {
1181 pins = "gpio82";
1182 function = "gpio";
1183 bias-pull-down;
1184 };
1185 };
1186
1187 lt9611_irq_pin: lt9611-irq-state {
1188 pins = "gpio8";
1189 function = "gpio";
1190 bias-disable;
1191 };
1192
1193 lt9611_rst_pin: lt9611-rst-state {
1194 pins = "gpio7";
1195 function = "gpio";
1196 output-high;
1197 };
1198
1199 wcd_default: wcd-reset-n-active-state {
1200 pins = "gpio108";
1201 function = "gpio";
1202 drive-strength = <16>;
1203 bias-disable;
1204 output-low;
1205 };
1206 };
1207
1208 &uart7 {
1209 status = "okay";
1210 };
1211
1212 &uart14 {
1213 status = "okay";
1214
1215 bluetooth {
1216 compatible = "qcom,wcn7850-bt";
1217
1218 vddio-supply = <&vreg_l15b_1p8>;
1219 vddaon-supply = <&vreg_s4e_0p95>;
1220 vdddig-supply = <&vreg_s4e_0p95>;
1221 vddrfa0p8-supply = <&vreg_s4e_0p95>;
1222 vddrfa1p2-supply = <&vreg_s4g_1p25>;
1223 vddrfa1p9-supply = <&vreg_s6g_1p86>;
1224
1225 max-speed = <3200000>;
1226
1227 enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
1228 swctrl-gpios = <&tlmm 82 GPIO_ACTIVE_HIGH>;
1229
1230 pinctrl-0 = <&bt_default>;
1231 pinctrl-names = "default";
1232 };
1233 };
1234
1235 &ufs_mem_hc {
1236 reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
1237
1238 vcc-supply = <&vreg_l17b_2p5>;
1239 vcc-max-microamp = <1300000>;
1240 vccq-supply = <&vreg_l1g_1p2>;
1241 vccq-max-microamp = <1200000>;
1242 vdd-hba-supply = <&vreg_l3g_1p2>;
1243
1244 status = "okay";
1245 };
1246
1247 &ufs_mem_phy {
1248 vdda-phy-supply = <&vreg_l1d_0p88>;
1249 vdda-pll-supply = <&vreg_l3e_1p2>;
1250
1251 status = "okay";
1252 };
1253
1254 &usb_1 {
1255 status = "okay";
1256 };
1257
1258 &usb_1_dwc3_hs {
1259 remote-endpoint = <&pmic_glink_hs_in>;
1260 };
1261
1262 &usb_1_hsphy {
1263 vdd-supply = <&vreg_l1e_0p88>;
1264 vdda12-supply = <&vreg_l3e_1p2>;
1265
1266 phys = <&pm8550b_eusb2_repeater>;
1267
1268 status = "okay";
1269 };
1270
1271 &usb_dp_qmpphy {
1272 vdda-phy-supply = <&vreg_l3e_1p2>;
1273 vdda-pll-supply = <&vreg_l3f_0p88>;
1274
1275 status = "okay";
1276 };
1277
1278 &usb_dp_qmpphy_out {
1279 remote-endpoint = <&pmic_glink_ss_in>;
1280 };
1281
1282 &xo_board {
1283 clock-frequency = <76800000>;
1284 };
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