1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779g0-sysc.h>
11
12 / {
13 compatible = "renesas,r8a779g0";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 /* External Audio clock - to be overridden by boards that provide it */
18 audio_clkin: audio_clkin {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
22 };
23
24 /* External CAN clock - to be overridden by boards that provide it */
25 can_clk: can {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
29 };
30
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
33 opp-shared;
34
35 opp-500000000 {
36 opp-hz = /bits/ 64 <500000000>;
37 opp-microvolt = <825000>;
38 clock-latency-ns = <500000>;
39 };
40 opp-1000000000 {
41 opp-hz = /bits/ 64 <1000000000>;
42 opp-microvolt = <825000>;
43 clock-latency-ns = <500000>;
44 };
45 opp-1500000000 {
46 opp-hz = /bits/ 64 <1500000000>;
47 opp-microvolt = <825000>;
48 clock-latency-ns = <500000>;
49 };
50 opp-1700000000 {
51 opp-hz = /bits/ 64 <1700000000>;
52 opp-microvolt = <825000>;
53 clock-latency-ns = <500000>;
54 opp-suspend;
55 };
56 opp-1800000000 {
57 opp-hz = /bits/ 64 <1800000000>;
58 opp-microvolt = <880000>;
59 clock-latency-ns = <500000>;
60 turbo-mode;
61 };
62 };
63
64 cpus {
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 cpu-map {
69 cluster0 {
70 core0 {
71 cpu = <&a76_0>;
72 };
73 core1 {
74 cpu = <&a76_1>;
75 };
76 };
77
78 cluster1 {
79 core0 {
80 cpu = <&a76_2>;
81 };
82 core1 {
83 cpu = <&a76_3>;
84 };
85 };
86 };
87
88 a76_0: cpu@0 {
89 compatible = "arm,cortex-a76";
90 reg = <0>;
91 device_type = "cpu";
92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>;
93 next-level-cache = <&L3_CA76_0>;
94 enable-method = "psci";
95 cpu-idle-states = <&CPU_SLEEP_0>;
96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
97 operating-points-v2 = <&cluster0_opp>;
98 };
99
100 a76_1: cpu@100 {
101 compatible = "arm,cortex-a76";
102 reg = <0x100>;
103 device_type = "cpu";
104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>;
105 next-level-cache = <&L3_CA76_0>;
106 enable-method = "psci";
107 cpu-idle-states = <&CPU_SLEEP_0>;
108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
109 operating-points-v2 = <&cluster0_opp>;
110 };
111
112 a76_2: cpu@10000 {
113 compatible = "arm,cortex-a76";
114 reg = <0x10000>;
115 device_type = "cpu";
116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>;
117 next-level-cache = <&L3_CA76_1>;
118 enable-method = "psci";
119 cpu-idle-states = <&CPU_SLEEP_0>;
120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
121 operating-points-v2 = <&cluster0_opp>;
122 };
123
124 a76_3: cpu@10100 {
125 compatible = "arm,cortex-a76";
126 reg = <0x10100>;
127 device_type = "cpu";
128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>;
129 next-level-cache = <&L3_CA76_1>;
130 enable-method = "psci";
131 cpu-idle-states = <&CPU_SLEEP_0>;
132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
133 operating-points-v2 = <&cluster0_opp>;
134 };
135
136 idle-states {
137 entry-method = "psci";
138
139 CPU_SLEEP_0: cpu-sleep-0 {
140 compatible = "arm,idle-state";
141 arm,psci-suspend-param = <0x0010000>;
142 local-timer-stop;
143 entry-latency-us = <400>;
144 exit-latency-us = <500>;
145 min-residency-us = <4000>;
146 };
147 };
148
149 L3_CA76_0: cache-controller-0 {
150 compatible = "cache";
151 power-domains = <&sysc R8A779G0_PD_A2E0D0>;
152 cache-unified;
153 cache-level = <3>;
154 };
155
156 L3_CA76_1: cache-controller-1 {
157 compatible = "cache";
158 power-domains = <&sysc R8A779G0_PD_A2E0D1>;
159 cache-unified;
160 cache-level = <3>;
161 };
162 };
163
164 extal_clk: extal {
165 compatible = "fixed-clock";
166 #clock-cells = <0>;
167 /* This value must be overridden by the board */
168 clock-frequency = <0>;
169 };
170
171 extalr_clk: extalr {
172 compatible = "fixed-clock";
173 #clock-cells = <0>;
174 /* This value must be overridden by the board */
175 clock-frequency = <0>;
176 };
177
178 pmu_a76 {
179 compatible = "arm,cortex-a76-pmu";
180 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
181 };
182
183 psci {
184 compatible = "arm,psci-1.0", "arm,psci-0.2";
185 method = "smc";
186 };
187
188 /* External SCIF clocks - to be overridden by boards that provide them */
189 scif_clk: scif {
190 compatible = "fixed-clock";
191 #clock-cells = <0>;
192 clock-frequency = <0>;
193 };
194
195 scif_clk2: scif2 {
196 compatible = "fixed-clock";
197 #clock-cells = <0>;
198 clock-frequency = <0>;
199 };
200
201 soc: soc {
202 compatible = "simple-bus";
203 interrupt-parent = <&gic>;
204 #address-cells = <2>;
205 #size-cells = <2>;
206 ranges;
207
208 rwdt: watchdog@e6020000 {
209 compatible = "renesas,r8a779g0-wdt",
210 "renesas,rcar-gen4-wdt";
211 reg = <0 0xe6020000 0 0x0c>;
212 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
213 clocks = <&cpg CPG_MOD 907>;
214 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
215 resets = <&cpg 907>;
216 status = "disabled";
217 };
218
219 pfc: pinctrl@e6050000 {
220 compatible = "renesas,pfc-r8a779g0";
221 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
222 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
223 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
224 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>,
225 <0 0xe6068000 0 0x16c>;
226 };
227
228 gpio0: gpio@e6050180 {
229 compatible = "renesas,gpio-r8a779g0",
230 "renesas,rcar-gen4-gpio";
231 reg = <0 0xe6050180 0 0x54>;
232 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
233 clocks = <&cpg CPG_MOD 915>;
234 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
235 resets = <&cpg 915>;
236 gpio-controller;
237 #gpio-cells = <2>;
238 gpio-ranges = <&pfc 0 0 19>;
239 interrupt-controller;
240 #interrupt-cells = <2>;
241 };
242
243 gpio1: gpio@e6050980 {
244 compatible = "renesas,gpio-r8a779g0",
245 "renesas,rcar-gen4-gpio";
246 reg = <0 0xe6050980 0 0x54>;
247 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
248 clocks = <&cpg CPG_MOD 915>;
249 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
250 resets = <&cpg 915>;
251 gpio-controller;
252 #gpio-cells = <2>;
253 gpio-ranges = <&pfc 0 32 29>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
256 };
257
258 gpio2: gpio@e6058180 {
259 compatible = "renesas,gpio-r8a779g0",
260 "renesas,rcar-gen4-gpio";
261 reg = <0 0xe6058180 0 0x54>;
262 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
263 clocks = <&cpg CPG_MOD 916>;
264 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
265 resets = <&cpg 916>;
266 gpio-controller;
267 #gpio-cells = <2>;
268 gpio-ranges = <&pfc 0 64 20>;
269 interrupt-controller;
270 #interrupt-cells = <2>;
271 };
272
273 gpio3: gpio@e6058980 {
274 compatible = "renesas,gpio-r8a779g0",
275 "renesas,rcar-gen4-gpio";
276 reg = <0 0xe6058980 0 0x54>;
277 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&cpg CPG_MOD 916>;
279 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
280 resets = <&cpg 916>;
281 gpio-controller;
282 #gpio-cells = <2>;
283 gpio-ranges = <&pfc 0 96 30>;
284 interrupt-controller;
285 #interrupt-cells = <2>;
286 };
287
288 gpio4: gpio@e6060180 {
289 compatible = "renesas,gpio-r8a779g0",
290 "renesas,rcar-gen4-gpio";
291 reg = <0 0xe6060180 0 0x54>;
292 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&cpg CPG_MOD 917>;
294 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
295 resets = <&cpg 917>;
296 gpio-controller;
297 #gpio-cells = <2>;
298 gpio-ranges = <&pfc 0 128 25>;
299 interrupt-controller;
300 #interrupt-cells = <2>;
301 };
302
303 gpio5: gpio@e6060980 {
304 compatible = "renesas,gpio-r8a779g0",
305 "renesas,rcar-gen4-gpio";
306 reg = <0 0xe6060980 0 0x54>;
307 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
308 clocks = <&cpg CPG_MOD 917>;
309 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
310 resets = <&cpg 917>;
311 gpio-controller;
312 #gpio-cells = <2>;
313 gpio-ranges = <&pfc 0 160 21>;
314 interrupt-controller;
315 #interrupt-cells = <2>;
316 };
317
318 gpio6: gpio@e6061180 {
319 compatible = "renesas,gpio-r8a779g0",
320 "renesas,rcar-gen4-gpio";
321 reg = <0 0xe6061180 0 0x54>;
322 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
323 clocks = <&cpg CPG_MOD 917>;
324 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
325 resets = <&cpg 917>;
326 gpio-controller;
327 #gpio-cells = <2>;
328 gpio-ranges = <&pfc 0 192 21>;
329 interrupt-controller;
330 #interrupt-cells = <2>;
331 };
332
333 gpio7: gpio@e6061980 {
334 compatible = "renesas,gpio-r8a779g0",
335 "renesas,rcar-gen4-gpio";
336 reg = <0 0xe6061980 0 0x54>;
337 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
338 clocks = <&cpg CPG_MOD 917>;
339 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
340 resets = <&cpg 917>;
341 gpio-controller;
342 #gpio-cells = <2>;
343 gpio-ranges = <&pfc 0 224 21>;
344 interrupt-controller;
345 #interrupt-cells = <2>;
346 };
347
348 gpio8: gpio@e6068180 {
349 compatible = "renesas,gpio-r8a779g0",
350 "renesas,rcar-gen4-gpio";
351 reg = <0 0xe6068180 0 0x54>;
352 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>;
353 clocks = <&cpg CPG_MOD 918>;
354 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
355 resets = <&cpg 918>;
356 gpio-controller;
357 #gpio-cells = <2>;
358 gpio-ranges = <&pfc 0 256 14>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
361 };
362
363 cmt0: timer@e60f0000 {
364 compatible = "renesas,r8a779g0-cmt0",
365 "renesas,rcar-gen4-cmt0";
366 reg = <0 0xe60f0000 0 0x1004>;
367 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 910>;
370 clock-names = "fck";
371 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
372 resets = <&cpg 910>;
373 status = "disabled";
374 };
375
376 cmt1: timer@e6130000 {
377 compatible = "renesas,r8a779g0-cmt1",
378 "renesas,rcar-gen4-cmt1";
379 reg = <0 0xe6130000 0 0x1004>;
380 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 911>;
389 clock-names = "fck";
390 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
391 resets = <&cpg 911>;
392 status = "disabled";
393 };
394
395 cmt2: timer@e6140000 {
396 compatible = "renesas,r8a779g0-cmt1",
397 "renesas,rcar-gen4-cmt1";
398 reg = <0 0xe6140000 0 0x1004>;
399 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
400 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
401 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
403 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
404 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 912>;
408 clock-names = "fck";
409 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
410 resets = <&cpg 912>;
411 status = "disabled";
412 };
413
414 cmt3: timer@e6148000 {
415 compatible = "renesas,r8a779g0-cmt1",
416 "renesas,rcar-gen4-cmt1";
417 reg = <0 0xe6148000 0 0x1004>;
418 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
420 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
421 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
424 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
425 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
426 clocks = <&cpg CPG_MOD 913>;
427 clock-names = "fck";
428 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
429 resets = <&cpg 913>;
430 status = "disabled";
431 };
432
433 cpg: clock-controller@e6150000 {
434 compatible = "renesas,r8a779g0-cpg-mssr";
435 reg = <0 0xe6150000 0 0x4000>;
436 clocks = <&extal_clk>, <&extalr_clk>;
437 clock-names = "extal", "extalr";
438 #clock-cells = <2>;
439 #power-domain-cells = <0>;
440 #reset-cells = <1>;
441 };
442
443 rst: reset-controller@e6160000 {
444 compatible = "renesas,r8a779g0-rst";
445 reg = <0 0xe6160000 0 0x4000>;
446 };
447
448 sysc: system-controller@e6180000 {
449 compatible = "renesas,r8a779g0-sysc";
450 reg = <0 0xe6180000 0 0x4000>;
451 #power-domain-cells = <1>;
452 };
453
454 tsc: thermal@e6198000 {
455 compatible = "renesas,r8a779g0-thermal";
456 reg = <0 0xe6198000 0 0x200>,
457 <0 0xe61a0000 0 0x200>,
458 <0 0xe61a8000 0 0x200>,
459 <0 0xe61b0000 0 0x200>;
460 clocks = <&cpg CPG_MOD 919>;
461 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
462 resets = <&cpg 919>;
463 #thermal-sensor-cells = <1>;
464 };
465
466 intc_ex: interrupt-controller@e61c0000 {
467 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc";
468 #interrupt-cells = <2>;
469 interrupt-controller;
470 reg = <0 0xe61c0000 0 0x200>;
471 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
477 clocks = <&cpg CPG_MOD 611>;
478 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
479 resets = <&cpg 611>;
480 };
481
482 tmu0: timer@e61e0000 {
483 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
484 reg = <0 0xe61e0000 0 0x30>;
485 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
488 interrupt-names = "tuni0", "tuni1", "tuni2";
489 clocks = <&cpg CPG_MOD 713>;
490 clock-names = "fck";
491 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
492 resets = <&cpg 713>;
493 status = "disabled";
494 };
495
496 tmu1: timer@e6fc0000 {
497 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
498 reg = <0 0xe6fc0000 0 0x30>;
499 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
501 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
502 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>;
503 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
504 clocks = <&cpg CPG_MOD 714>;
505 clock-names = "fck";
506 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
507 resets = <&cpg 714>;
508 status = "disabled";
509 };
510
511 tmu2: timer@e6fd0000 {
512 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
513 reg = <0 0xe6fd0000 0 0x30>;
514 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
515 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
516 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
517 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
518 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
519 clocks = <&cpg CPG_MOD 715>;
520 clock-names = "fck";
521 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
522 resets = <&cpg 715>;
523 status = "disabled";
524 };
525
526 tmu3: timer@e6fe0000 {
527 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
528 reg = <0 0xe6fe0000 0 0x30>;
529 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
533 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
534 clocks = <&cpg CPG_MOD 716>;
535 clock-names = "fck";
536 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
537 resets = <&cpg 716>;
538 status = "disabled";
539 };
540
541 tmu4: timer@ffc00000 {
542 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
543 reg = <0 0xffc00000 0 0x30>;
544 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
548 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
549 clocks = <&cpg CPG_MOD 717>;
550 clock-names = "fck";
551 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
552 resets = <&cpg 717>;
553 status = "disabled";
554 };
555
556 i2c0: i2c@e6500000 {
557 compatible = "renesas,i2c-r8a779g0",
558 "renesas,rcar-gen4-i2c";
559 reg = <0 0xe6500000 0 0x40>;
560 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
561 clocks = <&cpg CPG_MOD 518>;
562 dmas = <&dmac0 0x91>, <&dmac0 0x90>,
563 <&dmac1 0x91>, <&dmac1 0x90>;
564 dma-names = "tx", "rx", "tx", "rx";
565 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
566 resets = <&cpg 518>;
567 i2c-scl-internal-delay-ns = <110>;
568 #address-cells = <1>;
569 #size-cells = <0>;
570 status = "disabled";
571 };
572
573 i2c1: i2c@e6508000 {
574 compatible = "renesas,i2c-r8a779g0",
575 "renesas,rcar-gen4-i2c";
576 reg = <0 0xe6508000 0 0x40>;
577 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>;
578 clocks = <&cpg CPG_MOD 519>;
579 dmas = <&dmac0 0x93>, <&dmac0 0x92>,
580 <&dmac1 0x93>, <&dmac1 0x92>;
581 dma-names = "tx", "rx", "tx", "rx";
582 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
583 resets = <&cpg 519>;
584 i2c-scl-internal-delay-ns = <110>;
585 #address-cells = <1>;
586 #size-cells = <0>;
587 status = "disabled";
588 };
589
590 i2c2: i2c@e6510000 {
591 compatible = "renesas,i2c-r8a779g0",
592 "renesas,rcar-gen4-i2c";
593 reg = <0 0xe6510000 0 0x40>;
594 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&cpg CPG_MOD 520>;
596 dmas = <&dmac0 0x95>, <&dmac0 0x94>,
597 <&dmac1 0x95>, <&dmac1 0x94>;
598 dma-names = "tx", "rx", "tx", "rx";
599 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
600 resets = <&cpg 520>;
601 i2c-scl-internal-delay-ns = <110>;
602 #address-cells = <1>;
603 #size-cells = <0>;
604 status = "disabled";
605 };
606
607 i2c3: i2c@e66d0000 {
608 compatible = "renesas,i2c-r8a779g0",
609 "renesas,rcar-gen4-i2c";
610 reg = <0 0xe66d0000 0 0x40>;
611 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
612 clocks = <&cpg CPG_MOD 521>;
613 dmas = <&dmac0 0x97>, <&dmac0 0x96>,
614 <&dmac1 0x97>, <&dmac1 0x96>;
615 dma-names = "tx", "rx", "tx", "rx";
616 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
617 resets = <&cpg 521>;
618 i2c-scl-internal-delay-ns = <110>;
619 #address-cells = <1>;
620 #size-cells = <0>;
621 status = "disabled";
622 };
623
624 i2c4: i2c@e66d8000 {
625 compatible = "renesas,i2c-r8a779g0",
626 "renesas,rcar-gen4-i2c";
627 reg = <0 0xe66d8000 0 0x40>;
628 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&cpg CPG_MOD 522>;
630 dma-names = "tx", "rx", "tx", "rx";
631 dmas = <&dmac0 0x99>, <&dmac0 0x98>,
632 <&dmac1 0x99>, <&dmac1 0x98>;
633 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
634 resets = <&cpg 522>;
635 i2c-scl-internal-delay-ns = <110>;
636 #address-cells = <1>;
637 #size-cells = <0>;
638 status = "disabled";
639 };
640
641 i2c5: i2c@e66e0000 {
642 compatible = "renesas,i2c-r8a779g0",
643 "renesas,rcar-gen4-i2c";
644 reg = <0 0xe66e0000 0 0x40>;
645 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&cpg CPG_MOD 523>;
647 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>,
648 <&dmac1 0x9b>, <&dmac1 0x9a>;
649 dma-names = "tx", "rx", "tx", "rx";
650 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
651 resets = <&cpg 523>;
652 i2c-scl-internal-delay-ns = <110>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 status = "disabled";
656 };
657
658 hscif0: serial@e6540000 {
659 compatible = "renesas,hscif-r8a779g0",
660 "renesas,rcar-gen4-hscif", "renesas,hscif";
661 reg = <0 0xe6540000 0 0x60>;
662 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
663 clocks = <&cpg CPG_MOD 514>,
664 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
665 <&scif_clk>;
666 clock-names = "fck", "brg_int", "scif_clk";
667 dmas = <&dmac0 0x31>, <&dmac0 0x30>,
668 <&dmac1 0x31>, <&dmac1 0x30>;
669 dma-names = "tx", "rx", "tx", "rx";
670 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
671 resets = <&cpg 514>;
672 status = "disabled";
673 };
674
675 hscif1: serial@e6550000 {
676 compatible = "renesas,hscif-r8a779g0",
677 "renesas,rcar-gen4-hscif", "renesas,hscif";
678 reg = <0 0xe6550000 0 0x60>;
679 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&cpg CPG_MOD 515>,
681 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
682 <&scif_clk>;
683 clock-names = "fck", "brg_int", "scif_clk";
684 dmas = <&dmac0 0x33>, <&dmac0 0x32>,
685 <&dmac1 0x33>, <&dmac1 0x32>;
686 dma-names = "tx", "rx", "tx", "rx";
687 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
688 resets = <&cpg 515>;
689 status = "disabled";
690 };
691
692 hscif2: serial@e6560000 {
693 compatible = "renesas,hscif-r8a779g0",
694 "renesas,rcar-gen4-hscif", "renesas,hscif";
695 reg = <0 0xe6560000 0 0x60>;
696 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
697 clocks = <&cpg CPG_MOD 516>,
698 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
699 <&scif_clk2>;
700 clock-names = "fck", "brg_int", "scif_clk";
701 dmas = <&dmac0 0x35>, <&dmac0 0x34>,
702 <&dmac1 0x35>, <&dmac1 0x34>;
703 dma-names = "tx", "rx", "tx", "rx";
704 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
705 resets = <&cpg 516>;
706 status = "disabled";
707 };
708
709 hscif3: serial@e66a0000 {
710 compatible = "renesas,hscif-r8a779g0",
711 "renesas,rcar-gen4-hscif", "renesas,hscif";
712 reg = <0 0xe66a0000 0 0x60>;
713 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
714 clocks = <&cpg CPG_MOD 517>,
715 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
716 <&scif_clk>;
717 clock-names = "fck", "brg_int", "scif_clk";
718 dmas = <&dmac0 0x37>, <&dmac0 0x36>,
719 <&dmac1 0x37>, <&dmac1 0x36>;
720 dma-names = "tx", "rx", "tx", "rx";
721 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
722 resets = <&cpg 517>;
723 status = "disabled";
724 };
725
726 canfd: can@e6660000 {
727 compatible = "renesas,r8a779g0-canfd",
728 "renesas,rcar-gen4-canfd";
729 reg = <0 0xe6660000 0 0x8500>;
730 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
731 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
732 interrupt-names = "ch_int", "g_int";
733 clocks = <&cpg CPG_MOD 328>,
734 <&cpg CPG_CORE R8A779G0_CLK_CANFD>,
735 <&can_clk>;
736 clock-names = "fck", "canfd", "can_clk";
737 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>;
738 assigned-clock-rates = <80000000>;
739 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
740 resets = <&cpg 328>;
741 status = "disabled";
742
743 channel0 {
744 status = "disabled";
745 };
746
747 channel1 {
748 status = "disabled";
749 };
750
751 channel2 {
752 status = "disabled";
753 };
754
755 channel3 {
756 status = "disabled";
757 };
758
759 channel4 {
760 status = "disabled";
761 };
762
763 channel5 {
764 status = "disabled";
765 };
766
767 channel6 {
768 status = "disabled";
769 };
770
771 channel7 {
772 status = "disabled";
773 };
774 };
775
776 avb0: ethernet@e6800000 {
777 compatible = "renesas,etheravb-r8a779g0",
778 "renesas,etheravb-rcar-gen4";
779 reg = <0 0xe6800000 0 0x1000>;
780 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
805 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
806 "ch5", "ch6", "ch7", "ch8", "ch9",
807 "ch10", "ch11", "ch12", "ch13",
808 "ch14", "ch15", "ch16", "ch17",
809 "ch18", "ch19", "ch20", "ch21",
810 "ch22", "ch23", "ch24";
811 clocks = <&cpg CPG_MOD 211>;
812 clock-names = "fck";
813 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
814 resets = <&cpg 211>;
815 phy-mode = "rgmii";
816 rx-internal-delay-ps = <0>;
817 tx-internal-delay-ps = <0>;
818 status = "disabled";
819 };
820
821 avb1: ethernet@e6810000 {
822 compatible = "renesas,etheravb-r8a779g0",
823 "renesas,etheravb-rcar-gen4";
824 reg = <0 0xe6810000 0 0x1000>;
825 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
826 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
827 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
828 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
830 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
831 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
832 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
836 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
837 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
839 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
840 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
850 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
851 "ch5", "ch6", "ch7", "ch8", "ch9",
852 "ch10", "ch11", "ch12", "ch13",
853 "ch14", "ch15", "ch16", "ch17",
854 "ch18", "ch19", "ch20", "ch21",
855 "ch22", "ch23", "ch24";
856 clocks = <&cpg CPG_MOD 212>;
857 clock-names = "fck";
858 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
859 resets = <&cpg 212>;
860 phy-mode = "rgmii";
861 rx-internal-delay-ps = <0>;
862 tx-internal-delay-ps = <0>;
863 status = "disabled";
864 };
865
866 avb2: ethernet@e6820000 {
867 compatible = "renesas,etheravb-r8a779g0",
868 "renesas,etheravb-rcar-gen4";
869 reg = <0 0xe6820000 0 0x1000>;
870 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
876 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
878 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
879 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
880 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
881 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
882 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
883 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
887 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
888 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
889 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
890 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
892 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
895 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
896 "ch5", "ch6", "ch7", "ch8", "ch9",
897 "ch10", "ch11", "ch12", "ch13",
898 "ch14", "ch15", "ch16", "ch17",
899 "ch18", "ch19", "ch20", "ch21",
900 "ch22", "ch23", "ch24";
901 clocks = <&cpg CPG_MOD 213>;
902 clock-names = "fck";
903 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
904 resets = <&cpg 213>;
905 phy-mode = "rgmii";
906 rx-internal-delay-ps = <0>;
907 tx-internal-delay-ps = <0>;
908 status = "disabled";
909 };
910
911 pwm0: pwm@e6e30000 {
912 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
913 reg = <0 0xe6e30000 0 0x10>;
914 #pwm-cells = <2>;
915 clocks = <&cpg CPG_MOD 628>;
916 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
917 resets = <&cpg 628>;
918 status = "disabled";
919 };
920
921 pwm1: pwm@e6e31000 {
922 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
923 reg = <0 0xe6e31000 0 0x10>;
924 #pwm-cells = <2>;
925 clocks = <&cpg CPG_MOD 628>;
926 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
927 resets = <&cpg 628>;
928 status = "disabled";
929 };
930
931 pwm2: pwm@e6e32000 {
932 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
933 reg = <0 0xe6e32000 0 0x10>;
934 #pwm-cells = <2>;
935 clocks = <&cpg CPG_MOD 628>;
936 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
937 resets = <&cpg 628>;
938 status = "disabled";
939 };
940
941 pwm3: pwm@e6e33000 {
942 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
943 reg = <0 0xe6e33000 0 0x10>;
944 #pwm-cells = <2>;
945 clocks = <&cpg CPG_MOD 628>;
946 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
947 resets = <&cpg 628>;
948 status = "disabled";
949 };
950
951 pwm4: pwm@e6e34000 {
952 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
953 reg = <0 0xe6e34000 0 0x10>;
954 #pwm-cells = <2>;
955 clocks = <&cpg CPG_MOD 628>;
956 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
957 resets = <&cpg 628>;
958 status = "disabled";
959 };
960
961 pwm5: pwm@e6e35000 {
962 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
963 reg = <0 0xe6e35000 0 0x10>;
964 #pwm-cells = <2>;
965 clocks = <&cpg CPG_MOD 628>;
966 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
967 resets = <&cpg 628>;
968 status = "disabled";
969 };
970
971 pwm6: pwm@e6e36000 {
972 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
973 reg = <0 0xe6e36000 0 0x10>;
974 #pwm-cells = <2>;
975 clocks = <&cpg CPG_MOD 628>;
976 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
977 resets = <&cpg 628>;
978 status = "disabled";
979 };
980
981 pwm7: pwm@e6e37000 {
982 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
983 reg = <0 0xe6e37000 0 0x10>;
984 #pwm-cells = <2>;
985 clocks = <&cpg CPG_MOD 628>;
986 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
987 resets = <&cpg 628>;
988 status = "disabled";
989 };
990
991 pwm8: pwm@e6e38000 {
992 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
993 reg = <0 0xe6e38000 0 0x10>;
994 #pwm-cells = <2>;
995 clocks = <&cpg CPG_MOD 628>;
996 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
997 resets = <&cpg 628>;
998 status = "disabled";
999 };
1000
1001 pwm9: pwm@e6e39000 {
1002 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1003 reg = <0 0xe6e39000 0 0x10>;
1004 #pwm-cells = <2>;
1005 clocks = <&cpg CPG_MOD 628>;
1006 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1007 resets = <&cpg 628>;
1008 status = "disabled";
1009 };
1010
1011 scif0: serial@e6e60000 {
1012 compatible = "renesas,scif-r8a779g0",
1013 "renesas,rcar-gen4-scif", "renesas,scif";
1014 reg = <0 0xe6e60000 0 64>;
1015 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
1016 clocks = <&cpg CPG_MOD 702>,
1017 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1018 <&scif_clk>;
1019 clock-names = "fck", "brg_int", "scif_clk";
1020 dmas = <&dmac0 0x51>, <&dmac0 0x50>,
1021 <&dmac1 0x51>, <&dmac1 0x50>;
1022 dma-names = "tx", "rx", "tx", "rx";
1023 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1024 resets = <&cpg 702>;
1025 status = "disabled";
1026 };
1027
1028 scif1: serial@e6e68000 {
1029 compatible = "renesas,scif-r8a779g0",
1030 "renesas,rcar-gen4-scif", "renesas,scif";
1031 reg = <0 0xe6e68000 0 64>;
1032 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
1033 clocks = <&cpg CPG_MOD 703>,
1034 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1035 <&scif_clk>;
1036 clock-names = "fck", "brg_int", "scif_clk";
1037 dmas = <&dmac0 0x53>, <&dmac0 0x52>,
1038 <&dmac1 0x53>, <&dmac1 0x52>;
1039 dma-names = "tx", "rx", "tx", "rx";
1040 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1041 resets = <&cpg 703>;
1042 status = "disabled";
1043 };
1044
1045 scif3: serial@e6c50000 {
1046 compatible = "renesas,scif-r8a779g0",
1047 "renesas,rcar-gen4-scif", "renesas,scif";
1048 reg = <0 0xe6c50000 0 64>;
1049 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
1050 clocks = <&cpg CPG_MOD 704>,
1051 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1052 <&scif_clk>;
1053 clock-names = "fck", "brg_int", "scif_clk";
1054 dmas = <&dmac0 0x57>, <&dmac0 0x56>,
1055 <&dmac1 0x57>, <&dmac1 0x56>;
1056 dma-names = "tx", "rx", "tx", "rx";
1057 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1058 resets = <&cpg 704>;
1059 status = "disabled";
1060 };
1061
1062 scif4: serial@e6c40000 {
1063 compatible = "renesas,scif-r8a779g0",
1064 "renesas,rcar-gen4-scif", "renesas,scif";
1065 reg = <0 0xe6c40000 0 64>;
1066 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
1067 clocks = <&cpg CPG_MOD 705>,
1068 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1069 <&scif_clk2>;
1070 clock-names = "fck", "brg_int", "scif_clk";
1071 dmas = <&dmac0 0x59>, <&dmac0 0x58>,
1072 <&dmac1 0x59>, <&dmac1 0x58>;
1073 dma-names = "tx", "rx", "tx", "rx";
1074 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1075 resets = <&cpg 705>;
1076 status = "disabled";
1077 };
1078
1079 tpu: pwm@e6e80000 {
1080 compatible = "renesas,tpu-r8a779g0", "renesas,tpu";
1081 reg = <0 0xe6e80000 0 0x148>;
1082 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
1083 clocks = <&cpg CPG_MOD 718>;
1084 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1085 resets = <&cpg 718>;
1086 #pwm-cells = <3>;
1087 status = "disabled";
1088 };
1089
1090 msiof0: spi@e6e90000 {
1091 compatible = "renesas,msiof-r8a779g0",
1092 "renesas,rcar-gen4-msiof";
1093 reg = <0 0xe6e90000 0 0x0064>;
1094 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
1095 clocks = <&cpg CPG_MOD 618>;
1096 dmas = <&dmac0 0x41>, <&dmac0 0x40>,
1097 <&dmac1 0x41>, <&dmac1 0x40>;
1098 dma-names = "tx", "rx", "tx", "rx";
1099 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1100 resets = <&cpg 618>;
1101 #address-cells = <1>;
1102 #size-cells = <0>;
1103 status = "disabled";
1104 };
1105
1106 msiof1: spi@e6ea0000 {
1107 compatible = "renesas,msiof-r8a779g0",
1108 "renesas,rcar-gen4-msiof";
1109 reg = <0 0xe6ea0000 0 0x0064>;
1110 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
1111 clocks = <&cpg CPG_MOD 619>;
1112 dmas = <&dmac0 0x43>, <&dmac0 0x42>,
1113 <&dmac1 0x43>, <&dmac1 0x42>;
1114 dma-names = "tx", "rx", "tx", "rx";
1115 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1116 resets = <&cpg 619>;
1117 #address-cells = <1>;
1118 #size-cells = <0>;
1119 status = "disabled";
1120 };
1121
1122 msiof2: spi@e6c00000 {
1123 compatible = "renesas,msiof-r8a779g0",
1124 "renesas,rcar-gen4-msiof";
1125 reg = <0 0xe6c00000 0 0x0064>;
1126 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1127 clocks = <&cpg CPG_MOD 620>;
1128 dmas = <&dmac0 0x45>, <&dmac0 0x44>,
1129 <&dmac1 0x45>, <&dmac1 0x44>;
1130 dma-names = "tx", "rx", "tx", "rx";
1131 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1132 resets = <&cpg 620>;
1133 #address-cells = <1>;
1134 #size-cells = <0>;
1135 status = "disabled";
1136 };
1137
1138 msiof3: spi@e6c10000 {
1139 compatible = "renesas,msiof-r8a779g0",
1140 "renesas,rcar-gen4-msiof";
1141 reg = <0 0xe6c10000 0 0x0064>;
1142 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MOD 621>;
1144 dmas = <&dmac0 0x47>, <&dmac0 0x46>,
1145 <&dmac1 0x47>, <&dmac1 0x46>;
1146 dma-names = "tx", "rx", "tx", "rx";
1147 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1148 resets = <&cpg 621>;
1149 #address-cells = <1>;
1150 #size-cells = <0>;
1151 status = "disabled";
1152 };
1153
1154 msiof4: spi@e6c20000 {
1155 compatible = "renesas,msiof-r8a779g0",
1156 "renesas,rcar-gen4-msiof";
1157 reg = <0 0xe6c20000 0 0x0064>;
1158 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
1159 clocks = <&cpg CPG_MOD 622>;
1160 dmas = <&dmac0 0x49>, <&dmac0 0x48>,
1161 <&dmac1 0x49>, <&dmac1 0x48>;
1162 dma-names = "tx", "rx", "tx", "rx";
1163 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1164 resets = <&cpg 622>;
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1167 status = "disabled";
1168 };
1169
1170 msiof5: spi@e6c28000 {
1171 compatible = "renesas,msiof-r8a779g0",
1172 "renesas,rcar-gen4-msiof";
1173 reg = <0 0xe6c28000 0 0x0064>;
1174 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
1175 clocks = <&cpg CPG_MOD 623>;
1176 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>,
1177 <&dmac1 0x4b>, <&dmac1 0x4a>;
1178 dma-names = "tx", "rx", "tx", "rx";
1179 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1180 resets = <&cpg 623>;
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183 status = "disabled";
1184 };
1185
1186 vin00: video@e6ef0000 {
1187 compatible = "renesas,vin-r8a779g0";
1188 reg = <0 0xe6ef0000 0 0x1000>;
1189 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
1190 clocks = <&cpg CPG_MOD 730>;
1191 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1192 resets = <&cpg 730>;
1193 renesas,id = <0>;
1194 status = "disabled";
1195
1196 ports {
1197 #address-cells = <1>;
1198 #size-cells = <0>;
1199
1200 port@2 {
1201 #address-cells = <1>;
1202 #size-cells = <0>;
1203
1204 reg = <2>;
1205
1206 vin00isp0: endpoint@0 {
1207 reg = <0>;
1208 remote-endpoint = <&isp0vin00>;
1209 };
1210 };
1211 };
1212 };
1213
1214 vin01: video@e6ef1000 {
1215 compatible = "renesas,vin-r8a779g0";
1216 reg = <0 0xe6ef1000 0 0x1000>;
1217 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
1218 clocks = <&cpg CPG_MOD 731>;
1219 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1220 resets = <&cpg 731>;
1221 renesas,id = <1>;
1222 status = "disabled";
1223
1224 ports {
1225 #address-cells = <1>;
1226 #size-cells = <0>;
1227
1228 port@2 {
1229 #address-cells = <1>;
1230 #size-cells = <0>;
1231
1232 reg = <2>;
1233
1234 vin01isp0: endpoint@0 {
1235 reg = <0>;
1236 remote-endpoint = <&isp0vin01>;
1237 };
1238 };
1239 };
1240 };
1241
1242 vin02: video@e6ef2000 {
1243 compatible = "renesas,vin-r8a779g0";
1244 reg = <0 0xe6ef2000 0 0x1000>;
1245 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
1246 clocks = <&cpg CPG_MOD 800>;
1247 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1248 resets = <&cpg 800>;
1249 renesas,id = <2>;
1250 status = "disabled";
1251
1252 ports {
1253 #address-cells = <1>;
1254 #size-cells = <0>;
1255
1256 port@2 {
1257 #address-cells = <1>;
1258 #size-cells = <0>;
1259
1260 reg = <2>;
1261
1262 vin02isp0: endpoint@0 {
1263 reg = <0>;
1264 remote-endpoint = <&isp0vin02>;
1265 };
1266 };
1267 };
1268 };
1269
1270 vin03: video@e6ef3000 {
1271 compatible = "renesas,vin-r8a779g0";
1272 reg = <0 0xe6ef3000 0 0x1000>;
1273 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
1274 clocks = <&cpg CPG_MOD 801>;
1275 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1276 resets = <&cpg 801>;
1277 renesas,id = <3>;
1278 status = "disabled";
1279
1280 ports {
1281 #address-cells = <1>;
1282 #size-cells = <0>;
1283
1284 port@2 {
1285 #address-cells = <1>;
1286 #size-cells = <0>;
1287
1288 reg = <2>;
1289
1290 vin03isp0: endpoint@0 {
1291 reg = <0>;
1292 remote-endpoint = <&isp0vin03>;
1293 };
1294 };
1295 };
1296 };
1297
1298 vin04: video@e6ef4000 {
1299 compatible = "renesas,vin-r8a779g0";
1300 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MOD 802>;
1303 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1304 resets = <&cpg 802>;
1305 renesas,id = <4>;
1306 status = "disabled";
1307
1308 ports {
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1311
1312 port@2 {
1313 #address-cells = <1>;
1314 #size-cells = <0>;
1315
1316 reg = <2>;
1317
1318 vin04isp0: endpoint@0 {
1319 reg = <0>;
1320 remote-endpoint = <&isp0vin04>;
1321 };
1322 };
1323 };
1324 };
1325
1326 vin05: video@e6ef5000 {
1327 compatible = "renesas,vin-r8a779g0";
1328 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MOD 803>;
1331 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1332 resets = <&cpg 803>;
1333 renesas,id = <5>;
1334 status = "disabled";
1335
1336 ports {
1337 #address-cells = <1>;
1338 #size-cells = <0>;
1339
1340 port@2 {
1341 #address-cells = <1>;
1342 #size-cells = <0>;
1343
1344 reg = <2>;
1345
1346 vin05isp0: endpoint@0 {
1347 reg = <0>;
1348 remote-endpoint = <&isp0vin05>;
1349 };
1350 };
1351 };
1352 };
1353
1354 vin06: video@e6ef6000 {
1355 compatible = "renesas,vin-r8a779g0";
1356 reg = <0 0xe6ef6000 0 0x1000>;
1357 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
1358 clocks = <&cpg CPG_MOD 804>;
1359 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1360 resets = <&cpg 804>;
1361 renesas,id = <6>;
1362 status = "disabled";
1363
1364 ports {
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1367
1368 port@2 {
1369 #address-cells = <1>;
1370 #size-cells = <0>;
1371
1372 reg = <2>;
1373
1374 vin06isp0: endpoint@0 {
1375 reg = <0>;
1376 remote-endpoint = <&isp0vin06>;
1377 };
1378 };
1379 };
1380 };
1381
1382 vin07: video@e6ef7000 {
1383 compatible = "renesas,vin-r8a779g0";
1384 reg = <0 0xe6ef7000 0 0x1000>;
1385 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
1386 clocks = <&cpg CPG_MOD 805>;
1387 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1388 resets = <&cpg 805>;
1389 renesas,id = <7>;
1390 status = "disabled";
1391
1392 ports {
1393 #address-cells = <1>;
1394 #size-cells = <0>;
1395
1396 port@2 {
1397 #address-cells = <1>;
1398 #size-cells = <0>;
1399
1400 reg = <2>;
1401
1402 vin07isp0: endpoint@0 {
1403 reg = <0>;
1404 remote-endpoint = <&isp0vin07>;
1405 };
1406 };
1407 };
1408 };
1409
1410 vin08: video@e6ef8000 {
1411 compatible = "renesas,vin-r8a779g0";
1412 reg = <0 0xe6ef8000 0 0x1000>;
1413 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
1414 clocks = <&cpg CPG_MOD 806>;
1415 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1416 resets = <&cpg 806>;
1417 renesas,id = <8>;
1418 status = "disabled";
1419
1420 ports {
1421 #address-cells = <1>;
1422 #size-cells = <0>;
1423
1424 port@2 {
1425 #address-cells = <1>;
1426 #size-cells = <0>;
1427
1428 reg = <2>;
1429
1430 vin08isp1: endpoint@1 {
1431 reg = <1>;
1432 remote-endpoint = <&isp1vin08>;
1433 };
1434 };
1435 };
1436 };
1437
1438 vin09: video@e6ef9000 {
1439 compatible = "renesas,vin-r8a779g0";
1440 reg = <0 0xe6ef9000 0 0x1000>;
1441 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
1442 clocks = <&cpg CPG_MOD 807>;
1443 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1444 resets = <&cpg 807>;
1445 renesas,id = <9>;
1446 status = "disabled";
1447
1448 ports {
1449 #address-cells = <1>;
1450 #size-cells = <0>;
1451
1452 port@2 {
1453 #address-cells = <1>;
1454 #size-cells = <0>;
1455
1456 reg = <2>;
1457
1458 vin09isp1: endpoint@1 {
1459 reg = <1>;
1460 remote-endpoint = <&isp1vin09>;
1461 };
1462 };
1463 };
1464 };
1465
1466 vin10: video@e6efa000 {
1467 compatible = "renesas,vin-r8a779g0";
1468 reg = <0 0xe6efa000 0 0x1000>;
1469 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
1470 clocks = <&cpg CPG_MOD 808>;
1471 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1472 resets = <&cpg 808>;
1473 renesas,id = <10>;
1474 status = "disabled";
1475
1476 ports {
1477 #address-cells = <1>;
1478 #size-cells = <0>;
1479
1480 port@2 {
1481 #address-cells = <1>;
1482 #size-cells = <0>;
1483
1484 reg = <2>;
1485
1486 vin10isp1: endpoint@1 {
1487 reg = <1>;
1488 remote-endpoint = <&isp1vin10>;
1489 };
1490 };
1491 };
1492 };
1493
1494 vin11: video@e6efb000 {
1495 compatible = "renesas,vin-r8a779g0";
1496 reg = <0 0xe6efb000 0 0x1000>;
1497 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
1498 clocks = <&cpg CPG_MOD 809>;
1499 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1500 resets = <&cpg 809>;
1501 renesas,id = <11>;
1502 status = "disabled";
1503
1504 ports {
1505 #address-cells = <1>;
1506 #size-cells = <0>;
1507
1508 port@2 {
1509 #address-cells = <1>;
1510 #size-cells = <0>;
1511
1512 reg = <2>;
1513
1514 vin11isp1: endpoint@1 {
1515 reg = <1>;
1516 remote-endpoint = <&isp1vin11>;
1517 };
1518 };
1519 };
1520 };
1521
1522 vin12: video@e6efc000 {
1523 compatible = "renesas,vin-r8a779g0";
1524 reg = <0 0xe6efc000 0 0x1000>;
1525 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
1526 clocks = <&cpg CPG_MOD 810>;
1527 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1528 resets = <&cpg 810>;
1529 renesas,id = <12>;
1530 status = "disabled";
1531
1532 ports {
1533 #address-cells = <1>;
1534 #size-cells = <0>;
1535
1536 port@2 {
1537 #address-cells = <1>;
1538 #size-cells = <0>;
1539
1540 reg = <2>;
1541
1542 vin12isp1: endpoint@1 {
1543 reg = <1>;
1544 remote-endpoint = <&isp1vin12>;
1545 };
1546 };
1547 };
1548 };
1549
1550 vin13: video@e6efd000 {
1551 compatible = "renesas,vin-r8a779g0";
1552 reg = <0 0xe6efd000 0 0x1000>;
1553 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
1554 clocks = <&cpg CPG_MOD 811>;
1555 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1556 resets = <&cpg 811>;
1557 renesas,id = <13>;
1558 status = "disabled";
1559
1560 ports {
1561 #address-cells = <1>;
1562 #size-cells = <0>;
1563
1564 port@2 {
1565 #address-cells = <1>;
1566 #size-cells = <0>;
1567
1568 reg = <2>;
1569
1570 vin13isp1: endpoint@1 {
1571 reg = <1>;
1572 remote-endpoint = <&isp1vin13>;
1573 };
1574 };
1575 };
1576 };
1577
1578 vin14: video@e6efe000 {
1579 compatible = "renesas,vin-r8a779g0";
1580 reg = <0 0xe6efe000 0 0x1000>;
1581 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
1582 clocks = <&cpg CPG_MOD 812>;
1583 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1584 resets = <&cpg 812>;
1585 renesas,id = <14>;
1586 status = "disabled";
1587
1588 ports {
1589 #address-cells = <1>;
1590 #size-cells = <0>;
1591
1592 port@2 {
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595
1596 reg = <2>;
1597
1598 vin14isp1: endpoint@1 {
1599 reg = <1>;
1600 remote-endpoint = <&isp1vin14>;
1601 };
1602 };
1603 };
1604 };
1605
1606 vin15: video@e6eff000 {
1607 compatible = "renesas,vin-r8a779g0";
1608 reg = <0 0xe6eff000 0 0x1000>;
1609 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
1610 clocks = <&cpg CPG_MOD 813>;
1611 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1612 resets = <&cpg 813>;
1613 renesas,id = <15>;
1614 status = "disabled";
1615
1616 ports {
1617 #address-cells = <1>;
1618 #size-cells = <0>;
1619
1620 port@2 {
1621 #address-cells = <1>;
1622 #size-cells = <0>;
1623
1624 reg = <2>;
1625
1626 vin15isp1: endpoint@1 {
1627 reg = <1>;
1628 remote-endpoint = <&isp1vin15>;
1629 };
1630 };
1631 };
1632 };
1633
1634 dmac0: dma-controller@e7350000 {
1635 compatible = "renesas,dmac-r8a779g0",
1636 "renesas,rcar-gen4-dmac";
1637 reg = <0 0xe7350000 0 0x1000>,
1638 <0 0xe7300000 0 0x10000>;
1639 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
1640 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1641 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
1642 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
1643 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
1644 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
1645 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
1646 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
1647 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
1648 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
1649 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
1650 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
1651 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
1652 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1653 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
1654 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
1655 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1656 interrupt-names = "error",
1657 "ch0", "ch1", "ch2", "ch3", "ch4",
1658 "ch5", "ch6", "ch7", "ch8", "ch9",
1659 "ch10", "ch11", "ch12", "ch13",
1660 "ch14", "ch15";
1661 clocks = <&cpg CPG_MOD 709>;
1662 clock-names = "fck";
1663 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1664 resets = <&cpg 709>;
1665 #dma-cells = <1>;
1666 dma-channels = <16>;
1667 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1668 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1669 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1670 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1671 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1672 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1673 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1674 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1675 };
1676
1677 dmac1: dma-controller@e7351000 {
1678 compatible = "renesas,dmac-r8a779g0",
1679 "renesas,rcar-gen4-dmac";
1680 reg = <0 0xe7351000 0 0x1000>,
1681 <0 0xe7310000 0 0x10000>;
1682 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
1683 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
1684 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
1685 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
1686 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
1687 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1688 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1689 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1690 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
1691 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1692 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1693 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1694 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1695 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1696 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1697 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1698 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
1699 interrupt-names = "error",
1700 "ch0", "ch1", "ch2", "ch3", "ch4",
1701 "ch5", "ch6", "ch7", "ch8", "ch9",
1702 "ch10", "ch11", "ch12", "ch13",
1703 "ch14", "ch15";
1704 clocks = <&cpg CPG_MOD 710>;
1705 clock-names = "fck";
1706 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1707 resets = <&cpg 710>;
1708 #dma-cells = <1>;
1709 dma-channels = <16>;
1710 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
1711 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
1712 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
1713 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>,
1714 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>,
1715 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>,
1716 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>,
1717 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>;
1718 };
1719
1720 rcar_sound: sound@ec5a0000 {
1721 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4";
1722 reg = <0 0xec5a0000 0 0x020>,
1723 <0 0xec540000 0 0x1000>,
1724 <0 0xec541000 0 0x050>,
1725 <0 0xec400000 0 0x40000>;
1726 reg-names = "adg", "ssiu", "ssi", "sdmc";
1727
1728 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>;
1729 clock-names = "ssiu.0", "ssi.0", "clkin";
1730 /* #clock-cells is fixed */
1731 #clock-cells = <0>;
1732 /* #sound-dai-cells is fixed */
1733 #sound-dai-cells = <0>;
1734
1735 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1736 resets = <&cpg 2926>, <&cpg 2927>;
1737 reset-names = "ssiu.0", "ssi.0";
1738 status = "disabled";
1739
1740 rcar_sound,ssiu {
1741 ssiu00: ssiu-0 {
1742 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>;
1743 dma-names = "tx", "rx";
1744 };
1745 ssiu01: ssiu-1 {
1746 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>;
1747 dma-names = "tx", "rx";
1748 };
1749 ssiu02: ssiu-2 {
1750 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>;
1751 dma-names = "tx", "rx";
1752 };
1753 ssiu03: ssiu-3 {
1754 dmas = <&dmac0 0x68>, <&dmac0 0x69>;
1755 dma-names = "tx", "rx";
1756 };
1757 ssiu04: ssiu-4 {
1758 dmas = <&dmac0 0x66>, <&dmac0 0x67>;
1759 dma-names = "tx", "rx";
1760 };
1761 ssiu05: ssiu-5 {
1762 dmas = <&dmac0 0x64>, <&dmac0 0x65>;
1763 dma-names = "tx", "rx";
1764 };
1765 ssiu06: ssiu-6 {
1766 dmas = <&dmac0 0x62>, <&dmac0 0x63>;
1767 dma-names = "tx", "rx";
1768 };
1769 ssiu07: ssiu-7 {
1770 dmas = <&dmac0 0x60>, <&dmac0 0x61>;
1771 dma-names = "tx", "rx";
1772 };
1773 };
1774
1775 rcar_sound,ssi {
1776 ssi0: ssi-0 {
1777 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
1778 };
1779 };
1780 };
1781
1782 mmc0: mmc@ee140000 {
1783 compatible = "renesas,sdhi-r8a779g0",
1784 "renesas,rcar-gen4-sdhi";
1785 reg = <0 0xee140000 0 0x2000>;
1786 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
1787 clocks = <&cpg CPG_MOD 706>,
1788 <&cpg CPG_CORE R8A779G0_CLK_SD0H>;
1789 clock-names = "core", "clkh";
1790 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1791 resets = <&cpg 706>;
1792 max-frequency = <200000000>;
1793 iommus = <&ipmmu_ds0 32>;
1794 status = "disabled";
1795 };
1796
1797 rpc: spi@ee200000 {
1798 compatible = "renesas,r8a779g0-rpc-if",
1799 "renesas,rcar-gen4-rpc-if";
1800 reg = <0 0xee200000 0 0x200>,
1801 <0 0x08000000 0 0x04000000>,
1802 <0 0xee208000 0 0x100>;
1803 reg-names = "regs", "dirmap", "wbuf";
1804 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1805 clocks = <&cpg CPG_MOD 629>;
1806 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1807 resets = <&cpg 629>;
1808 #address-cells = <1>;
1809 #size-cells = <0>;
1810 status = "disabled";
1811 };
1812
1813 ipmmu_rt0: iommu@ee480000 {
1814 compatible = "renesas,ipmmu-r8a779g0",
1815 "renesas,rcar-gen4-ipmmu-vmsa";
1816 reg = <0 0xee480000 0 0x20000>;
1817 renesas,ipmmu-main = <&ipmmu_mm>;
1818 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1819 #iommu-cells = <1>;
1820 };
1821
1822 ipmmu_rt1: iommu@ee4c0000 {
1823 compatible = "renesas,ipmmu-r8a779g0",
1824 "renesas,rcar-gen4-ipmmu-vmsa";
1825 reg = <0 0xee4c0000 0 0x20000>;
1826 renesas,ipmmu-main = <&ipmmu_mm>;
1827 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1828 #iommu-cells = <1>;
1829 };
1830
1831 ipmmu_ds0: iommu@eed00000 {
1832 compatible = "renesas,ipmmu-r8a779g0",
1833 "renesas,rcar-gen4-ipmmu-vmsa";
1834 reg = <0 0xeed00000 0 0x20000>;
1835 renesas,ipmmu-main = <&ipmmu_mm>;
1836 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1837 #iommu-cells = <1>;
1838 };
1839
1840 ipmmu_hc: iommu@eed40000 {
1841 compatible = "renesas,ipmmu-r8a779g0",
1842 "renesas,rcar-gen4-ipmmu-vmsa";
1843 reg = <0 0xeed40000 0 0x20000>;
1844 renesas,ipmmu-main = <&ipmmu_mm>;
1845 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1846 #iommu-cells = <1>;
1847 };
1848
1849 ipmmu_ir: iommu@eed80000 {
1850 compatible = "renesas,ipmmu-r8a779g0",
1851 "renesas,rcar-gen4-ipmmu-vmsa";
1852 reg = <0 0xeed80000 0 0x20000>;
1853 renesas,ipmmu-main = <&ipmmu_mm>;
1854 power-domains = <&sysc R8A779G0_PD_A3IR>;
1855 #iommu-cells = <1>;
1856 };
1857
1858 ipmmu_vc: iommu@eedc0000 {
1859 compatible = "renesas,ipmmu-r8a779g0",
1860 "renesas,rcar-gen4-ipmmu-vmsa";
1861 reg = <0 0xeedc0000 0 0x20000>;
1862 renesas,ipmmu-main = <&ipmmu_mm>;
1863 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1864 #iommu-cells = <1>;
1865 };
1866
1867 ipmmu_3dg: iommu@eee00000 {
1868 compatible = "renesas,ipmmu-r8a779g0",
1869 "renesas,rcar-gen4-ipmmu-vmsa";
1870 reg = <0 0xeee00000 0 0x20000>;
1871 renesas,ipmmu-main = <&ipmmu_mm>;
1872 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1873 #iommu-cells = <1>;
1874 };
1875
1876 ipmmu_vi0: iommu@eee80000 {
1877 compatible = "renesas,ipmmu-r8a779g0",
1878 "renesas,rcar-gen4-ipmmu-vmsa";
1879 reg = <0 0xeee80000 0 0x20000>;
1880 renesas,ipmmu-main = <&ipmmu_mm>;
1881 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1882 #iommu-cells = <1>;
1883 };
1884
1885 ipmmu_vi1: iommu@eeec0000 {
1886 compatible = "renesas,ipmmu-r8a779g0",
1887 "renesas,rcar-gen4-ipmmu-vmsa";
1888 reg = <0 0xeeec0000 0 0x20000>;
1889 renesas,ipmmu-main = <&ipmmu_mm>;
1890 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1891 #iommu-cells = <1>;
1892 };
1893
1894 ipmmu_vip0: iommu@eef00000 {
1895 compatible = "renesas,ipmmu-r8a779g0",
1896 "renesas,rcar-gen4-ipmmu-vmsa";
1897 reg = <0 0xeef00000 0 0x20000>;
1898 renesas,ipmmu-main = <&ipmmu_mm>;
1899 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1900 #iommu-cells = <1>;
1901 };
1902
1903 ipmmu_vip1: iommu@eef40000 {
1904 compatible = "renesas,ipmmu-r8a779g0",
1905 "renesas,rcar-gen4-ipmmu-vmsa";
1906 reg = <0 0xeef40000 0 0x20000>;
1907 renesas,ipmmu-main = <&ipmmu_mm>;
1908 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1909 #iommu-cells = <1>;
1910 };
1911
1912 ipmmu_mm: iommu@eefc0000 {
1913 compatible = "renesas,ipmmu-r8a779g0",
1914 "renesas,rcar-gen4-ipmmu-vmsa";
1915 reg = <0 0xeefc0000 0 0x20000>;
1916 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1917 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
1918 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1919 #iommu-cells = <1>;
1920 };
1921
1922 gic: interrupt-controller@f1000000 {
1923 compatible = "arm,gic-v3";
1924 #interrupt-cells = <3>;
1925 #address-cells = <0>;
1926 interrupt-controller;
1927 reg = <0x0 0xf1000000 0 0x20000>,
1928 <0x0 0xf1060000 0 0x110000>;
1929 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
1930 };
1931
1932 csi40: csi2@fe500000 {
1933 compatible = "renesas,r8a779g0-csi2";
1934 reg = <0 0xfe500000 0 0x40000>;
1935 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
1936 clocks = <&cpg CPG_MOD 331>;
1937 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1938 resets = <&cpg 331>;
1939 status = "disabled";
1940
1941 ports {
1942 #address-cells = <1>;
1943 #size-cells = <0>;
1944
1945 port@0 {
1946 reg = <0>;
1947 };
1948
1949 port@1 {
1950 reg = <1>;
1951 csi40isp0: endpoint {
1952 remote-endpoint = <&isp0csi40>;
1953 };
1954 };
1955 };
1956 };
1957
1958 csi41: csi2@fe540000 {
1959 compatible = "renesas,r8a779g0-csi2";
1960 reg = <0 0xfe540000 0 0x40000>;
1961 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>;
1962 clocks = <&cpg CPG_MOD 400>;
1963 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1964 resets = <&cpg 400>;
1965 status = "disabled";
1966
1967 ports {
1968 #address-cells = <1>;
1969 #size-cells = <0>;
1970
1971 port@0 {
1972 reg = <0>;
1973 };
1974
1975 port@1 {
1976 reg = <1>;
1977 csi41isp1: endpoint {
1978 remote-endpoint = <&isp1csi41>;
1979 };
1980 };
1981 };
1982 };
1983
1984 fcpvd0: fcp@fea10000 {
1985 compatible = "renesas,fcpv";
1986 reg = <0 0xfea10000 0 0x200>;
1987 clocks = <&cpg CPG_MOD 508>;
1988 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1989 resets = <&cpg 508>;
1990 };
1991
1992 fcpvd1: fcp@fea11000 {
1993 compatible = "renesas,fcpv";
1994 reg = <0 0xfea11000 0 0x200>;
1995 clocks = <&cpg CPG_MOD 509>;
1996 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1997 resets = <&cpg 509>;
1998 };
1999
2000 vspd0: vsp@fea20000 {
2001 compatible = "renesas,vsp2";
2002 reg = <0 0xfea20000 0 0x7000>;
2003 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>;
2004 clocks = <&cpg CPG_MOD 830>;
2005 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2006 resets = <&cpg 830>;
2007
2008 renesas,fcp = <&fcpvd0>;
2009 };
2010
2011 vspd1: vsp@fea28000 {
2012 compatible = "renesas,vsp2";
2013 reg = <0 0xfea28000 0 0x7000>;
2014 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
2015 clocks = <&cpg CPG_MOD 831>;
2016 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2017 resets = <&cpg 831>;
2018
2019 renesas,fcp = <&fcpvd1>;
2020 };
2021
2022 du: display@feb00000 {
2023 compatible = "renesas,du-r8a779g0";
2024 reg = <0 0xfeb00000 0 0x40000>;
2025 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
2026 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>;
2027 clocks = <&cpg CPG_MOD 411>;
2028 clock-names = "du.0";
2029 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2030 resets = <&cpg 411>;
2031 reset-names = "du.0";
2032 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2033
2034 status = "disabled";
2035
2036 ports {
2037 #address-cells = <1>;
2038 #size-cells = <0>;
2039
2040 port@0 {
2041 reg = <0>;
2042 du_out_dsi0: endpoint {
2043 remote-endpoint = <&dsi0_in>;
2044 };
2045 };
2046
2047 port@1 {
2048 reg = <1>;
2049 du_out_dsi1: endpoint {
2050 remote-endpoint = <&dsi1_in>;
2051 };
2052 };
2053 };
2054 };
2055
2056 isp0: isp@fed00000 {
2057 compatible = "renesas,r8a779g0-isp";
2058 reg = <0 0xfed00000 0 0x10000>;
2059 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
2060 clocks = <&cpg CPG_MOD 612>;
2061 power-domains = <&sysc R8A779G0_PD_A3ISP0>;
2062 resets = <&cpg 612>;
2063 status = "disabled";
2064
2065 ports {
2066 #address-cells = <1>;
2067 #size-cells = <0>;
2068
2069 port@0 {
2070 #address-cells = <1>;
2071 #size-cells = <0>;
2072
2073 reg = <0>;
2074
2075 isp0csi40: endpoint@0 {
2076 reg = <0>;
2077 remote-endpoint = <&csi40isp0>;
2078 };
2079 };
2080
2081 port@1 {
2082 reg = <1>;
2083 isp0vin00: endpoint {
2084 remote-endpoint = <&vin00isp0>;
2085 };
2086 };
2087
2088 port@2 {
2089 reg = <2>;
2090 isp0vin01: endpoint {
2091 remote-endpoint = <&vin01isp0>;
2092 };
2093 };
2094
2095 port@3 {
2096 reg = <3>;
2097 isp0vin02: endpoint {
2098 remote-endpoint = <&vin02isp0>;
2099 };
2100 };
2101
2102 port@4 {
2103 reg = <4>;
2104 isp0vin03: endpoint {
2105 remote-endpoint = <&vin03isp0>;
2106 };
2107 };
2108
2109 port@5 {
2110 reg = <5>;
2111 isp0vin04: endpoint {
2112 remote-endpoint = <&vin04isp0>;
2113 };
2114 };
2115
2116 port@6 {
2117 reg = <6>;
2118 isp0vin05: endpoint {
2119 remote-endpoint = <&vin05isp0>;
2120 };
2121 };
2122
2123 port@7 {
2124 reg = <7>;
2125 isp0vin06: endpoint {
2126 remote-endpoint = <&vin06isp0>;
2127 };
2128 };
2129
2130 port@8 {
2131 reg = <8>;
2132 isp0vin07: endpoint {
2133 remote-endpoint = <&vin07isp0>;
2134 };
2135 };
2136 };
2137 };
2138
2139 isp1: isp@fed20000 {
2140 compatible = "renesas,r8a779g0-isp";
2141 reg = <0 0xfed20000 0 0x10000>;
2142 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
2143 clocks = <&cpg CPG_MOD 613>;
2144 power-domains = <&sysc R8A779G0_PD_A3ISP1>;
2145 resets = <&cpg 613>;
2146 status = "disabled";
2147
2148 ports {
2149 #address-cells = <1>;
2150 #size-cells = <0>;
2151
2152 port@0 {
2153 #address-cells = <1>;
2154 #size-cells = <0>;
2155
2156 reg = <0>;
2157
2158 isp1csi41: endpoint@1 {
2159 reg = <1>;
2160 remote-endpoint = <&csi41isp1>;
2161 };
2162 };
2163
2164 port@1 {
2165 reg = <1>;
2166 isp1vin08: endpoint {
2167 remote-endpoint = <&vin08isp1>;
2168 };
2169 };
2170
2171 port@2 {
2172 reg = <2>;
2173 isp1vin09: endpoint {
2174 remote-endpoint = <&vin09isp1>;
2175 };
2176 };
2177
2178 port@3 {
2179 reg = <3>;
2180 isp1vin10: endpoint {
2181 remote-endpoint = <&vin10isp1>;
2182 };
2183 };
2184
2185 port@4 {
2186 reg = <4>;
2187 isp1vin11: endpoint {
2188 remote-endpoint = <&vin11isp1>;
2189 };
2190 };
2191
2192 port@5 {
2193 reg = <5>;
2194 isp1vin12: endpoint {
2195 remote-endpoint = <&vin12isp1>;
2196 };
2197 };
2198
2199 port@6 {
2200 reg = <6>;
2201 isp1vin13: endpoint {
2202 remote-endpoint = <&vin13isp1>;
2203 };
2204 };
2205
2206 port@7 {
2207 reg = <7>;
2208 isp1vin14: endpoint {
2209 remote-endpoint = <&vin14isp1>;
2210 };
2211 };
2212
2213 port@8 {
2214 reg = <8>;
2215 isp1vin15: endpoint {
2216 remote-endpoint = <&vin15isp1>;
2217 };
2218 };
2219 };
2220 };
2221
2222 dsi0: dsi-encoder@fed80000 {
2223 compatible = "renesas,r8a779g0-dsi-csi2-tx";
2224 reg = <0 0xfed80000 0 0x10000>;
2225 clocks = <&cpg CPG_MOD 415>,
2226 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>,
2227 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>;
2228 clock-names = "fck", "dsi", "pll";
2229 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2230 resets = <&cpg 415>;
2231
2232 status = "disabled";
2233
2234 ports {
2235 #address-cells = <1>;
2236 #size-cells = <0>;
2237
2238 port@0 {
2239 reg = <0>;
2240 dsi0_in: endpoint {
2241 remote-endpoint = <&du_out_dsi0>;
2242 };
2243 };
2244
2245 port@1 {
2246 reg = <1>;
2247 };
2248 };
2249 };
2250
2251 dsi1: dsi-encoder@fed90000 {
2252 compatible = "renesas,r8a779g0-dsi-csi2-tx";
2253 reg = <0 0xfed90000 0 0x10000>;
2254 clocks = <&cpg CPG_MOD 416>,
2255 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>,
2256 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>;
2257 clock-names = "fck", "dsi", "pll";
2258 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2259 resets = <&cpg 416>;
2260
2261 status = "disabled";
2262
2263 ports {
2264 #address-cells = <1>;
2265 #size-cells = <0>;
2266
2267 port@0 {
2268 reg = <0>;
2269 dsi1_in: endpoint {
2270 remote-endpoint = <&du_out_dsi1>;
2271 };
2272 };
2273
2274 port@1 {
2275 reg = <1>;
2276 };
2277 };
2278 };
2279
2280 prr: chipid@fff00044 {
2281 compatible = "renesas,prr";
2282 reg = <0 0xfff00044 0 4>;
2283 };
2284 };
2285
2286 thermal-zones {
2287 sensor_thermal_cr52: sensor1-thermal {
2288 polling-delay-passive = <250>;
2289 polling-delay = <1000>;
2290 thermal-sensors = <&tsc 0>;
2291
2292 trips {
2293 sensor1_crit: sensor1-crit {
2294 temperature = <120000>;
2295 hysteresis = <1000>;
2296 type = "critical";
2297 };
2298 };
2299 };
2300
2301 sensor_thermal_cnn: sensor2-thermal {
2302 polling-delay-passive = <250>;
2303 polling-delay = <1000>;
2304 thermal-sensors = <&tsc 1>;
2305
2306 trips {
2307 sensor2_crit: sensor2-crit {
2308 temperature = <120000>;
2309 hysteresis = <1000>;
2310 type = "critical";
2311 };
2312 };
2313 };
2314
2315 sensor_thermal_ca76: sensor3-thermal {
2316 polling-delay-passive = <250>;
2317 polling-delay = <1000>;
2318 thermal-sensors = <&tsc 2>;
2319
2320 trips {
2321 sensor3_crit: sensor3-crit {
2322 temperature = <120000>;
2323 hysteresis = <1000>;
2324 type = "critical";
2325 };
2326 };
2327 };
2328
2329 sensor_thermal_ddr1: sensor4-thermal {
2330 polling-delay-passive = <250>;
2331 polling-delay = <1000>;
2332 thermal-sensors = <&tsc 3>;
2333
2334 trips {
2335 sensor4_crit: sensor4-crit {
2336 temperature = <120000>;
2337 hysteresis = <1000>;
2338 type = "critical";
2339 };
2340 };
2341 };
2342 };
2343
2344 timer {
2345 compatible = "arm,armv8-timer";
2346 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2347 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
2348 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
2349 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
2350 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
2351 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2352 "hyp-virt";
2353 };
2354 };
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