1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the R-Car V4M Gray Hawk Single board
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 * Copyright (C) 2024 Glider bv
7 */
8
9 /dts-v1/;
10
11 #include <dt-bindings/gpio/gpio.h>
12
13 #include "r8a779h0.dtsi"
14
15 / {
16 model = "Renesas Gray Hawk Single board based on r8a779h0";
17 compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";
18
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 serial0 = &hscif0;
25 serial1 = &hscif2;
26 ethernet0 = &avb0;
27 };
28
29 chosen {
30 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
31 stdout-path = "serial0:921600n8";
32 };
33
34 memory@48000000 {
35 device_type = "memory";
36 /* first 128MB is reserved for secure area. */
37 reg = <0x0 0x48000000 0x0 0x78000000>;
38 };
39
40 memory@480000000 {
41 device_type = "memory";
42 reg = <0x4 0x80000000 0x1 0x80000000>;
43 };
44
45 reg_1p8v: regulator-1p8v {
46 compatible = "regulator-fixed";
47 regulator-name = "fixed-1.8V";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 regulator-boot-on;
51 regulator-always-on;
52 };
53
54 reg_3p3v: regulator-3p3v {
55 compatible = "regulator-fixed";
56 regulator-name = "fixed-3.3V";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 regulator-boot-on;
60 regulator-always-on;
61 };
62 };
63
64 &avb0 {
65 pinctrl-0 = <&avb0_pins>;
66 pinctrl-names = "default";
67 phy-handle = <&phy0>;
68 tx-internal-delay-ps = <2000>;
69 status = "okay";
70
71 phy0: ethernet-phy@0 {
72 compatible = "ethernet-phy-id0022.1622",
73 "ethernet-phy-ieee802.3-c22";
74 rxc-skew-ps = <1500>;
75 reg = <0>;
76 interrupt-parent = <&gpio7>;
77 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
78 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 &extal_clk {
83 clock-frequency = <16666666>;
84 };
85
86 &extalr_clk {
87 clock-frequency = <32768>;
88 };
89
90 &hscif0 {
91 pinctrl-0 = <&hscif0_pins>;
92 pinctrl-names = "default";
93
94 uart-has-rtscts;
95 status = "okay";
96 };
97
98 &hscif2 {
99 pinctrl-0 = <&hscif2_pins>;
100 pinctrl-names = "default";
101
102 uart-has-rtscts;
103 status = "okay";
104 };
105
106 &i2c0 {
107 pinctrl-0 = <&i2c0_pins>;
108 pinctrl-names = "default";
109
110 status = "okay";
111 clock-frequency = <400000>;
112
113 eeprom@50 {
114 compatible = "rohm,br24g01", "atmel,24c01";
115 label = "cpu-board";
116 reg = <0x50>;
117 pagesize = <8>;
118 };
119
120 eeprom@51 {
121 compatible = "rohm,br24g01", "atmel,24c01";
122 label = "breakout-board";
123 reg = <0x51>;
124 pagesize = <8>;
125 };
126
127 eeprom@52 {
128 compatible = "rohm,br24g01", "atmel,24c01";
129 label = "csi-dsi-sub-board-id";
130 reg = <0x52>;
131 pagesize = <8>;
132 };
133
134 eeprom@53 {
135 compatible = "rohm,br24g01", "atmel,24c01";
136 label = "ethernet-sub-board-id";
137 reg = <0x53>;
138 pagesize = <8>;
139 };
140 };
141
142 &mmc0 {
143 pinctrl-0 = <&mmc_pins>;
144 pinctrl-1 = <&mmc_pins>;
145 pinctrl-names = "default", "state_uhs";
146
147 vmmc-supply = <®_3p3v>;
148 vqmmc-supply = <®_1p8v>;
149 mmc-hs200-1_8v;
150 mmc-hs400-1_8v;
151 bus-width = <8>;
152 no-sd;
153 no-sdio;
154 non-removable;
155 full-pwr-cycle-in-suspend;
156 status = "okay";
157 };
158
159 &pfc {
160 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
161 pinctrl-names = "default";
162
163 avb0_pins: avb0 {
164 mux {
165 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
166 "avb0_txcrefclk";
167 function = "avb0";
168 };
169
170 pins_mdio {
171 groups = "avb0_mdio";
172 drive-strength = <21>;
173 };
174
175 pins_mii {
176 groups = "avb0_rgmii";
177 drive-strength = <21>;
178 };
179 };
180
181 hscif0_pins: hscif0 {
182 groups = "hscif0_data", "hscif0_ctrl";
183 function = "hscif0";
184 };
185
186 hscif2_pins: hscif2 {
187 groups = "hscif2_data", "hscif2_ctrl";
188 function = "hscif2";
189 };
190
191 i2c0_pins: i2c0 {
192 groups = "i2c0";
193 function = "i2c0";
194 };
195
196 mmc_pins: mmc {
197 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
198 function = "mmc";
199 power-source = <1800>;
200 };
201
202 qspi0_pins: qspi0 {
203 groups = "qspi0_ctrl", "qspi0_data4";
204 function = "qspi0";
205 };
206
207 scif_clk_pins: scif-clk {
208 groups = "scif_clk";
209 function = "scif_clk";
210 };
211
212 scif_clk2_pins: scif-clk2 {
213 groups = "scif_clk2";
214 function = "scif_clk2";
215 };
216 };
217
218 &rpc {
219 pinctrl-0 = <&qspi0_pins>;
220 pinctrl-names = "default";
221
222 status = "okay";
223
224 flash@0 {
225 compatible = "spansion,s25fs512s", "jedec,spi-nor";
226 reg = <0>;
227 spi-max-frequency = <40000000>;
228 spi-rx-bus-width = <4>;
229
230 partitions {
231 compatible = "fixed-partitions";
232 #address-cells = <1>;
233 #size-cells = <1>;
234
235 boot@0 {
236 reg = <0x0 0x1200000>;
237 read-only;
238 };
239 user@1200000 {
240 reg = <0x1200000 0x2e00000>;
241 };
242 };
243 };
244 };
245
246 &rwdt {
247 timeout-sec = <60>;
248 status = "okay";
249 };
250
251 &scif_clk {
252 clock-frequency = <24000000>;
253 };
254
255 &scif_clk2 {
256 clock-frequency = <24000000>;
257 };
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