1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h>
11
12 / {
13 compatible = "renesas,r8a779h0";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 /* External Audio clock - to be overridden by boards that provide it */
18 audio_clkin: audio_clkin {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
22 };
23
24 cluster0_opp: opp-table-0 {
25 compatible = "operating-points-v2";
26
27 opp-500000000 {
28 opp-hz = /bits/ 64 <500000000>;
29 opp-microvolt = <825000>;
30 clock-latency-ns = <500000>;
31 };
32 opp-1000000000 {
33 opp-hz = /bits/ 64 <1000000000>;
34 opp-microvolt = <825000>;
35 clock-latency-ns = <500000>;
36 };
37 };
38
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu-map {
44 cluster0 {
45 core0 {
46 cpu = <&a76_0>;
47 };
48 core1 {
49 cpu = <&a76_1>;
50 };
51 core2 {
52 cpu = <&a76_2>;
53 };
54 core3 {
55 cpu = <&a76_3>;
56 };
57 };
58 };
59
60 a76_0: cpu@0 {
61 compatible = "arm,cortex-a76";
62 reg = <0>;
63 device_type = "cpu";
64 power-domains = <&sysc R8A779H0_PD_A1E0D0C0>;
65 next-level-cache = <&L3_CA76>;
66 enable-method = "psci";
67 cpu-idle-states = <&CPU_SLEEP_0>;
68 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>;
69 operating-points-v2 = <&cluster0_opp>;
70 };
71
72 a76_1: cpu@100 {
73 compatible = "arm,cortex-a76";
74 reg = <0x100>;
75 device_type = "cpu";
76 power-domains = <&sysc R8A779H0_PD_A1E0D0C1>;
77 next-level-cache = <&L3_CA76>;
78 enable-method = "psci";
79 cpu-idle-states = <&CPU_SLEEP_0>;
80 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>;
81 operating-points-v2 = <&cluster0_opp>;
82 };
83
84 a76_2: cpu@200 {
85 compatible = "arm,cortex-a76";
86 reg = <0x200>;
87 device_type = "cpu";
88 power-domains = <&sysc R8A779H0_PD_A1E0D0C2>;
89 next-level-cache = <&L3_CA76>;
90 enable-method = "psci";
91 cpu-idle-states = <&CPU_SLEEP_0>;
92 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>;
93 operating-points-v2 = <&cluster0_opp>;
94 };
95
96 a76_3: cpu@300 {
97 compatible = "arm,cortex-a76";
98 reg = <0x300>;
99 device_type = "cpu";
100 power-domains = <&sysc R8A779H0_PD_A1E0D0C3>;
101 next-level-cache = <&L3_CA76>;
102 enable-method = "psci";
103 cpu-idle-states = <&CPU_SLEEP_0>;
104 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>;
105 operating-points-v2 = <&cluster0_opp>;
106 };
107
108 idle-states {
109 entry-method = "psci";
110
111 CPU_SLEEP_0: cpu-sleep-0 {
112 compatible = "arm,idle-state";
113 arm,psci-suspend-param = <0x0010000>;
114 local-timer-stop;
115 entry-latency-us = <400>;
116 exit-latency-us = <500>;
117 min-residency-us = <4000>;
118 };
119 };
120
121 L3_CA76: cache-controller {
122 compatible = "cache";
123 power-domains = <&sysc R8A779H0_PD_A2E0D0>;
124 cache-unified;
125 cache-level = <3>;
126 };
127 };
128
129 extal_clk: extal-clk {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 /* This value must be overridden by the board */
133 clock-frequency = <0>;
134 };
135
136 extalr_clk: extalr-clk {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 /* This value must be overridden by the board */
140 clock-frequency = <0>;
141 };
142
143 pmu-a76 {
144 compatible = "arm,cortex-a76-pmu";
145 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
146 };
147
148 psci {
149 compatible = "arm,psci-1.0", "arm,psci-0.2";
150 method = "smc";
151 };
152
153 /* External SCIF clocks - to be overridden by boards that provide them */
154 scif_clk: scif-clk {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 clock-frequency = <0>;
158 };
159
160 scif_clk2: scif-clk2 {
161 compatible = "fixed-clock";
162 #clock-cells = <0>;
163 clock-frequency = <0>;
164 };
165
166 soc: soc {
167 compatible = "simple-bus";
168 interrupt-parent = <&gic>;
169 #address-cells = <2>;
170 #size-cells = <2>;
171 ranges;
172
173 rwdt: watchdog@e6020000 {
174 compatible = "renesas,r8a779h0-wdt",
175 "renesas,rcar-gen4-wdt";
176 reg = <0 0xe6020000 0 0x0c>;
177 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&cpg CPG_MOD 907>;
179 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
180 resets = <&cpg 907>;
181 status = "disabled";
182 };
183
184 pfc: pinctrl@e6050000 {
185 compatible = "renesas,pfc-r8a779h0";
186 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
187 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
188 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
189 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>;
190 };
191
192 gpio0: gpio@e6050180 {
193 compatible = "renesas,gpio-r8a779h0",
194 "renesas,rcar-gen4-gpio";
195 reg = <0 0xe6050180 0 0x54>;
196 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
197 #gpio-cells = <2>;
198 gpio-controller;
199 gpio-ranges = <&pfc 0 0 19>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 clocks = <&cpg CPG_MOD 915>;
203 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
204 resets = <&cpg 915>;
205 };
206
207 gpio1: gpio@e6050980 {
208 compatible = "renesas,gpio-r8a779h0",
209 "renesas,rcar-gen4-gpio";
210 reg = <0 0xe6050980 0 0x54>;
211 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
212 #gpio-cells = <2>;
213 gpio-controller;
214 gpio-ranges = <&pfc 0 32 30>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 915>;
218 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
219 resets = <&cpg 915>;
220 };
221
222 gpio2: gpio@e6058180 {
223 compatible = "renesas,gpio-r8a779h0",
224 "renesas,rcar-gen4-gpio";
225 reg = <0 0xe6058180 0 0x54>;
226 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
227 #gpio-cells = <2>;
228 gpio-controller;
229 gpio-ranges = <&pfc 0 64 20>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 clocks = <&cpg CPG_MOD 916>;
233 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
234 resets = <&cpg 916>;
235 };
236
237 gpio3: gpio@e6058980 {
238 compatible = "renesas,gpio-r8a779h0",
239 "renesas,rcar-gen4-gpio";
240 reg = <0 0xe6058980 0 0x54>;
241 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
242 #gpio-cells = <2>;
243 gpio-controller;
244 gpio-ranges = <&pfc 0 96 32>;
245 #interrupt-cells = <2>;
246 interrupt-controller;
247 clocks = <&cpg CPG_MOD 916>;
248 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
249 resets = <&cpg 916>;
250 };
251
252 gpio4: gpio@e6060180 {
253 compatible = "renesas,gpio-r8a779h0",
254 "renesas,rcar-gen4-gpio";
255 reg = <0 0xe6060180 0 0x54>;
256 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
257 #gpio-cells = <2>;
258 gpio-controller;
259 gpio-ranges = <&pfc 0 128 25>;
260 #interrupt-cells = <2>;
261 interrupt-controller;
262 clocks = <&cpg CPG_MOD 917>;
263 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
264 resets = <&cpg 917>;
265 };
266
267 gpio5: gpio@e6060980 {
268 compatible = "renesas,gpio-r8a779h0",
269 "renesas,rcar-gen4-gpio";
270 reg = <0 0xe6060980 0 0x54>;
271 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
272 #gpio-cells = <2>;
273 gpio-controller;
274 gpio-ranges = <&pfc 0 160 21>;
275 #interrupt-cells = <2>;
276 interrupt-controller;
277 clocks = <&cpg CPG_MOD 917>;
278 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
279 resets = <&cpg 917>;
280 };
281
282 gpio6: gpio@e6061180 {
283 compatible = "renesas,gpio-r8a779h0",
284 "renesas,rcar-gen4-gpio";
285 reg = <0 0xe6061180 0 0x54>;
286 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
287 #gpio-cells = <2>;
288 gpio-controller;
289 gpio-ranges = <&pfc 0 192 21>;
290 #interrupt-cells = <2>;
291 interrupt-controller;
292 clocks = <&cpg CPG_MOD 917>;
293 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
294 resets = <&cpg 917>;
295 };
296
297 gpio7: gpio@e6061980 {
298 compatible = "renesas,gpio-r8a779h0",
299 "renesas,rcar-gen4-gpio";
300 reg = <0 0xe6061980 0 0x54>;
301 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
302 #gpio-cells = <2>;
303 gpio-controller;
304 gpio-ranges = <&pfc 0 224 21>;
305 #interrupt-cells = <2>;
306 interrupt-controller;
307 clocks = <&cpg CPG_MOD 917>;
308 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
309 resets = <&cpg 917>;
310 };
311
312 cmt0: timer@e60f0000 {
313 compatible = "renesas,r8a779h0-cmt0",
314 "renesas,rcar-gen4-cmt0";
315 reg = <0 0xe60f0000 0 0x1004>;
316 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&cpg CPG_MOD 910>;
319 clock-names = "fck";
320 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
321 resets = <&cpg 910>;
322 status = "disabled";
323 };
324
325 cmt1: timer@e6130000 {
326 compatible = "renesas,r8a779h0-cmt1",
327 "renesas,rcar-gen4-cmt1";
328 reg = <0 0xe6130000 0 0x1004>;
329 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 911>;
338 clock-names = "fck";
339 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
340 resets = <&cpg 911>;
341 status = "disabled";
342 };
343
344 cmt2: timer@e6140000 {
345 compatible = "renesas,r8a779h0-cmt1",
346 "renesas,rcar-gen4-cmt1";
347 reg = <0 0xe6140000 0 0x1004>;
348 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 912>;
357 clock-names = "fck";
358 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
359 resets = <&cpg 912>;
360 status = "disabled";
361 };
362
363 cmt3: timer@e6148000 {
364 compatible = "renesas,r8a779h0-cmt1",
365 "renesas,rcar-gen4-cmt1";
366 reg = <0 0xe6148000 0 0x1004>;
367 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
369 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
370 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
371 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
372 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
373 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
374 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
375 clocks = <&cpg CPG_MOD 913>;
376 clock-names = "fck";
377 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
378 resets = <&cpg 913>;
379 status = "disabled";
380 };
381
382 cpg: clock-controller@e6150000 {
383 compatible = "renesas,r8a779h0-cpg-mssr";
384 reg = <0 0xe6150000 0 0x4000>;
385 clocks = <&extal_clk>, <&extalr_clk>;
386 clock-names = "extal", "extalr";
387 #clock-cells = <2>;
388 #power-domain-cells = <0>;
389 #reset-cells = <1>;
390 };
391
392 rst: reset-controller@e6160000 {
393 compatible = "renesas,r8a779h0-rst";
394 reg = <0 0xe6160000 0 0x4000>;
395 };
396
397 sysc: system-controller@e6180000 {
398 compatible = "renesas,r8a779h0-sysc";
399 reg = <0 0xe6180000 0 0x4000>;
400 #power-domain-cells = <1>;
401 };
402
403 tsc: thermal@e6198000 {
404 compatible = "renesas,r8a779h0-thermal";
405 reg = <0 0xe6198000 0 0x200>,
406 <0 0xe61a0000 0 0x200>;
407 clocks = <&cpg CPG_MOD 919>;
408 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
409 resets = <&cpg 919>;
410 #thermal-sensor-cells = <1>;
411 };
412
413 intc_ex: interrupt-controller@e61c0000 {
414 compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc";
415 #interrupt-cells = <2>;
416 interrupt-controller;
417 reg = <0 0xe61c0000 0 0x200>;
418 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
420 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
421 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 611>;
425 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
426 resets = <&cpg 611>;
427 };
428
429 tmu0: timer@e61e0000 {
430 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
431 reg = <0 0xe61e0000 0 0x30>;
432 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
433 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
434 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
435 interrupt-names = "tuni0", "tuni1", "tuni2";
436 clocks = <&cpg CPG_MOD 713>;
437 clock-names = "fck";
438 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
439 resets = <&cpg 713>;
440 status = "disabled";
441 };
442
443 tmu1: timer@e6fc0000 {
444 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
445 reg = <0 0xe6fc0000 0 0x30>;
446 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
447 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
448 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
449 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>;
450 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
451 clocks = <&cpg CPG_MOD 714>;
452 clock-names = "fck";
453 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
454 resets = <&cpg 714>;
455 status = "disabled";
456 };
457
458 tmu2: timer@e6fd0000 {
459 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
460 reg = <0 0xe6fd0000 0 0x30>;
461 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
463 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
465 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
466 clocks = <&cpg CPG_MOD 715>;
467 clock-names = "fck";
468 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
469 resets = <&cpg 715>;
470 status = "disabled";
471 };
472
473 tmu3: timer@e6fe0000 {
474 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
475 reg = <0 0xe6fe0000 0 0x30>;
476 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
480 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
481 clocks = <&cpg CPG_MOD 716>;
482 clock-names = "fck";
483 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
484 resets = <&cpg 716>;
485 status = "disabled";
486 };
487
488 tmu4: timer@ffc00000 {
489 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
490 reg = <0 0xffc00000 0 0x30>;
491 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
492 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
493 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
495 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
496 clocks = <&cpg CPG_MOD 717>;
497 clock-names = "fck";
498 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
499 resets = <&cpg 717>;
500 status = "disabled";
501 };
502
503 i2c0: i2c@e6500000 {
504 compatible = "renesas,i2c-r8a779h0",
505 "renesas,rcar-gen4-i2c";
506 reg = <0 0xe6500000 0 0x40>;
507 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 518>;
509 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
510 resets = <&cpg 518>;
511 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
512 <&dmac2 0x91>, <&dmac2 0x90>;
513 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay-ns = <110>;
515 #address-cells = <1>;
516 #size-cells = <0>;
517 status = "disabled";
518 };
519
520 i2c1: i2c@e6508000 {
521 compatible = "renesas,i2c-r8a779h0",
522 "renesas,rcar-gen4-i2c";
523 reg = <0 0xe6508000 0 0x40>;
524 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 519>;
526 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
527 resets = <&cpg 519>;
528 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
529 <&dmac2 0x93>, <&dmac2 0x92>;
530 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay-ns = <110>;
532 #address-cells = <1>;
533 #size-cells = <0>;
534 status = "disabled";
535 };
536
537 i2c2: i2c@e6510000 {
538 compatible = "renesas,i2c-r8a779h0",
539 "renesas,rcar-gen4-i2c";
540 reg = <0 0xe6510000 0 0x40>;
541 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 520>;
543 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
544 resets = <&cpg 520>;
545 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
546 <&dmac2 0x95>, <&dmac2 0x94>;
547 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay-ns = <110>;
549 #address-cells = <1>;
550 #size-cells = <0>;
551 status = "disabled";
552 };
553
554 i2c3: i2c@e66d0000 {
555 compatible = "renesas,i2c-r8a779h0",
556 "renesas,rcar-gen4-i2c";
557 reg = <0 0xe66d0000 0 0x40>;
558 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 521>;
560 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
561 resets = <&cpg 521>;
562 dmas = <&dmac1 0x97>, <&dmac1 0x96>,
563 <&dmac2 0x97>, <&dmac2 0x96>;
564 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay-ns = <110>;
566 #address-cells = <1>;
567 #size-cells = <0>;
568 status = "disabled";
569 };
570
571 hscif0: serial@e6540000 {
572 compatible = "renesas,hscif-r8a779h0",
573 "renesas,rcar-gen4-hscif", "renesas,hscif";
574 reg = <0 0xe6540000 0 0x60>;
575 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 514>,
577 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
578 <&scif_clk>;
579 clock-names = "fck", "brg_int", "scif_clk";
580 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
581 resets = <&cpg 514>;
582 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
583 <&dmac2 0x31>, <&dmac2 0x30>;
584 dma-names = "tx", "rx", "tx", "rx";
585 status = "disabled";
586 };
587
588 hscif1: serial@e6550000 {
589 compatible = "renesas,hscif-r8a779h0",
590 "renesas,rcar-gen4-hscif", "renesas,hscif";
591 reg = <0 0xe6550000 0 0x60>;
592 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
593 clocks = <&cpg CPG_MOD 515>,
594 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
595 <&scif_clk>;
596 clock-names = "fck", "brg_int", "scif_clk";
597 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
598 resets = <&cpg 515>;
599 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
600 <&dmac2 0x33>, <&dmac2 0x32>;
601 dma-names = "tx", "rx", "tx", "rx";
602 status = "disabled";
603 };
604
605 hscif2: serial@e6560000 {
606 compatible = "renesas,hscif-r8a779h0",
607 "renesas,rcar-gen4-hscif", "renesas,hscif";
608 reg = <0 0xe6560000 0 0x60>;
609 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
610 clocks = <&cpg CPG_MOD 516>,
611 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
612 <&scif_clk2>;
613 clock-names = "fck", "brg_int", "scif_clk";
614 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
615 resets = <&cpg 516>;
616 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
617 <&dmac2 0x35>, <&dmac2 0x34>;
618 dma-names = "tx", "rx", "tx", "rx";
619 status = "disabled";
620 };
621
622 hscif3: serial@e66a0000 {
623 compatible = "renesas,hscif-r8a779h0",
624 "renesas,rcar-gen4-hscif", "renesas,hscif";
625 reg = <0 0xe66a0000 0 0x60>;
626 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&cpg CPG_MOD 517>,
628 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
629 <&scif_clk>;
630 clock-names = "fck", "brg_int", "scif_clk";
631 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
632 resets = <&cpg 517>;
633 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
634 <&dmac2 0x37>, <&dmac2 0x36>;
635 dma-names = "tx", "rx", "tx", "rx";
636 status = "disabled";
637 };
638
639 avb0: ethernet@e6800000 {
640 compatible = "renesas,etheravb-r8a779h0",
641 "renesas,etheravb-rcar-gen4";
642 reg = <0 0xe6800000 0 0x1000>;
643 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
645 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
653 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
654 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
655 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
659 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
661 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
662 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
663 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
664 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
665 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
667 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
668 interrupt-names = "ch0", "ch1", "ch2", "ch3",
669 "ch4", "ch5", "ch6", "ch7",
670 "ch8", "ch9", "ch10", "ch11",
671 "ch12", "ch13", "ch14", "ch15",
672 "ch16", "ch17", "ch18", "ch19",
673 "ch20", "ch21", "ch22", "ch23",
674 "ch24";
675 clocks = <&cpg CPG_MOD 211>;
676 clock-names = "fck";
677 power-domains = <&sysc R8A779H0_PD_C4>;
678 resets = <&cpg 211>;
679 phy-mode = "rgmii";
680 rx-internal-delay-ps = <0>;
681 tx-internal-delay-ps = <0>;
682 iommus = <&ipmmu_hc 0>;
683 #address-cells = <1>;
684 #size-cells = <0>;
685 status = "disabled";
686 };
687
688 avb1: ethernet@e6810000 {
689 compatible = "renesas,etheravb-r8a779h0",
690 "renesas,etheravb-rcar-gen4";
691 reg = <0 0xe6810000 0 0x1000>;
692 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
693 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
694 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
695 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
696 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
697 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
698 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
717 interrupt-names = "ch0", "ch1", "ch2", "ch3",
718 "ch4", "ch5", "ch6", "ch7",
719 "ch8", "ch9", "ch10", "ch11",
720 "ch12", "ch13", "ch14", "ch15",
721 "ch16", "ch17", "ch18", "ch19",
722 "ch20", "ch21", "ch22", "ch23",
723 "ch24";
724 clocks = <&cpg CPG_MOD 212>;
725 clock-names = "fck";
726 power-domains = <&sysc R8A779H0_PD_C4>;
727 resets = <&cpg 212>;
728 phy-mode = "rgmii";
729 rx-internal-delay-ps = <0>;
730 tx-internal-delay-ps = <0>;
731 #address-cells = <1>;
732 #size-cells = <0>;
733 status = "disabled";
734 };
735
736 avb2: ethernet@e6820000 {
737 compatible = "renesas,etheravb-r8a779h0",
738 "renesas,etheravb-rcar-gen4";
739 reg = <0 0xe6820000 0 0x1000>;
740 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
765 interrupt-names = "ch0", "ch1", "ch2", "ch3",
766 "ch4", "ch5", "ch6", "ch7",
767 "ch8", "ch9", "ch10", "ch11",
768 "ch12", "ch13", "ch14", "ch15",
769 "ch16", "ch17", "ch18", "ch19",
770 "ch20", "ch21", "ch22", "ch23",
771 "ch24";
772 clocks = <&cpg CPG_MOD 213>;
773 clock-names = "fck";
774 power-domains = <&sysc R8A779H0_PD_C4>;
775 resets = <&cpg 213>;
776 phy-mode = "rgmii";
777 rx-internal-delay-ps = <0>;
778 tx-internal-delay-ps = <0>;
779 #address-cells = <1>;
780 #size-cells = <0>;
781 status = "disabled";
782 };
783
784 scif0: serial@e6e60000 {
785 compatible = "renesas,scif-r8a779h0",
786 "renesas,rcar-gen4-scif", "renesas,scif";
787 reg = <0 0xe6e60000 0 64>;
788 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&cpg CPG_MOD 702>,
790 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
791 <&scif_clk>;
792 clock-names = "fck", "brg_int", "scif_clk";
793 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
794 resets = <&cpg 702>;
795 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
796 <&dmac2 0x51>, <&dmac2 0x50>;
797 dma-names = "tx", "rx", "tx", "rx";
798 status = "disabled";
799 };
800
801 scif1: serial@e6e68000 {
802 compatible = "renesas,scif-r8a779h0",
803 "renesas,rcar-gen4-scif", "renesas,scif";
804 reg = <0 0xe6e68000 0 64>;
805 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&cpg CPG_MOD 703>,
807 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
808 <&scif_clk>;
809 clock-names = "fck", "brg_int", "scif_clk";
810 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
811 resets = <&cpg 703>;
812 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
813 <&dmac2 0x53>, <&dmac2 0x52>;
814 dma-names = "tx", "rx", "tx", "rx";
815 status = "disabled";
816 };
817
818 scif3: serial@e6c50000 {
819 compatible = "renesas,scif-r8a779h0",
820 "renesas,rcar-gen4-scif", "renesas,scif";
821 reg = <0 0xe6c50000 0 64>;
822 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
823 clocks = <&cpg CPG_MOD 704>,
824 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
825 <&scif_clk>;
826 clock-names = "fck", "brg_int", "scif_clk";
827 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
828 resets = <&cpg 704>;
829 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
830 <&dmac2 0x57>, <&dmac2 0x56>;
831 dma-names = "tx", "rx", "tx", "rx";
832 status = "disabled";
833 };
834
835 scif4: serial@e6c40000 {
836 compatible = "renesas,scif-r8a779h0",
837 "renesas,rcar-gen4-scif", "renesas,scif";
838 reg = <0 0xe6c40000 0 64>;
839 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
840 clocks = <&cpg CPG_MOD 705>,
841 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
842 <&scif_clk2>;
843 clock-names = "fck", "brg_int", "scif_clk";
844 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
845 resets = <&cpg 705>;
846 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
847 <&dmac2 0x59>, <&dmac2 0x58>;
848 dma-names = "tx", "rx", "tx", "rx";
849 status = "disabled";
850 };
851
852 msiof0: spi@e6e90000 {
853 compatible = "renesas,msiof-r8a779h0",
854 "renesas,rcar-gen4-msiof";
855 reg = <0 0xe6e90000 0 0x0064>;
856 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
857 clocks = <&cpg CPG_MOD 618>;
858 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
859 <&dmac2 0x41>, <&dmac2 0x40>;
860 dma-names = "tx", "rx", "tx", "rx";
861 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
862 resets = <&cpg 618>;
863 #address-cells = <1>;
864 #size-cells = <0>;
865 status = "disabled";
866 };
867
868 msiof1: spi@e6ea0000 {
869 compatible = "renesas,msiof-r8a779h0",
870 "renesas,rcar-gen4-msiof";
871 reg = <0 0xe6ea0000 0 0x0064>;
872 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
873 clocks = <&cpg CPG_MOD 619>;
874 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
875 <&dmac2 0x43>, <&dmac2 0x42>;
876 dma-names = "tx", "rx", "tx", "rx";
877 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
878 resets = <&cpg 619>;
879 #address-cells = <1>;
880 #size-cells = <0>;
881 status = "disabled";
882 };
883
884 msiof2: spi@e6c00000 {
885 compatible = "renesas,msiof-r8a779h0",
886 "renesas,rcar-gen4-msiof";
887 reg = <0 0xe6c00000 0 0x0064>;
888 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
889 clocks = <&cpg CPG_MOD 620>;
890 dmas = <&dmac1 0x45>, <&dmac1 0x44>,
891 <&dmac2 0x45>, <&dmac2 0x44>;
892 dma-names = "tx", "rx", "tx", "rx";
893 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
894 resets = <&cpg 620>;
895 #address-cells = <1>;
896 #size-cells = <0>;
897 status = "disabled";
898 };
899
900 msiof3: spi@e6c10000 {
901 compatible = "renesas,msiof-r8a779h0",
902 "renesas,rcar-gen4-msiof";
903 reg = <0 0xe6c10000 0 0x0064>;
904 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&cpg CPG_MOD 621>;
906 dmas = <&dmac1 0x47>, <&dmac1 0x46>,
907 <&dmac2 0x47>, <&dmac2 0x46>;
908 dma-names = "tx", "rx", "tx", "rx";
909 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
910 resets = <&cpg 621>;
911 #address-cells = <1>;
912 #size-cells = <0>;
913 status = "disabled";
914 };
915
916 msiof4: spi@e6c20000 {
917 compatible = "renesas,msiof-r8a779h0",
918 "renesas,rcar-gen4-msiof";
919 reg = <0 0xe6c20000 0 0x0064>;
920 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
921 clocks = <&cpg CPG_MOD 622>;
922 dmas = <&dmac1 0x49>, <&dmac1 0x48>,
923 <&dmac2 0x49>, <&dmac2 0x48>;
924 dma-names = "tx", "rx", "tx", "rx";
925 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
926 resets = <&cpg 622>;
927 #address-cells = <1>;
928 #size-cells = <0>;
929 status = "disabled";
930 };
931
932 msiof5: spi@e6c28000 {
933 compatible = "renesas,msiof-r8a779h0",
934 "renesas,rcar-gen4-msiof";
935 reg = <0 0xe6c28000 0 0x0064>;
936 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
937 clocks = <&cpg CPG_MOD 623>;
938 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>,
939 <&dmac2 0x4b>, <&dmac2 0x4a>;
940 dma-names = "tx", "rx", "tx", "rx";
941 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
942 resets = <&cpg 623>;
943 #address-cells = <1>;
944 #size-cells = <0>;
945 status = "disabled";
946 };
947
948 vin00: video@e6ef0000 {
949 compatible = "renesas,vin-r8a779h0";
950 reg = <0 0xe6ef0000 0 0x1000>;
951 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
952 clocks = <&cpg CPG_MOD 730>;
953 power-domains = <&sysc R8A779H0_PD_C4>;
954 resets = <&cpg 730>;
955 renesas,id = <0>;
956 status = "disabled";
957
958 ports {
959 #address-cells = <1>;
960 #size-cells = <0>;
961
962 port@2 {
963 #address-cells = <1>;
964 #size-cells = <0>;
965
966 reg = <2>;
967
968 vin00isp0: endpoint@0 {
969 reg = <0>;
970 remote-endpoint = <&isp0vin00>;
971 };
972 };
973 };
974 };
975
976 vin01: video@e6ef1000 {
977 compatible = "renesas,vin-r8a779h0";
978 reg = <0 0xe6ef1000 0 0x1000>;
979 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
980 clocks = <&cpg CPG_MOD 731>;
981 power-domains = <&sysc R8A779H0_PD_C4>;
982 resets = <&cpg 731>;
983 renesas,id = <1>;
984 status = "disabled";
985
986 ports {
987 #address-cells = <1>;
988 #size-cells = <0>;
989
990 port@2 {
991 #address-cells = <1>;
992 #size-cells = <0>;
993
994 reg = <2>;
995
996 vin01isp0: endpoint@0 {
997 reg = <0>;
998 remote-endpoint = <&isp0vin01>;
999 };
1000 };
1001 };
1002 };
1003
1004 vin02: video@e6ef2000 {
1005 compatible = "renesas,vin-r8a779h0";
1006 reg = <0 0xe6ef2000 0 0x1000>;
1007 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
1008 clocks = <&cpg CPG_MOD 800>;
1009 power-domains = <&sysc R8A779H0_PD_C4>;
1010 resets = <&cpg 800>;
1011 renesas,id = <2>;
1012 status = "disabled";
1013
1014 ports {
1015 #address-cells = <1>;
1016 #size-cells = <0>;
1017
1018 port@2 {
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021
1022 reg = <2>;
1023
1024 vin02isp0: endpoint@0 {
1025 reg = <0>;
1026 remote-endpoint = <&isp0vin02>;
1027 };
1028 };
1029 };
1030 };
1031
1032 vin03: video@e6ef3000 {
1033 compatible = "renesas,vin-r8a779h0";
1034 reg = <0 0xe6ef3000 0 0x1000>;
1035 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
1036 clocks = <&cpg CPG_MOD 801>;
1037 power-domains = <&sysc R8A779H0_PD_C4>;
1038 resets = <&cpg 801>;
1039 renesas,id = <3>;
1040 status = "disabled";
1041
1042 ports {
1043 #address-cells = <1>;
1044 #size-cells = <0>;
1045
1046 port@2 {
1047 #address-cells = <1>;
1048 #size-cells = <0>;
1049
1050 reg = <2>;
1051
1052 vin03isp0: endpoint@0 {
1053 reg = <0>;
1054 remote-endpoint = <&isp0vin03>;
1055 };
1056 };
1057 };
1058 };
1059
1060 vin04: video@e6ef4000 {
1061 compatible = "renesas,vin-r8a779h0";
1062 reg = <0 0xe6ef4000 0 0x1000>;
1063 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
1064 clocks = <&cpg CPG_MOD 802>;
1065 power-domains = <&sysc R8A779H0_PD_C4>;
1066 resets = <&cpg 802>;
1067 renesas,id = <4>;
1068 status = "disabled";
1069
1070 ports {
1071 #address-cells = <1>;
1072 #size-cells = <0>;
1073
1074 port@2 {
1075 #address-cells = <1>;
1076 #size-cells = <0>;
1077
1078 reg = <2>;
1079
1080 vin04isp0: endpoint@0 {
1081 reg = <0>;
1082 remote-endpoint = <&isp0vin04>;
1083 };
1084 };
1085 };
1086 };
1087
1088 vin05: video@e6ef5000 {
1089 compatible = "renesas,vin-r8a779h0";
1090 reg = <0 0xe6ef5000 0 0x1000>;
1091 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
1092 clocks = <&cpg CPG_MOD 803>;
1093 power-domains = <&sysc R8A779H0_PD_C4>;
1094 resets = <&cpg 803>;
1095 renesas,id = <5>;
1096 status = "disabled";
1097
1098 ports {
1099 #address-cells = <1>;
1100 #size-cells = <0>;
1101
1102 port@2 {
1103 #address-cells = <1>;
1104 #size-cells = <0>;
1105
1106 reg = <2>;
1107
1108 vin05isp0: endpoint@0 {
1109 reg = <0>;
1110 remote-endpoint = <&isp0vin05>;
1111 };
1112 };
1113 };
1114 };
1115
1116 vin06: video@e6ef6000 {
1117 compatible = "renesas,vin-r8a779h0";
1118 reg = <0 0xe6ef6000 0 0x1000>;
1119 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
1120 clocks = <&cpg CPG_MOD 804>;
1121 power-domains = <&sysc R8A779H0_PD_C4>;
1122 resets = <&cpg 804>;
1123 renesas,id = <6>;
1124 status = "disabled";
1125
1126 ports {
1127 #address-cells = <1>;
1128 #size-cells = <0>;
1129
1130 port@2 {
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1133
1134 reg = <2>;
1135
1136 vin06isp0: endpoint@0 {
1137 reg = <0>;
1138 remote-endpoint = <&isp0vin06>;
1139 };
1140 };
1141 };
1142 };
1143
1144 vin07: video@e6ef7000 {
1145 compatible = "renesas,vin-r8a779h0";
1146 reg = <0 0xe6ef7000 0 0x1000>;
1147 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
1148 clocks = <&cpg CPG_MOD 805>;
1149 power-domains = <&sysc R8A779H0_PD_C4>;
1150 resets = <&cpg 805>;
1151 renesas,id = <7>;
1152 status = "disabled";
1153
1154 ports {
1155 #address-cells = <1>;
1156 #size-cells = <0>;
1157
1158 port@2 {
1159 #address-cells = <1>;
1160 #size-cells = <0>;
1161
1162 reg = <2>;
1163
1164 vin07isp0: endpoint@0 {
1165 reg = <0>;
1166 remote-endpoint = <&isp0vin07>;
1167 };
1168 };
1169 };
1170 };
1171
1172 vin08: video@e6ef8000 {
1173 compatible = "renesas,vin-r8a779h0";
1174 reg = <0 0xe6ef8000 0 0x1000>;
1175 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
1176 clocks = <&cpg CPG_MOD 806>;
1177 power-domains = <&sysc R8A779H0_PD_C4>;
1178 resets = <&cpg 806>;
1179 renesas,id = <8>;
1180 status = "disabled";
1181
1182 ports {
1183 #address-cells = <1>;
1184 #size-cells = <0>;
1185
1186 port@2 {
1187 #address-cells = <1>;
1188 #size-cells = <0>;
1189
1190 reg = <2>;
1191
1192 vin08isp1: endpoint@1 {
1193 reg = <1>;
1194 remote-endpoint = <&isp1vin08>;
1195 };
1196 };
1197 };
1198 };
1199
1200 vin09: video@e6ef9000 {
1201 compatible = "renesas,vin-r8a779h0";
1202 reg = <0 0xe6ef9000 0 0x1000>;
1203 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
1204 clocks = <&cpg CPG_MOD 807>;
1205 power-domains = <&sysc R8A779H0_PD_C4>;
1206 resets = <&cpg 807>;
1207 renesas,id = <9>;
1208 status = "disabled";
1209
1210 ports {
1211 #address-cells = <1>;
1212 #size-cells = <0>;
1213
1214 port@2 {
1215 #address-cells = <1>;
1216 #size-cells = <0>;
1217
1218 reg = <2>;
1219
1220 vin09isp1: endpoint@1 {
1221 reg = <1>;
1222 remote-endpoint = <&isp1vin09>;
1223 };
1224 };
1225 };
1226 };
1227
1228 vin10: video@e6efa000 {
1229 compatible = "renesas,vin-r8a779h0";
1230 reg = <0 0xe6efa000 0 0x1000>;
1231 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
1232 clocks = <&cpg CPG_MOD 808>;
1233 power-domains = <&sysc R8A779H0_PD_C4>;
1234 resets = <&cpg 808>;
1235 renesas,id = <10>;
1236 status = "disabled";
1237
1238 ports {
1239 #address-cells = <1>;
1240 #size-cells = <0>;
1241
1242 port@2 {
1243 #address-cells = <1>;
1244 #size-cells = <0>;
1245
1246 reg = <2>;
1247
1248 vin10isp1: endpoint@1 {
1249 reg = <1>;
1250 remote-endpoint = <&isp1vin10>;
1251 };
1252 };
1253 };
1254 };
1255
1256 vin11: video@e6efb000 {
1257 compatible = "renesas,vin-r8a779h0";
1258 reg = <0 0xe6efb000 0 0x1000>;
1259 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MOD 809>;
1261 power-domains = <&sysc R8A779H0_PD_C4>;
1262 resets = <&cpg 809>;
1263 renesas,id = <11>;
1264 status = "disabled";
1265
1266 ports {
1267 #address-cells = <1>;
1268 #size-cells = <0>;
1269
1270 port@2 {
1271 #address-cells = <1>;
1272 #size-cells = <0>;
1273
1274 reg = <2>;
1275
1276 vin11isp1: endpoint@1 {
1277 reg = <1>;
1278 remote-endpoint = <&isp1vin11>;
1279 };
1280 };
1281 };
1282 };
1283
1284 vin12: video@e6efc000 {
1285 compatible = "renesas,vin-r8a779h0";
1286 reg = <0 0xe6efc000 0 0x1000>;
1287 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MOD 810>;
1289 power-domains = <&sysc R8A779H0_PD_C4>;
1290 resets = <&cpg 810>;
1291 renesas,id = <12>;
1292 status = "disabled";
1293
1294 ports {
1295 #address-cells = <1>;
1296 #size-cells = <0>;
1297
1298 port@2 {
1299 #address-cells = <1>;
1300 #size-cells = <0>;
1301
1302 reg = <2>;
1303
1304 vin12isp1: endpoint@1 {
1305 reg = <1>;
1306 remote-endpoint = <&isp1vin12>;
1307 };
1308 };
1309 };
1310 };
1311
1312 vin13: video@e6efd000 {
1313 compatible = "renesas,vin-r8a779h0";
1314 reg = <0 0xe6efd000 0 0x1000>;
1315 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
1316 clocks = <&cpg CPG_MOD 811>;
1317 power-domains = <&sysc R8A779H0_PD_C4>;
1318 resets = <&cpg 811>;
1319 renesas,id = <13>;
1320 status = "disabled";
1321
1322 ports {
1323 #address-cells = <1>;
1324 #size-cells = <0>;
1325
1326 port@2 {
1327 #address-cells = <1>;
1328 #size-cells = <0>;
1329
1330 reg = <2>;
1331
1332 vin13isp1: endpoint@1 {
1333 reg = <1>;
1334 remote-endpoint = <&isp1vin13>;
1335 };
1336 };
1337 };
1338 };
1339
1340 vin14: video@e6efe000 {
1341 compatible = "renesas,vin-r8a779h0";
1342 reg = <0 0xe6efe000 0 0x1000>;
1343 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
1344 clocks = <&cpg CPG_MOD 812>;
1345 power-domains = <&sysc R8A779H0_PD_C4>;
1346 resets = <&cpg 812>;
1347 renesas,id = <14>;
1348 status = "disabled";
1349
1350 ports {
1351 #address-cells = <1>;
1352 #size-cells = <0>;
1353
1354 port@2 {
1355 #address-cells = <1>;
1356 #size-cells = <0>;
1357
1358 reg = <2>;
1359
1360 vin14isp1: endpoint@1 {
1361 reg = <1>;
1362 remote-endpoint = <&isp1vin14>;
1363 };
1364 };
1365 };
1366 };
1367
1368 vin15: video@e6eff000 {
1369 compatible = "renesas,vin-r8a779h0";
1370 reg = <0 0xe6eff000 0 0x1000>;
1371 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
1372 clocks = <&cpg CPG_MOD 813>;
1373 power-domains = <&sysc R8A779H0_PD_C4>;
1374 resets = <&cpg 813>;
1375 renesas,id = <15>;
1376 status = "disabled";
1377
1378 ports {
1379 #address-cells = <1>;
1380 #size-cells = <0>;
1381
1382 port@2 {
1383 #address-cells = <1>;
1384 #size-cells = <0>;
1385
1386 reg = <2>;
1387
1388 vin15isp1: endpoint@1 {
1389 reg = <1>;
1390 remote-endpoint = <&isp1vin15>;
1391 };
1392 };
1393 };
1394 };
1395
1396 dmac1: dma-controller@e7350000 {
1397 compatible = "renesas,dmac-r8a779h0",
1398 "renesas,rcar-gen4-dmac";
1399 reg = <0 0xe7350000 0 0x1000>,
1400 <0 0xe7300000 0 0x10000>;
1401 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
1402 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1403 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
1404 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
1405 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
1406 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
1407 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
1408 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
1409 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
1410 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
1411 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
1412 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
1413 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
1414 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1415 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
1416 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
1417 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1418 interrupt-names = "error",
1419 "ch0", "ch1", "ch2", "ch3", "ch4",
1420 "ch5", "ch6", "ch7", "ch8", "ch9",
1421 "ch10", "ch11", "ch12", "ch13",
1422 "ch14", "ch15";
1423 clocks = <&cpg CPG_MOD 709>;
1424 clock-names = "fck";
1425 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1426 resets = <&cpg 709>;
1427 #dma-cells = <1>;
1428 dma-channels = <16>;
1429 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1430 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1431 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1432 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1433 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1434 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1435 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1436 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1437 };
1438
1439 dmac2: dma-controller@e7351000 {
1440 compatible = "renesas,dmac-r8a779h0",
1441 "renesas,rcar-gen4-dmac";
1442 reg = <0 0xe7351000 0 0x1000>,
1443 <0 0xe7310000 0 0x10000>;
1444 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
1445 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
1446 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
1447 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
1448 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
1449 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1450 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1451 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1452 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1453 interrupt-names = "error",
1454 "ch0", "ch1", "ch2", "ch3", "ch4",
1455 "ch5", "ch6", "ch7";
1456 clocks = <&cpg CPG_MOD 710>;
1457 clock-names = "fck";
1458 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1459 resets = <&cpg 710>;
1460 #dma-cells = <1>;
1461 dma-channels = <8>;
1462 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
1463 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
1464 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
1465 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>;
1466 };
1467
1468 rcar_sound: sound@ec400000 {
1469 compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4";
1470 reg = <0 0xec400000 0 0x40000>,
1471 <0 0xec540000 0 0x1000>,
1472 <0 0xec541000 0 0x050>,
1473 <0 0xec5a0000 0 0x020>;
1474 reg-names = "sdmc", "ssiu", "ssi", "adg";
1475 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>;
1476 clock-names = "ssiu.0", "ssi.0", "clkin";
1477 /* #clock-cells is fixed */
1478 #clock-cells = <0>;
1479 /* #sound-dai-cells is fixed */
1480 #sound-dai-cells = <0>;
1481
1482 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1483 resets = <&cpg 2926>, <&cpg 2927>;
1484 reset-names = "ssiu.0", "ssi.0";
1485 status = "disabled";
1486
1487 rcar_sound,ssiu {
1488 ssiu00: ssiu-0 {
1489 dmas = <&dmac1 0x6e>, <&dmac1 0x6f>;
1490 dma-names = "tx", "rx";
1491 };
1492 ssiu01: ssiu-1 {
1493 dmas = <&dmac1 0x6c>, <&dmac1 0x6d>;
1494 dma-names = "tx", "rx";
1495 };
1496 ssiu02: ssiu-2 {
1497 dmas = <&dmac1 0x6a>, <&dmac1 0x6b>;
1498 dma-names = "tx", "rx";
1499 };
1500 ssiu03: ssiu-3 {
1501 dmas = <&dmac1 0x68>, <&dmac1 0x69>;
1502 dma-names = "tx", "rx";
1503 };
1504 ssiu04: ssiu-4 {
1505 dmas = <&dmac1 0x66>, <&dmac1 0x67>;
1506 dma-names = "tx", "rx";
1507 };
1508 ssiu05: ssiu-5 {
1509 dmas = <&dmac1 0x64>, <&dmac1 0x65>;
1510 dma-names = "tx", "rx";
1511 };
1512 ssiu06: ssiu-6 {
1513 dmas = <&dmac1 0x62>, <&dmac1 0x63>;
1514 dma-names = "tx", "rx";
1515 };
1516 ssiu07: ssiu-7 {
1517 dmas = <&dmac1 0x60>, <&dmac1 0x61>;
1518 dma-names = "tx", "rx";
1519 };
1520 };
1521
1522 rcar_sound,ssi {
1523 ssi0: ssi-0 {
1524 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
1525 };
1526 };
1527 };
1528
1529 mmc0: mmc@ee140000 {
1530 compatible = "renesas,sdhi-r8a779h0",
1531 "renesas,rcar-gen4-sdhi";
1532 reg = <0 0xee140000 0 0x2000>;
1533 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
1534 clocks = <&cpg CPG_MOD 706>,
1535 <&cpg CPG_CORE R8A779H0_CLK_SD0H>;
1536 clock-names = "core", "clkh";
1537 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1538 resets = <&cpg 706>;
1539 max-frequency = <200000000>;
1540 iommus = <&ipmmu_ds0 32>;
1541 status = "disabled";
1542 };
1543
1544 rpc: spi@ee200000 {
1545 compatible = "renesas,r8a779h0-rpc-if",
1546 "renesas,rcar-gen4-rpc-if";
1547 reg = <0 0xee200000 0 0x200>,
1548 <0 0x08000000 0 0x04000000>,
1549 <0 0xee208000 0 0x100>;
1550 reg-names = "regs", "dirmap", "wbuf";
1551 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1552 clocks = <&cpg CPG_MOD 629>;
1553 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1554 resets = <&cpg 629>;
1555 #address-cells = <1>;
1556 #size-cells = <0>;
1557 status = "disabled";
1558 };
1559
1560 ipmmu_rt0: iommu@ee480000 {
1561 compatible = "renesas,ipmmu-r8a779h0",
1562 "renesas,rcar-gen4-ipmmu-vmsa";
1563 reg = <0 0xee480000 0 0x20000>;
1564 renesas,ipmmu-main = <&ipmmu_mm>;
1565 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1566 #iommu-cells = <1>;
1567 };
1568
1569 ipmmu_rt1: iommu@ee4c0000 {
1570 compatible = "renesas,ipmmu-r8a779h0",
1571 "renesas,rcar-gen4-ipmmu-vmsa";
1572 reg = <0 0xee4c0000 0 0x20000>;
1573 renesas,ipmmu-main = <&ipmmu_mm>;
1574 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1575 #iommu-cells = <1>;
1576 };
1577
1578 ipmmu_ds0: iommu@eed00000 {
1579 compatible = "renesas,ipmmu-r8a779h0",
1580 "renesas,rcar-gen4-ipmmu-vmsa";
1581 reg = <0 0xeed00000 0 0x20000>;
1582 renesas,ipmmu-main = <&ipmmu_mm>;
1583 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1584 #iommu-cells = <1>;
1585 };
1586
1587 ipmmu_hc: iommu@eed40000 {
1588 compatible = "renesas,ipmmu-r8a779h0",
1589 "renesas,rcar-gen4-ipmmu-vmsa";
1590 reg = <0 0xeed40000 0 0x20000>;
1591 renesas,ipmmu-main = <&ipmmu_mm>;
1592 power-domains = <&sysc R8A779H0_PD_C4>;
1593 #iommu-cells = <1>;
1594 };
1595
1596 ipmmu_ir: iommu@eed80000 {
1597 compatible = "renesas,ipmmu-r8a779h0",
1598 "renesas,rcar-gen4-ipmmu-vmsa";
1599 reg = <0 0xeed80000 0 0x20000>;
1600 renesas,ipmmu-main = <&ipmmu_mm>;
1601 power-domains = <&sysc R8A779H0_PD_C4>;
1602 #iommu-cells = <1>;
1603 };
1604
1605 ipmmu_vc: iommu@eedc0000 {
1606 compatible = "renesas,ipmmu-r8a779h0",
1607 "renesas,rcar-gen4-ipmmu-vmsa";
1608 reg = <0 0xeedc0000 0 0x20000>;
1609 renesas,ipmmu-main = <&ipmmu_mm>;
1610 power-domains = <&sysc R8A779H0_PD_C4>;
1611 #iommu-cells = <1>;
1612 };
1613
1614 ipmmu_3dg: iommu@eee00000 {
1615 compatible = "renesas,ipmmu-r8a779h0",
1616 "renesas,rcar-gen4-ipmmu-vmsa";
1617 reg = <0 0xeee00000 0 0x20000>;
1618 renesas,ipmmu-main = <&ipmmu_mm>;
1619 power-domains = <&sysc R8A779H0_PD_C4>;
1620 #iommu-cells = <1>;
1621 };
1622
1623 ipmmu_vi0: iommu@eee80000 {
1624 compatible = "renesas,ipmmu-r8a779h0",
1625 "renesas,rcar-gen4-ipmmu-vmsa";
1626 reg = <0 0xeee80000 0 0x20000>;
1627 renesas,ipmmu-main = <&ipmmu_mm>;
1628 power-domains = <&sysc R8A779H0_PD_C4>;
1629 #iommu-cells = <1>;
1630 };
1631
1632 ipmmu_vi1: iommu@eeec0000 {
1633 compatible = "renesas,ipmmu-r8a779h0",
1634 "renesas,rcar-gen4-ipmmu-vmsa";
1635 reg = <0 0xeeec0000 0 0x20000>;
1636 renesas,ipmmu-main = <&ipmmu_mm>;
1637 power-domains = <&sysc R8A779H0_PD_C4>;
1638 #iommu-cells = <1>;
1639 };
1640
1641 ipmmu_vip0: iommu@eef00000 {
1642 compatible = "renesas,ipmmu-r8a779h0",
1643 "renesas,rcar-gen4-ipmmu-vmsa";
1644 reg = <0 0xeef00000 0 0x20000>;
1645 renesas,ipmmu-main = <&ipmmu_mm>;
1646 power-domains = <&sysc R8A779H0_PD_C4>;
1647 #iommu-cells = <1>;
1648 };
1649
1650 ipmmu_mm: iommu@eefc0000 {
1651 compatible = "renesas,ipmmu-r8a779h0",
1652 "renesas,rcar-gen4-ipmmu-vmsa";
1653 reg = <0 0xeefc0000 0 0x20000>;
1654 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1655 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
1656 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1657 #iommu-cells = <1>;
1658 };
1659
1660 gic: interrupt-controller@f1000000 {
1661 compatible = "arm,gic-v3";
1662 #interrupt-cells = <3>;
1663 #address-cells = <0>;
1664 interrupt-controller;
1665 reg = <0x0 0xf1000000 0 0x20000>,
1666 <0x0 0xf1060000 0 0x110000>;
1667 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
1668 };
1669
1670 csi40: csi2@fe500000 {
1671 compatible = "renesas,r8a779h0-csi2";
1672 reg = <0 0xfe500000 0 0x40000>;
1673 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
1674 clocks = <&cpg CPG_MOD 331>;
1675 power-domains = <&sysc R8A779H0_PD_C4>;
1676 resets = <&cpg 331>;
1677 status = "disabled";
1678
1679 ports {
1680 #address-cells = <1>;
1681 #size-cells = <0>;
1682
1683 port@0 {
1684 reg = <0>;
1685 };
1686
1687 port@1 {
1688 reg = <1>;
1689 csi40isp0: endpoint {
1690 remote-endpoint = <&isp0csi40>;
1691 };
1692 };
1693 };
1694 };
1695
1696 csi41: csi2@fe540000 {
1697 compatible = "renesas,r8a779h0-csi2";
1698 reg = <0 0xfe540000 0 0x40000>;
1699 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>;
1700 clocks = <&cpg CPG_MOD 400>;
1701 power-domains = <&sysc R8A779H0_PD_C4>;
1702 resets = <&cpg 400>;
1703 status = "disabled";
1704
1705 ports {
1706 #address-cells = <1>;
1707 #size-cells = <0>;
1708
1709 port@0 {
1710 reg = <0>;
1711 };
1712
1713 port@1 {
1714 reg = <1>;
1715 csi41isp1: endpoint {
1716 remote-endpoint = <&isp1csi41>;
1717 };
1718 };
1719 };
1720 };
1721
1722 isp0: isp@fed00000 {
1723 compatible = "renesas,r8a779h0-isp";
1724 reg = <0 0xfed00000 0 0x10000>;
1725 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
1726 clocks = <&cpg CPG_MOD 612>;
1727 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1728 resets = <&cpg 612>;
1729 status = "disabled";
1730
1731 ports {
1732 #address-cells = <1>;
1733 #size-cells = <0>;
1734
1735 port@0 {
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1738
1739 reg = <0>;
1740
1741 isp0csi40: endpoint@0 {
1742 reg = <0>;
1743 remote-endpoint = <&csi40isp0>;
1744 };
1745 };
1746
1747 port@1 {
1748 reg = <1>;
1749 isp0vin00: endpoint {
1750 remote-endpoint = <&vin00isp0>;
1751 };
1752 };
1753
1754 port@2 {
1755 reg = <2>;
1756 isp0vin01: endpoint {
1757 remote-endpoint = <&vin01isp0>;
1758 };
1759 };
1760
1761 port@3 {
1762 reg = <3>;
1763 isp0vin02: endpoint {
1764 remote-endpoint = <&vin02isp0>;
1765 };
1766 };
1767
1768 port@4 {
1769 reg = <4>;
1770 isp0vin03: endpoint {
1771 remote-endpoint = <&vin03isp0>;
1772 };
1773 };
1774
1775 port@5 {
1776 reg = <5>;
1777 isp0vin04: endpoint {
1778 remote-endpoint = <&vin04isp0>;
1779 };
1780 };
1781
1782 port@6 {
1783 reg = <6>;
1784 isp0vin05: endpoint {
1785 remote-endpoint = <&vin05isp0>;
1786 };
1787 };
1788
1789 port@7 {
1790 reg = <7>;
1791 isp0vin06: endpoint {
1792 remote-endpoint = <&vin06isp0>;
1793 };
1794 };
1795
1796 port@8 {
1797 reg = <8>;
1798 isp0vin07: endpoint {
1799 remote-endpoint = <&vin07isp0>;
1800 };
1801 };
1802 };
1803 };
1804
1805 isp1: isp@fed20000 {
1806 compatible = "renesas,r8a779h0-isp";
1807 reg = <0 0xfed20000 0 0x10000>;
1808 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
1809 clocks = <&cpg CPG_MOD 613>;
1810 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1811 resets = <&cpg 613>;
1812 status = "disabled";
1813
1814 ports {
1815 #address-cells = <1>;
1816 #size-cells = <0>;
1817
1818 port@0 {
1819 #address-cells = <1>;
1820 #size-cells = <0>;
1821
1822 reg = <0>;
1823
1824 isp1csi41: endpoint@1 {
1825 reg = <1>;
1826 remote-endpoint = <&csi41isp1>;
1827 };
1828 };
1829
1830 port@1 {
1831 reg = <1>;
1832 isp1vin08: endpoint {
1833 remote-endpoint = <&vin08isp1>;
1834 };
1835 };
1836
1837 port@2 {
1838 reg = <2>;
1839 isp1vin09: endpoint {
1840 remote-endpoint = <&vin09isp1>;
1841 };
1842 };
1843
1844 port@3 {
1845 reg = <3>;
1846 isp1vin10: endpoint {
1847 remote-endpoint = <&vin10isp1>;
1848 };
1849 };
1850
1851 port@4 {
1852 reg = <4>;
1853 isp1vin11: endpoint {
1854 remote-endpoint = <&vin11isp1>;
1855 };
1856 };
1857
1858 port@5 {
1859 reg = <5>;
1860 isp1vin12: endpoint {
1861 remote-endpoint = <&vin12isp1>;
1862 };
1863 };
1864
1865 port@6 {
1866 reg = <6>;
1867 isp1vin13: endpoint {
1868 remote-endpoint = <&vin13isp1>;
1869 };
1870 };
1871
1872 port@7 {
1873 reg = <7>;
1874 isp1vin14: endpoint {
1875 remote-endpoint = <&vin14isp1>;
1876 };
1877 };
1878
1879 port@8 {
1880 reg = <8>;
1881 isp1vin15: endpoint {
1882 remote-endpoint = <&vin15isp1>;
1883 };
1884 };
1885 };
1886 };
1887
1888 prr: chipid@fff00044 {
1889 compatible = "renesas,prr";
1890 reg = <0 0xfff00044 0 4>;
1891 };
1892 };
1893
1894 thermal-zones {
1895 sensor_thermal_cr52: sensor1-thermal {
1896 polling-delay-passive = <250>;
1897 polling-delay = <1000>;
1898 thermal-sensors = <&tsc 0>;
1899
1900 trips {
1901 sensor1_crit: sensor1-crit {
1902 temperature = <120000>;
1903 hysteresis = <1000>;
1904 type = "critical";
1905 };
1906 };
1907 };
1908
1909 sensor_thermal_ca76: sensor2-thermal {
1910 polling-delay-passive = <250>;
1911 polling-delay = <1000>;
1912 thermal-sensors = <&tsc 1>;
1913
1914 trips {
1915 sensor2_crit: sensor2-crit {
1916 temperature = <120000>;
1917 hysteresis = <1000>;
1918 type = "critical";
1919 };
1920 };
1921 };
1922 };
1923
1924 timer {
1925 compatible = "arm,armv8-timer";
1926 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
1927 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
1928 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
1929 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
1930 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
1931 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
1932 "hyp-virt";
1933 };
1934 };
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