1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11 /*
12 * SSI-WM8978
13 *
14 * This command is required when Playback/Capture
15 *
16 * amixer cset name='Left Input Mixer L2 Switch' on
17 * amixer cset name='Right Input Mixer R2 Switch' on
18 * amixer cset name='Headphone Playback Volume' 100
19 * amixer cset name='PCM Volume' 100%
20 * amixer cset name='Input PGA Volume' 25
21 *
22 */
23
24 / {
25 aliases {
26 serial0 = &scif0;
27 i2c0 = &i2c0;
28 i2c1 = &i2c1;
29 };
30
31 chosen {
32 stdout-path = "serial0:115200n8";
33 };
34
35 snd_rzg2l: sound {
36 compatible = "simple-audio-card";
37 simple-audio-card,format = "i2s";
38 simple-audio-card,bitclock-master = <&cpu_dai>;
39 simple-audio-card,frame-master = <&cpu_dai>;
40 simple-audio-card,mclk-fs = <256>;
41
42 simple-audio-card,widgets = "Microphone", "Microphone Jack";
43 simple-audio-card,routing =
44 "L2", "Mic Bias",
45 "R2", "Mic Bias",
46 "Mic Bias", "Microphone Jack";
47
48 cpu_dai: simple-audio-card,cpu {
49 };
50
51 codec_dai: simple-audio-card,codec {
52 clocks = <&versa3 2>;
53 sound-dai = <&wm8978>;
54 };
55 };
56
57 vccq_sdhi1: regulator-vccq-sdhi1 {
58 compatible = "regulator-gpio";
59 regulator-name = "SDHI1 VccQ";
60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <3300000>;
62 gpios-states = <1>;
63 states = <3300000 1>, <1800000 0>;
64 };
65
66 x1: x1-clock {
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <24000000>;
70 };
71 };
72
73 &audio_clk1 {
74 clock-frequency = <11289600>;
75 };
76
77 &audio_clk2 {
78 clock-frequency = <12288000>;
79 };
80
81 &canfd {
82 pinctrl-0 = <&can0_pins &can1_pins>;
83 pinctrl-names = "default";
84 status = "okay";
85
86 channel0 {
87 status = "okay";
88 };
89
90 channel1 {
91 status = "okay";
92 };
93 };
94
95 &ehci0 {
96 dr_mode = "otg";
97 status = "okay";
98 };
99
100 &ehci1 {
101 status = "okay";
102 };
103
104 &hsusb {
105 dr_mode = "otg";
106 status = "okay";
107 };
108
109 &i2c0 {
110 pinctrl-0 = <&i2c0_pins>;
111 pinctrl-names = "default";
112
113 status = "okay";
114 };
115
116 &i2c1 {
117 pinctrl-0 = <&i2c1_pins>;
118 pinctrl-names = "default";
119
120 status = "okay";
121 };
122
123 &ohci0 {
124 dr_mode = "otg";
125 status = "okay";
126 };
127
128 &ohci1 {
129 status = "okay";
130 };
131
132 &phyrst {
133 status = "okay";
134 usb0_vbus_otg: regulator-vbus {
135 regulator-name = "vbus";
136 };
137 };
138
139 &scif0 {
140 pinctrl-0 = <&scif0_pins>;
141 pinctrl-names = "default";
142 status = "okay";
143 };
144
145 &sdhi1 {
146 pinctrl-0 = <&sdhi1_pins>;
147 pinctrl-1 = <&sdhi1_pins_uhs>;
148 pinctrl-names = "default", "state_uhs";
149
150 vmmc-supply = <®_3p3v>;
151 vqmmc-supply = <&vccq_sdhi1>;
152 bus-width = <4>;
153 sd-uhs-sdr50;
154 sd-uhs-sdr104;
155 status = "okay";
156 };
157
158 &spi1 {
159 pinctrl-0 = <&spi1_pins>;
160 pinctrl-names = "default";
161
162 status = "okay";
163 };
164
165 &usb2_phy0 {
166 pinctrl-0 = <&usb0_pins>;
167 pinctrl-names = "default";
168
169 vbus-supply = <&usb0_vbus_otg>;
170 status = "okay";
171 };
172
173 &usb2_phy1 {
174 pinctrl-0 = <&usb1_pins>;
175 pinctrl-names = "default";
176
177 status = "okay";
178 };
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