1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include "rzg2ul-smarc-pinfunction.dtsi"
10 #include "rz-smarc-common.dtsi"
11
12 #if (!SW_ET0_EN_N)
13 &canfd {
14 /delete-property/ pinctrl-0;
15 /delete-property/ pinctrl-names;
16 status = "disabled";
17 };
18 #endif
19
20 &cpu_dai {
21 sound-dai = <&ssi1>;
22 };
23
24 &i2c0 {
25 clock-frequency = <400000>;
26
27 da9062: pmic@58 {
28 compatible = "dlg,da9062";
29 reg = <0x58>;
30 gpio-controller;
31 #gpio-cells = <2>;
32
33 gpio {
34 compatible = "dlg,da9062-gpio";
35 };
36
37 onkey {
38 compatible = "dlg,da9062-onkey";
39 };
40
41 pmic-good-hog {
42 gpio-hog;
43 gpios = <4 GPIO_ACTIVE_HIGH>;
44 output-high;
45 line-name = "PMIC_PGOOD";
46 };
47
48 rtc {
49 compatible = "dlg,da9062-rtc";
50 };
51
52 sd0-pwr-sel-hog {
53 gpio-hog;
54 gpios = <1 GPIO_ACTIVE_HIGH>;
55 input;
56 line-name = "SD0_PWR_SEL";
57 };
58
59 sd1-pwr-sel-hog {
60 gpio-hog;
61 gpios = <2 GPIO_ACTIVE_HIGH>;
62 input;
63 line-name = "SD1_PWR_SEL";
64 };
65
66 sw-et0-en-hog {
67 gpio-hog;
68 gpios = <3 GPIO_ACTIVE_HIGH>;
69 input;
70 line-name = "SW_ET0_EN#";
71 };
72
73 thermal {
74 compatible = "dlg,da9062-thermal";
75 status = "disabled";
76 };
77
78 watchdog {
79 compatible = "dlg,da9062-watchdog";
80 status = "disabled";
81 };
82 };
83
84 versa3: clock-generator@68 {
85 compatible = "renesas,5p35023";
86 reg = <0x68>;
87 #clock-cells = <1>;
88 clocks = <&x1>;
89
90 renesas,settings = [
91 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
92 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
93 80 b0 45 c4 95
94 ];
95
96 assigned-clocks = <&versa3 0>, <&versa3 1>,
97 <&versa3 2>, <&versa3 3>,
98 <&versa3 4>, <&versa3 5>;
99 assigned-clock-rates = <24000000>, <11289600>,
100 <11289600>, <12000000>,
101 <25000000>, <12288000>;
102 };
103 };
104
105 &i2c1 {
106 wm8978: codec@1a {
107 compatible = "wlf,wm8978";
108 #sound-dai-cells = <0>;
109 reg = <0x1a>;
110 };
111 };
112
113 #if PMOD_MTU3
114 &mtu3 {
115 pinctrl-0 = <&mtu3_pins>;
116 pinctrl-names = "default";
117
118 status = "okay";
119 };
120
121 &spi1 {
122 status = "disabled";
123 };
124 #endif
125
126 #if (SW_ET0_EN_N)
127 &ssi1 {
128 pinctrl-0 = <&ssi1_pins>;
129 pinctrl-names = "default";
130
131 status = "okay";
132 };
133 #else
134 &snd_rzg2l {
135 status = "disabled";
136 };
137
138 &spi1 {
139 /delete-property/ pinctrl-0;
140 /delete-property/ pinctrl-names;
141 status = "disabled";
142 };
143
144 &ssi1 {
145 /delete-property/ pinctrl-0;
146 /delete-property/ pinctrl-names;
147 status = "disabled";
148 };
149 #endif
150
151 &vccq_sdhi1 {
152 gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>;
153 };
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