1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the RZ SMARC Carrier-II Board.
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
11
12 / {
13 aliases {
14 serial0 = &scif0;
15 mmc1 = &sdhi1;
16 };
17
18 keys {
19 compatible = "gpio-keys";
20
21 key-1 {
22 interrupts = <RZG2L_GPIO(18, 0) IRQ_TYPE_EDGE_FALLING>;
23 interrupt-parent = <&pinctrl>;
24 linux,code = <KEY_1>;
25 label = "USER_SW1";
26 wakeup-source;
27 debounce-interval = <20>;
28 };
29
30 key-2 {
31 interrupts = <RZG2L_GPIO(0, 1) IRQ_TYPE_EDGE_FALLING>;
32 interrupt-parent = <&pinctrl>;
33 linux,code = <KEY_2>;
34 label = "USER_SW2";
35 wakeup-source;
36 debounce-interval = <20>;
37 };
38
39 key-3 {
40 interrupts = <RZG2L_GPIO(0, 3) IRQ_TYPE_EDGE_FALLING>;
41 interrupt-parent = <&pinctrl>;
42 linux,code = <KEY_3>;
43 label = "USER_SW3";
44 wakeup-source;
45 debounce-interval = <20>;
46 };
47 };
48
49 vcc_sdhi1: regulator-vcc-sdhi1 {
50 compatible = "regulator-fixed";
51 regulator-name = "SDHI1 Vcc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpios = <&pinctrl RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
57
58 vccq_sdhi1: regulator-vccq-sdhi1 {
59 compatible = "regulator-gpio";
60 regulator-name = "SDHI1 VccQ";
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <3300000>;
63 gpios = <&pinctrl RZG2L_GPIO(4, 2) GPIO_ACTIVE_HIGH>;
64 gpios-states = <1>;
65 states = <3300000 1>, <1800000 0>;
66 };
67 };
68
69 &pinctrl {
70 key-1-gpio-hog {
71 gpio-hog;
72 gpios = <RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW>;
73 input;
74 line-name = "key-1-gpio-irq";
75 };
76
77 key-2-gpio-hog {
78 gpio-hog;
79 gpios = <RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
80 input;
81 line-name = "key-2-gpio-irq";
82 };
83
84 key-3-gpio-hog {
85 gpio-hog;
86 gpios = <RZG2L_GPIO(0, 3) GPIO_ACTIVE_LOW>;
87 input;
88 line-name = "key-3-gpio-irq";
89 };
90
91 scif0_pins: scif0 {
92 pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */
93 <RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */
94 };
95
96 sdhi1_pins: sd1 {
97 data {
98 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
99 power-source = <3300>;
100 };
101
102 ctrl {
103 pins = "SD1_CLK", "SD1_CMD";
104 power-source = <3300>;
105 };
106
107 cd {
108 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
109 };
110 };
111
112 sdhi1_pins_uhs: sd1-uhs {
113 data {
114 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
115 power-source = <1800>;
116 };
117
118 ctrl {
119 pins = "SD1_CLK", "SD1_CMD";
120 power-source = <1800>;
121 };
122
123 cd {
124 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
125 };
126 };
127 };
128
129 &scif0 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&scif0_pins>;
132 status = "okay";
133 };
134
135 &sdhi1 {
136 pinctrl-0 = <&sdhi1_pins>;
137 pinctrl-1 = <&sdhi1_pins_uhs>;
138 pinctrl-names = "default", "state_uhs";
139 vmmc-supply = <&vcc_sdhi1>;
140 vqmmc-supply = <&vccq_sdhi1>;
141 bus-width = <4>;
142 sd-uhs-sdr50;
143 sd-uhs-sdr104;
144 max-frequency = <125000000>;
145 status = "okay";
146 };
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