1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for common parts of Salvator-X board variants
4 *
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
6 */
7
8 /*
9 * SSI-AK4613
10 *
11 * This command is required when Playback/Capture
12 *
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
15 *
16 * You can use Mute
17 *
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
20 *
21 * You can use Volume Ramp
22 *
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
26 * aplay xxx.wav &
27 * amixer set "DVC Out" 80% // Volume Down
28 * amixer set "DVC Out" 100% // Volume Up
29 */
30
31 #include <dt-bindings/gpio/gpio.h>
32 #include <dt-bindings/input/input.h>
33
34 / {
35 aliases {
36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
38 i2c2 = &i2c2;
39 i2c3 = &i2c3;
40 i2c4 = &i2c4;
41 i2c5 = &i2c5;
42 i2c6 = &i2c6;
43 i2c7 = &i2c_dvfs;
44 serial0 = &scif2;
45 serial1 = &hscif1;
46 ethernet0 = &avb;
47 mmc0 = &sdhi2;
48 mmc1 = &sdhi0;
49 mmc2 = &sdhi3;
50 };
51
52 chosen {
53 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
54 stdout-path = "serial0:115200n8";
55 };
56
57 audio_clkout: audio-clkout {
58 /*
59 * This is same as <&rcar_sound 0>
60 * but needed to avoid cs2000/rcar_sound probe dead-lock
61 */
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <12288000>;
65 };
66
67 backlight: backlight {
68 compatible = "pwm-backlight";
69 pwms = <&pwm1 0 50000>;
70
71 brightness-levels = <256 128 64 16 8 4 0>;
72 default-brightness-level = <6>;
73
74 power-supply = <®_12v>;
75 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
76 };
77
78 cvbs-in {
79 compatible = "composite-video-connector";
80 label = "CVBS IN";
81
82 port {
83 cvbs_con: endpoint {
84 remote-endpoint = <&adv7482_ain7>;
85 };
86 };
87 };
88
89 hdmi-in {
90 compatible = "hdmi-connector";
91 label = "HDMI IN";
92 type = "a";
93
94 port {
95 hdmi_in_con: endpoint {
96 remote-endpoint = <&adv7482_hdmi>;
97 };
98 };
99 };
100
101 hdmi0-out {
102 compatible = "hdmi-connector";
103 label = "HDMI0 OUT";
104 type = "a";
105
106 port {
107 hdmi0_con: endpoint {
108 remote-endpoint = <&rcar_dw_hdmi0_out>;
109 };
110 };
111 };
112
113 hdmi1-out {
114 compatible = "hdmi-connector";
115 label = "HDMI1 OUT";
116 type = "a";
117
118 port {
119 hdmi1_con: endpoint {
120 };
121 };
122 };
123
124 keys {
125 compatible = "gpio-keys";
126
127 pinctrl-0 = <&keys_pins>;
128 pinctrl-names = "default";
129
130 key-1 {
131 gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
132 linux,code = <KEY_1>;
133 label = "SW4-1";
134 wakeup-source;
135 debounce-interval = <20>;
136 };
137 key-2 {
138 gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
139 linux,code = <KEY_2>;
140 label = "SW4-2";
141 wakeup-source;
142 debounce-interval = <20>;
143 };
144 key-3 {
145 gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
146 linux,code = <KEY_3>;
147 label = "SW4-3";
148 wakeup-source;
149 debounce-interval = <20>;
150 };
151 key-4 {
152 gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
153 linux,code = <KEY_4>;
154 label = "SW4-4";
155 wakeup-source;
156 debounce-interval = <20>;
157 };
158 key-a {
159 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
160 linux,code = <KEY_A>;
161 label = "TSW0";
162 wakeup-source;
163 debounce-interval = <20>;
164 };
165 key-b {
166 gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
167 linux,code = <KEY_B>;
168 label = "TSW1";
169 wakeup-source;
170 debounce-interval = <20>;
171 };
172 key-c {
173 gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
174 linux,code = <KEY_C>;
175 label = "TSW2";
176 wakeup-source;
177 debounce-interval = <20>;
178 };
179 };
180
181 reg_1p8v: regulator-1p8v {
182 compatible = "regulator-fixed";
183 regulator-name = "fixed-1.8V";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1800000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 reg_3p3v: regulator-3p3v {
191 compatible = "regulator-fixed";
192 regulator-name = "fixed-3.3V";
193 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <3300000>;
195 regulator-boot-on;
196 regulator-always-on;
197 };
198
199 reg_12v: regulator-12v {
200 compatible = "regulator-fixed";
201 regulator-name = "fixed-12V";
202 regulator-min-microvolt = <12000000>;
203 regulator-max-microvolt = <12000000>;
204 regulator-boot-on;
205 regulator-always-on;
206 };
207
208 sound_card: sound {
209 compatible = "audio-graph-card";
210
211 label = "rcar-sound";
212
213 dais = <&rsnd_port0 /* ak4613 */
214 &rsnd_port1 /* HDMI0 */
215 #ifdef SOC_HAS_HDMI1
216 &rsnd_port2 /* HDMI1 */
217 #endif
218 >;
219 };
220
221 vbus0_usb2: regulator-vbus0-usb2 {
222 compatible = "regulator-fixed";
223
224 regulator-name = "USB20_VBUS0";
225 regulator-min-microvolt = <5000000>;
226 regulator-max-microvolt = <5000000>;
227
228 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
229 enable-active-high;
230 };
231
232 vcc_sdhi0: regulator-vcc-sdhi0 {
233 compatible = "regulator-fixed";
234
235 regulator-name = "SDHI0 Vcc";
236 regulator-min-microvolt = <3300000>;
237 regulator-max-microvolt = <3300000>;
238
239 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
240 enable-active-high;
241 };
242
243 vccq_sdhi0: regulator-vccq-sdhi0 {
244 compatible = "regulator-gpio";
245
246 regulator-name = "SDHI0 VccQ";
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <3300000>;
249
250 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
251 gpios-states = <1>;
252 states = <3300000 1>, <1800000 0>;
253 };
254
255 vcc_sdhi3: regulator-vcc-sdhi3 {
256 compatible = "regulator-fixed";
257
258 regulator-name = "SDHI3 Vcc";
259 regulator-min-microvolt = <3300000>;
260 regulator-max-microvolt = <3300000>;
261
262 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
263 enable-active-high;
264 };
265
266 vccq_sdhi3: regulator-vccq-sdhi3 {
267 compatible = "regulator-gpio";
268
269 regulator-name = "SDHI3 VccQ";
270 regulator-min-microvolt = <1800000>;
271 regulator-max-microvolt = <3300000>;
272
273 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
274 gpios-states = <1>;
275 states = <3300000 1>, <1800000 0>;
276 };
277
278 vga {
279 compatible = "vga-connector";
280
281 port {
282 vga_in: endpoint {
283 remote-endpoint = <&adv7123_out>;
284 };
285 };
286 };
287
288 vga-encoder {
289 compatible = "adi,adv7123";
290
291 ports {
292 #address-cells = <1>;
293 #size-cells = <0>;
294
295 port@0 {
296 reg = <0>;
297 adv7123_in: endpoint {
298 remote-endpoint = <&du_out_rgb>;
299 };
300 };
301 port@1 {
302 reg = <1>;
303 adv7123_out: endpoint {
304 remote-endpoint = <&vga_in>;
305 };
306 };
307 };
308 };
309
310 x12_clk: x12 {
311 compatible = "fixed-clock";
312 #clock-cells = <0>;
313 clock-frequency = <24576000>;
314 };
315
316 /* External DU dot clocks */
317 x21_clk: x21-clock {
318 compatible = "fixed-clock";
319 #clock-cells = <0>;
320 clock-frequency = <33000000>;
321 };
322
323 x22_clk: x22-clock {
324 compatible = "fixed-clock";
325 #clock-cells = <0>;
326 clock-frequency = <33000000>;
327 };
328
329 x23_clk: x23-clock {
330 compatible = "fixed-clock";
331 #clock-cells = <0>;
332 clock-frequency = <25000000>;
333 };
334 };
335
336 &a57_0 {
337 cpu-supply = <&dvfs>;
338 };
339
340 &audio_clk_a {
341 clock-frequency = <22579200>;
342 };
343
344 &avb {
345 pinctrl-0 = <&avb_pins>;
346 pinctrl-names = "default";
347 phy-handle = <&phy0>;
348 tx-internal-delay-ps = <2000>;
349 status = "okay";
350
351 phy0: ethernet-phy@0 {
352 compatible = "ethernet-phy-id0022.1622",
353 "ethernet-phy-ieee802.3-c22";
354 rxc-skew-ps = <1500>;
355 reg = <0>;
356 interrupt-parent = <&gpio2>;
357 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
358 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
359 };
360 };
361
362 &csi20 {
363 status = "okay";
364
365 ports {
366 port@0 {
367 csi20_in: endpoint {
368 clock-lanes = <0>;
369 data-lanes = <1>;
370 remote-endpoint = <&adv7482_txb>;
371 };
372 };
373 };
374 };
375
376 &csi40 {
377 status = "okay";
378
379 ports {
380 port@0 {
381 csi40_in: endpoint {
382 clock-lanes = <0>;
383 data-lanes = <1 2 3 4>;
384 remote-endpoint = <&adv7482_txa>;
385 };
386 };
387 };
388 };
389
390 &du {
391 pinctrl-0 = <&du_pins>;
392 pinctrl-names = "default";
393 status = "okay";
394
395 ports {
396 port@0 {
397 du_out_rgb: endpoint {
398 remote-endpoint = <&adv7123_in>;
399 };
400 };
401 };
402 };
403
404 &ehci0 {
405 dr_mode = "otg";
406 status = "okay";
407 };
408
409 &ehci1 {
410 status = "okay";
411 };
412
413 &extalr_clk {
414 clock-frequency = <32768>;
415 };
416
417 &hdmi0 {
418 status = "okay";
419
420 ports {
421 port@1 {
422 reg = <1>;
423 rcar_dw_hdmi0_out: endpoint {
424 remote-endpoint = <&hdmi0_con>;
425 };
426 };
427 port@2 {
428 reg = <2>;
429 dw_hdmi0_snd_in: endpoint {
430 remote-endpoint = <&rsnd_endpoint1>;
431 };
432 };
433 };
434 };
435
436 #ifdef SOC_HAS_HDMI1
437 &hdmi1 {
438 status = "okay";
439
440 ports {
441 port@1 {
442 reg = <1>;
443 rcar_dw_hdmi1_out: endpoint {
444 remote-endpoint = <&hdmi1_con>;
445 };
446 };
447 port@2 {
448 reg = <2>;
449 dw_hdmi1_snd_in: endpoint {
450 remote-endpoint = <&rsnd_endpoint2>;
451 };
452 };
453 };
454 };
455
456 &hdmi1_con {
457 remote-endpoint = <&rcar_dw_hdmi1_out>;
458 };
459 #endif /* SOC_HAS_HDMI1 */
460
461 &hscif1 {
462 pinctrl-0 = <&hscif1_pins>;
463 pinctrl-names = "default";
464
465 uart-has-rtscts;
466 /* Please only enable hscif1 or scif1 */
467 status = "okay";
468 };
469
470 &hsusb {
471 dr_mode = "otg";
472 status = "okay";
473 };
474
475 &i2c2 {
476 pinctrl-0 = <&i2c2_pins>;
477 pinctrl-names = "default";
478
479 status = "okay";
480
481 clock-frequency = <100000>;
482
483 ak4613: codec@10 {
484 compatible = "asahi-kasei,ak4613";
485 #sound-dai-cells = <0>;
486 reg = <0x10>;
487 clocks = <&rcar_sound 3>;
488
489 asahi-kasei,in1-single-end;
490 asahi-kasei,in2-single-end;
491 asahi-kasei,out1-single-end;
492 asahi-kasei,out2-single-end;
493 asahi-kasei,out3-single-end;
494 asahi-kasei,out4-single-end;
495 asahi-kasei,out5-single-end;
496 asahi-kasei,out6-single-end;
497
498 port {
499 ak4613_endpoint: endpoint {
500 remote-endpoint = <&rsnd_endpoint0>;
501 };
502 };
503 };
504
505 cs2000: clk_multiplier@4f {
506 #clock-cells = <0>;
507 compatible = "cirrus,cs2000-cp";
508 reg = <0x4f>;
509 clocks = <&audio_clkout>, <&x12_clk>;
510 clock-names = "clk_in", "ref_clk";
511
512 assigned-clocks = <&cs2000>;
513 assigned-clock-rates = <24576000>; /* 1/1 divide */
514 };
515 };
516
517 &i2c4 {
518 status = "okay";
519
520 pca9654: gpio@20 {
521 compatible = "onnn,pca9654";
522 reg = <0x20>;
523 gpio-controller;
524 #gpio-cells = <2>;
525 };
526
527 video-receiver@70 {
528 compatible = "adi,adv7482";
529 reg = <0x70 0x71 0x72 0x73 0x74 0x75
530 0x60 0x61 0x62 0x63 0x64 0x65>;
531 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
532 "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
533
534 interrupt-parent = <&gpio6>;
535 interrupt-names = "intrq1", "intrq2";
536 interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
537 <31 IRQ_TYPE_LEVEL_LOW>;
538
539 ports {
540 #address-cells = <1>;
541 #size-cells = <0>;
542
543 port@7 {
544 reg = <7>;
545
546 adv7482_ain7: endpoint {
547 remote-endpoint = <&cvbs_con>;
548 };
549 };
550
551 port@8 {
552 reg = <8>;
553
554 adv7482_hdmi: endpoint {
555 remote-endpoint = <&hdmi_in_con>;
556 };
557 };
558
559 port@a {
560 reg = <10>;
561
562 adv7482_txa: endpoint {
563 clock-lanes = <0>;
564 data-lanes = <1 2 3 4>;
565 remote-endpoint = <&csi40_in>;
566 };
567 };
568
569 port@b {
570 reg = <11>;
571
572 adv7482_txb: endpoint {
573 clock-lanes = <0>;
574 data-lanes = <1>;
575 remote-endpoint = <&csi20_in>;
576 };
577 };
578 };
579 };
580
581 csa_vdd: adc@7c {
582 compatible = "maxim,max9611";
583 reg = <0x7c>;
584
585 shunt-resistor-micro-ohms = <5000>;
586 };
587
588 csa_dvfs: adc@7f {
589 compatible = "maxim,max9611";
590 reg = <0x7f>;
591
592 shunt-resistor-micro-ohms = <5000>;
593 };
594 };
595
596 &i2c_dvfs {
597 status = "okay";
598
599 clock-frequency = <400000>;
600
601 pmic: pmic@30 {
602 pinctrl-0 = <&irq0_pins>;
603 pinctrl-names = "default";
604
605 compatible = "rohm,bd9571mwv";
606 reg = <0x30>;
607 interrupt-parent = <&intc_ex>;
608 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
609 interrupt-controller;
610 #interrupt-cells = <2>;
611 gpio-controller;
612 #gpio-cells = <2>;
613 rohm,ddr-backup-power = <0xf>;
614 rohm,rstbmode-level;
615
616 regulators {
617 dvfs: dvfs {
618 regulator-name = "dvfs";
619 regulator-min-microvolt = <750000>;
620 regulator-max-microvolt = <1030000>;
621 regulator-boot-on;
622 regulator-always-on;
623 };
624 };
625 };
626
627 eeprom@50 {
628 compatible = "rohm,br24t01", "atmel,24c01";
629 reg = <0x50>;
630 pagesize = <8>;
631 };
632 };
633
634 &ohci0 {
635 dr_mode = "otg";
636 status = "okay";
637 };
638
639 &ohci1 {
640 status = "okay";
641 };
642
643 &pcie_bus_clk {
644 clock-frequency = <100000000>;
645 };
646
647 &pciec0 {
648 status = "okay";
649 };
650
651 &pciec1 {
652 status = "okay";
653 };
654
655 &pfc {
656 pinctrl-0 = <&scif_clk_pins>;
657 pinctrl-names = "default";
658
659 avb_pins: avb {
660 mux {
661 groups = "avb_link", "avb_mdio", "avb_mii";
662 function = "avb";
663 };
664
665 pins_mdio {
666 groups = "avb_mdio";
667 drive-strength = <24>;
668 };
669
670 pins_mii_tx {
671 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
672 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
673 drive-strength = <12>;
674 };
675 };
676
677 du_pins: du {
678 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
679 function = "du";
680 };
681
682 hscif1_pins: hscif1 {
683 groups = "hscif1_data_a", "hscif1_ctrl_a";
684 function = "hscif1";
685 };
686
687 i2c2_pins: i2c2 {
688 groups = "i2c2_a";
689 function = "i2c2";
690 };
691
692 irq0_pins: irq0 {
693 groups = "intc_ex_irq0";
694 function = "intc_ex";
695 };
696
697 keys_pins: keys {
698 pins = "GP_5_17", "GP_5_20", "GP_5_22";
699 bias-pull-up;
700 };
701
702 pwm1_pins: pwm1 {
703 groups = "pwm1_a";
704 function = "pwm1";
705 };
706
707 scif1_pins: scif1 {
708 groups = "scif1_data_a", "scif1_ctrl";
709 function = "scif1";
710 };
711
712 scif2_pins: scif2 {
713 groups = "scif2_data_a";
714 function = "scif2";
715 };
716
717 scif_clk_pins: scif_clk {
718 groups = "scif_clk_a";
719 function = "scif_clk";
720 };
721
722 sdhi0_pins: sd0 {
723 groups = "sdhi0_data4", "sdhi0_ctrl";
724 function = "sdhi0";
725 power-source = <3300>;
726 };
727
728 sdhi0_pins_uhs: sd0_uhs {
729 groups = "sdhi0_data4", "sdhi0_ctrl";
730 function = "sdhi0";
731 power-source = <1800>;
732 };
733
734 sdhi2_pins: sd2 {
735 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
736 function = "sdhi2";
737 power-source = <1800>;
738 };
739
740 sdhi3_pins: sd3 {
741 groups = "sdhi3_data4", "sdhi3_ctrl";
742 function = "sdhi3";
743 power-source = <3300>;
744 };
745
746 sdhi3_pins_uhs: sd3_uhs {
747 groups = "sdhi3_data4", "sdhi3_ctrl";
748 function = "sdhi3";
749 power-source = <1800>;
750 };
751
752 sound_pins: sound {
753 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
754 function = "ssi";
755 };
756
757 sound_clk_pins: sound_clk {
758 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
759 "audio_clkout_a", "audio_clkout3_a";
760 function = "audio_clk";
761 };
762
763 usb0_pins: usb0 {
764 groups = "usb0";
765 function = "usb0";
766 };
767
768 usb1_pins: usb1 {
769 mux {
770 groups = "usb1";
771 function = "usb1";
772 };
773
774 ovc {
775 pins = "GP_6_27";
776 bias-pull-up;
777 };
778
779 pwen {
780 pins = "GP_6_26";
781 bias-pull-down;
782 };
783 };
784
785 usb30_pins: usb30 {
786 groups = "usb30";
787 function = "usb30";
788 };
789 };
790
791 &pwm1 {
792 pinctrl-0 = <&pwm1_pins>;
793 pinctrl-names = "default";
794
795 status = "okay";
796 };
797
798 &rcar_sound {
799 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
800 pinctrl-names = "default";
801
802 /* audio_clkout0/1/2/3 */
803 #clock-cells = <1>;
804 clock-frequency = <12288000 11289600>;
805
806 status = "okay";
807
808 /* update <audio_clk_b> to <cs2000> */
809 clocks = <&cpg CPG_MOD 1005>,
810 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
811 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
812 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
813 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
814 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
815 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
816 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
817 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
818 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
819 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
820 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
821 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
822 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
823 <&audio_clk_a>, <&cs2000>,
824 <&audio_clk_c>,
825 <&cpg CPG_MOD 922>;
826
827 ports {
828 #address-cells = <1>;
829 #size-cells = <0>;
830 rsnd_port0: port@0 {
831 reg = <0>;
832 rsnd_endpoint0: endpoint {
833 remote-endpoint = <&ak4613_endpoint>;
834
835 dai-format = "left_j";
836 bitclock-master = <&rsnd_endpoint0>;
837 frame-master = <&rsnd_endpoint0>;
838
839 playback = <&ssi0>, <&src0>, <&dvc0>;
840 capture = <&ssi1>, <&src1>, <&dvc1>;
841 };
842 };
843
844 rsnd_port1: port@1 {
845 reg = <1>;
846 rsnd_endpoint1: endpoint {
847 remote-endpoint = <&dw_hdmi0_snd_in>;
848
849 dai-format = "i2s";
850 bitclock-master = <&rsnd_endpoint1>;
851 frame-master = <&rsnd_endpoint1>;
852
853 playback = <&ssi2>;
854 };
855 };
856
857 #ifdef SOC_HAS_HDMI1
858 rsnd_port2: port@2 {
859 reg = <2>;
860 rsnd_endpoint2: endpoint {
861 remote-endpoint = <&dw_hdmi1_snd_in>;
862
863 dai-format = "i2s";
864 bitclock-master = <&rsnd_endpoint2>;
865 frame-master = <&rsnd_endpoint2>;
866
867 playback = <&ssi3>;
868 };
869 };
870 #endif /* SOC_HAS_HDMI1 */
871 };
872 };
873
874 &rpc {
875 /* Left disabled. To be enabled by firmware when unlocked. */
876
877 flash@0 {
878 compatible = "cypress,hyperflash", "cfi-flash";
879 reg = <0>;
880
881 partitions {
882 compatible = "fixed-partitions";
883 #address-cells = <1>;
884 #size-cells = <1>;
885
886 bootparam@0 {
887 reg = <0x00000000 0x040000>;
888 read-only;
889 };
890 bl2@40000 {
891 reg = <0x00040000 0x140000>;
892 read-only;
893 };
894 cert_header_sa6@180000 {
895 reg = <0x00180000 0x040000>;
896 read-only;
897 };
898 bl31@1c0000 {
899 reg = <0x001c0000 0x040000>;
900 read-only;
901 };
902 tee@200000 {
903 reg = <0x00200000 0x440000>;
904 read-only;
905 };
906 uboot@640000 {
907 reg = <0x00640000 0x100000>;
908 read-only;
909 };
910 dtb@740000 {
911 reg = <0x00740000 0x080000>;
912 };
913 kernel@7c0000 {
914 reg = <0x007c0000 0x1400000>;
915 };
916 user@1bc0000 {
917 reg = <0x01bc0000 0x2440000>;
918 };
919 };
920 };
921 };
922
923 &rwdt {
924 timeout-sec = <60>;
925 status = "okay";
926 };
927
928 #ifdef SOC_HAS_SATA
929 &sata {
930 status = "okay";
931 };
932 #endif /* SOC_HAS_SATA */
933
934 &scif1 {
935 pinctrl-0 = <&scif1_pins>;
936 pinctrl-names = "default";
937
938 uart-has-rtscts;
939 /* Please only enable hscif1 or scif1 */
940 /* status = "okay"; */
941 };
942
943 &scif2 {
944 pinctrl-0 = <&scif2_pins>;
945 pinctrl-names = "default";
946
947 status = "okay";
948 };
949
950 &scif_clk {
951 clock-frequency = <14745600>;
952 };
953
954 &sdhi0 {
955 pinctrl-0 = <&sdhi0_pins>;
956 pinctrl-1 = <&sdhi0_pins_uhs>;
957 pinctrl-names = "default", "state_uhs";
958
959 vmmc-supply = <&vcc_sdhi0>;
960 vqmmc-supply = <&vccq_sdhi0>;
961 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
962 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
963 bus-width = <4>;
964 sd-uhs-sdr50;
965 sd-uhs-sdr104;
966 status = "okay";
967 };
968
969 &sdhi2 {
970 /* used for on-board 8bit eMMC */
971 pinctrl-0 = <&sdhi2_pins>;
972 pinctrl-1 = <&sdhi2_pins>;
973 pinctrl-names = "default", "state_uhs";
974
975 vmmc-supply = <®_3p3v>;
976 vqmmc-supply = <®_1p8v>;
977 bus-width = <8>;
978 mmc-hs200-1_8v;
979 mmc-hs400-1_8v;
980 no-sd;
981 no-sdio;
982 non-removable;
983 fixed-emmc-driver-type = <1>;
984 full-pwr-cycle-in-suspend;
985 status = "okay";
986 };
987
988 &sdhi3 {
989 pinctrl-0 = <&sdhi3_pins>;
990 pinctrl-1 = <&sdhi3_pins_uhs>;
991 pinctrl-names = "default", "state_uhs";
992
993 vmmc-supply = <&vcc_sdhi3>;
994 vqmmc-supply = <&vccq_sdhi3>;
995 cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
996 wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
997 bus-width = <4>;
998 sd-uhs-sdr50;
999 sd-uhs-sdr104;
1000 status = "okay";
1001 };
1002
1003 &ssi1 {
1004 shared-pin;
1005 };
1006
1007 &usb_extal_clk {
1008 clock-frequency = <50000000>;
1009 };
1010
1011 &usb2_phy0 {
1012 pinctrl-0 = <&usb0_pins>;
1013 pinctrl-names = "default";
1014
1015 vbus-supply = <&vbus0_usb2>;
1016 status = "okay";
1017 };
1018
1019 &usb2_phy1 {
1020 pinctrl-0 = <&usb1_pins>;
1021 pinctrl-names = "default";
1022
1023 status = "okay";
1024 };
1025
1026 &usb3_peri0 {
1027 phys = <&usb3_phy0>;
1028 phy-names = "usb";
1029
1030 companion = <&xhci0>;
1031
1032 status = "okay";
1033 };
1034
1035 &usb3_phy0 {
1036 status = "okay";
1037 };
1038
1039 &usb3s0_clk {
1040 clock-frequency = <100000000>;
1041 };
1042
1043 &vin0 {
1044 status = "okay";
1045 };
1046
1047 &vin1 {
1048 status = "okay";
1049 };
1050
1051 &vin2 {
1052 status = "okay";
1053 };
1054
1055 &vin3 {
1056 status = "okay";
1057 };
1058
1059 &vin4 {
1060 status = "okay";
1061 };
1062
1063 &vin5 {
1064 status = "okay";
1065 };
1066
1067 &vin6 {
1068 status = "okay";
1069 };
1070
1071 &vin7 {
1072 status = "okay";
1073 };
1074
1075 &xhci0 {
1076 pinctrl-0 = <&usb30_pins>;
1077 pinctrl-names = "default";
1078
1079 status = "okay";
1080 };
1081
1082 #ifdef SOC_HAS_USB2_CH2
1083 &ehci2 {
1084 status = "okay";
1085 };
1086
1087 &ohci2 {
1088 status = "okay";
1089 };
1090
1091 &pfc {
1092 usb2_pins: usb2 {
1093 groups = "usb2";
1094 function = "usb2";
1095 };
1096 };
1097
1098 &usb2_phy2 {
1099 pinctrl-0 = <&usb2_pins>;
1100 pinctrl-names = "default";
1101
1102 status = "okay";
1103 };
1104 #endif /* SOC_HAS_USB2_CH2 */
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.