1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the common parts shared by the White Hawk CPU and
4 * White Hawk Single boards
5 *
6 * Copyright (C) 2022 Renesas Electronics Corp.
7 */
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12
13 / {
14 aliases {
15 ethernet0 = &avb0;
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 serial0 = &hscif0;
23 };
24
25 chosen {
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
27 stdout-path = "serial0:921600n8";
28 };
29
30 sn65dsi86_refclk: clk-x6 {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <38400000>;
34 };
35
36 keys {
37 compatible = "gpio-keys";
38
39 pinctrl-0 = <&keys_pins>;
40 pinctrl-names = "default";
41
42 key-1 {
43 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_1>;
45 label = "SW47";
46 wakeup-source;
47 debounce-interval = <20>;
48 };
49
50 key-2 {
51 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
52 linux,code = <KEY_2>;
53 label = "SW48";
54 wakeup-source;
55 debounce-interval = <20>;
56 };
57
58 key-3 {
59 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
60 linux,code = <KEY_3>;
61 label = "SW49";
62 wakeup-source;
63 debounce-interval = <20>;
64 };
65 };
66
67 leds {
68 compatible = "gpio-leds";
69
70 led-1 {
71 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
72 color = <LED_COLOR_ID_GREEN>;
73 function = LED_FUNCTION_INDICATOR;
74 function-enumerator = <1>;
75 };
76
77 led-2 {
78 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
79 color = <LED_COLOR_ID_GREEN>;
80 function = LED_FUNCTION_INDICATOR;
81 function-enumerator = <2>;
82 };
83
84 led-3 {
85 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_GREEN>;
87 function = LED_FUNCTION_INDICATOR;
88 function-enumerator = <3>;
89 };
90 };
91
92 memory@48000000 {
93 device_type = "memory";
94 /* first 128MB is reserved for secure area. */
95 reg = <0x0 0x48000000 0x0 0x78000000>;
96 };
97
98 memory@480000000 {
99 device_type = "memory";
100 reg = <0x4 0x80000000 0x0 0x80000000>;
101 };
102
103 memory@600000000 {
104 device_type = "memory";
105 reg = <0x6 0x00000000 0x1 0x00000000>;
106 };
107
108 mini-dp-con {
109 compatible = "dp-connector";
110 label = "CN5";
111 type = "mini";
112
113 port {
114 mini_dp_con_in: endpoint {
115 remote-endpoint = <&sn65dsi86_out>;
116 };
117 };
118 };
119
120 reg_1p2v: regulator-1p2v {
121 compatible = "regulator-fixed";
122 regulator-name = "fixed-1.2V";
123 regulator-min-microvolt = <1200000>;
124 regulator-max-microvolt = <1200000>;
125 regulator-boot-on;
126 regulator-always-on;
127 };
128
129 reg_1p8v: regulator-1p8v {
130 compatible = "regulator-fixed";
131 regulator-name = "fixed-1.8V";
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <1800000>;
134 regulator-boot-on;
135 regulator-always-on;
136 };
137
138 reg_3p3v: regulator-3p3v {
139 compatible = "regulator-fixed";
140 regulator-name = "fixed-3.3V";
141 regulator-min-microvolt = <3300000>;
142 regulator-max-microvolt = <3300000>;
143 regulator-boot-on;
144 regulator-always-on;
145 };
146 };
147
148 &avb0 {
149 pinctrl-0 = <&avb0_pins>;
150 pinctrl-names = "default";
151 phy-handle = <&avb0_phy>;
152 tx-internal-delay-ps = <2000>;
153 status = "okay";
154
155 mdio {
156 #address-cells = <1>;
157 #size-cells = <0>;
158
159 avb0_phy: ethernet-phy@0 {
160 compatible = "ethernet-phy-id0022.1622",
161 "ethernet-phy-ieee802.3-c22";
162 rxc-skew-ps = <1500>;
163 reg = <0>;
164 interrupt-parent = <&gpio7>;
165 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
166 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
167 };
168 };
169 };
170
171 &dsi0 {
172 status = "okay";
173
174 ports {
175 port@1 {
176 dsi0_out: endpoint {
177 remote-endpoint = <&sn65dsi86_in>;
178 data-lanes = <1 2 3 4>;
179 };
180 };
181 };
182 };
183
184 &du {
185 status = "okay";
186 };
187
188 &extal_clk {
189 clock-frequency = <16666666>;
190 };
191
192 &extalr_clk {
193 clock-frequency = <32768>;
194 };
195
196 &hscif0 {
197 pinctrl-0 = <&hscif0_pins>;
198 pinctrl-names = "default";
199
200 status = "okay";
201 };
202
203 &i2c0 {
204 pinctrl-0 = <&i2c0_pins>;
205 pinctrl-names = "default";
206
207 status = "okay";
208 clock-frequency = <400000>;
209
210 io_expander_a: gpio@20 {
211 compatible = "onnn,pca9654";
212 reg = <0x20>;
213 interrupt-parent = <&gpio0>;
214 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
215 gpio-controller;
216 #gpio-cells = <2>;
217 interrupt-controller;
218 #interrupt-cells = <2>;
219 };
220
221 eeprom@50 {
222 compatible = "rohm,br24g01", "atmel,24c01";
223 label = "cpu-board";
224 reg = <0x50>;
225 pagesize = <8>;
226 };
227 };
228
229 &i2c1 {
230 pinctrl-0 = <&i2c1_pins>;
231 pinctrl-names = "default";
232
233 status = "okay";
234 clock-frequency = <400000>;
235
236 bridge@2c {
237 compatible = "ti,sn65dsi86";
238 reg = <0x2c>;
239
240 clocks = <&sn65dsi86_refclk>;
241 clock-names = "refclk";
242
243 interrupt-parent = <&intc_ex>;
244 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
245
246 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
247
248 vccio-supply = <®_1p8v>;
249 vpll-supply = <®_1p8v>;
250 vcca-supply = <®_1p2v>;
251 vcc-supply = <®_1p2v>;
252
253 ports {
254 #address-cells = <1>;
255 #size-cells = <0>;
256
257 port@0 {
258 reg = <0>;
259 sn65dsi86_in: endpoint {
260 remote-endpoint = <&dsi0_out>;
261 };
262 };
263
264 port@1 {
265 reg = <1>;
266 sn65dsi86_out: endpoint {
267 remote-endpoint = <&mini_dp_con_in>;
268 };
269 };
270 };
271 };
272 };
273
274 &mmc0 {
275 pinctrl-0 = <&mmc_pins>;
276 pinctrl-1 = <&mmc_pins>;
277 pinctrl-names = "default", "state_uhs";
278
279 vmmc-supply = <®_3p3v>;
280 vqmmc-supply = <®_1p8v>;
281 mmc-hs200-1_8v;
282 mmc-hs400-1_8v;
283 bus-width = <8>;
284 no-sd;
285 no-sdio;
286 non-removable;
287 full-pwr-cycle-in-suspend;
288 status = "okay";
289 };
290
291 &pfc {
292 pinctrl-0 = <&scif_clk_pins>;
293 pinctrl-names = "default";
294
295 avb0_pins: avb0 {
296 mux {
297 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
298 "avb0_txcrefclk";
299 function = "avb0";
300 };
301
302 pins_mdio {
303 groups = "avb0_mdio";
304 drive-strength = <21>;
305 };
306
307 pins_mii {
308 groups = "avb0_rgmii";
309 drive-strength = <21>;
310 };
311
312 };
313
314 hscif0_pins: hscif0 {
315 groups = "hscif0_data";
316 function = "hscif0";
317 };
318
319 i2c0_pins: i2c0 {
320 groups = "i2c0";
321 function = "i2c0";
322 };
323
324 i2c1_pins: i2c1 {
325 groups = "i2c1";
326 function = "i2c1";
327 };
328
329 keys_pins: keys {
330 pins = "GP_5_0", "GP_5_1", "GP_5_2";
331 bias-pull-up;
332 };
333
334 mmc_pins: mmc {
335 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
336 function = "mmc";
337 power-source = <1800>;
338 };
339
340 qspi0_pins: qspi0 {
341 groups = "qspi0_ctrl", "qspi0_data4";
342 function = "qspi0";
343 };
344
345 scif_clk_pins: scif_clk {
346 groups = "scif_clk";
347 function = "scif_clk";
348 };
349 };
350
351 &rpc {
352 pinctrl-0 = <&qspi0_pins>;
353 pinctrl-names = "default";
354
355 status = "okay";
356
357 flash@0 {
358 compatible = "spansion,s25fs512s", "jedec,spi-nor";
359 reg = <0>;
360 spi-max-frequency = <40000000>;
361 spi-rx-bus-width = <4>;
362
363 partitions {
364 compatible = "fixed-partitions";
365 #address-cells = <1>;
366 #size-cells = <1>;
367
368 boot@0 {
369 reg = <0x0 0x1200000>;
370 read-only;
371 };
372 user@1200000 {
373 reg = <0x1200000 0x2e00000>;
374 };
375 };
376 };
377 };
378
379 &rwdt {
380 timeout-sec = <60>;
381 status = "okay";
382 };
383
384 &scif_clk {
385 clock-frequency = <24000000>;
386 };
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